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path: root/drivers/net/wireless/ath/ath10k/htt.h
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2018-04-24ath10k: enable hw checksum for wcn3990Rakesh Pillai1-0/+13
By default ath10k driver enables the support for HW_CHECKSUM (NETIF_F_HW_CSUM). Since the TCP/UDP checksum calculation is not enabled in the wcn3990 firmware the checksum is incorrect in the TCP/UDP packets and all patckets are dropped. But due note that wcn3990 support in ath10k is still incomplete so this isn't a critical fix (yet). Enable hw checksum calculations in wcn3990 hardware by setting the proper flags in msdu descriptor tso flags. Signed-off-by: Rakesh Pillai <pillair@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-04-19ath10k: add inlined wrappers for htt rx opsErik Stromdahl1-0/+37
Added for the same reason as the TX wrappers. Signed-off-by: Erik Stromdahl <erik.stromdahl@gmail.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-04-19ath10k: add inlined wrappers for htt tx opsErik Stromdahl1-0/+51
These wrappers makes the HTT ops align better with the HIF ops (where similar wrappers are used). It also makes it easier for a target to have unsupported ops (by letting the corresponding function pointer be NULL). Signed-off-by: Erik Stromdahl <erik.stromdahl@gmail.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-04-19ath10k: Add tx ack signal support for management framesVenkateswara Naralasetty1-1/+9
This patch add support to get RSSI from acknowledgment frames for transmitted management frames. hardware_used: QCA4019, QCA9984. firmware version: 10.4-3.5.3-00052. Signed-off-by: Venkateswara Naralasetty <vnaralas@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-01-16ath10k: fix recently introduced checkpatch warningsKalle Valo1-0/+1
Checkpatch found these issues: drivers/net/wireless/ath/ath10k/ce.h:324: Please use a blank line after function/struct/union/enum declarations drivers/net/wireless/ath/ath10k/core.c:1321: Please don't use multiple blank lines drivers/net/wireless/ath/ath10k/htt.h:1859: Please use a blank line after function/struct/union/enum declarations Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-01-09ath10k: remove unused prototypeErik Stromdahl1-1/+0
The function does not exist and thus, the prototype can be removed. Signed-off-by: Erik Stromdahl <erik.stromdahl@gmail.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2017-12-27ath10k: update copyright yearKalle Valo1-1/+1
Update year for Qualcomm Atheros, Inc. copyrights. Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-12-27ath10k: Add paddrs_ring_64 support for 64bit targetGovind Singh1-1/+14
paddrs_ring_64 holds the physical device address of the rx buffers that host SW provides for the MAC HW to fill. Since this field is used in rx ring setup and rx ring replenish in rx data path. Define separate methods for handling 64 bit ring paddr and attach them dynamically based on target_64bit hw param flag. Use u64 type while popping paddr from the rx hash table for 64bit target. Signed-off-by: Govind Singh <govinds@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-12-27ath10k: Add hw param for rx ring size supportGovind Singh1-0/+3
WCN3990 uses larger ring size in comparison to existing ring size value. Add rx ring size hw param for supporting different rx ring size across multiple target. Signed-off-by: Govind Singh <govinds@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-12-27ath10k: Add support for htt_data_tx_desc_64 descriptorGovind Singh1-5/+33
WCN3990 target uses 64 bit frags_paddr in htt tx descriptor, which holds the physical address of SKB fragments in tx data path. In order to support 64 bit bit frags_paddr in htt tx descriptor, define htt_data_tx_desc_64 descriptor and ath10k_htt_tx_64 method for handling tx data path with new descriptor fields. Signed-off-by: Govind Singh <govinds@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-12-27ath10k: Add support for 64 bit HTT frag descriptorGovind Singh1-4/+28
WCN3990 target uses 64 bit frag descriptor and more fields in TSO flag. Add support for 64 bit HTT frag descriptor. Signed-off-by: Govind Singh <govinds@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-12-27ath10k: Add support for 64 bit htt rx ring cfgGovind Singh1-5/+37
WCN3900 target uses 64bit rx_ring_base_paddr and fw_idx_shadow_reg_paddr fields in HTT rx ring cfg message. These address points to the memory region where remote ring empty buffers are allocated. In order to add 64 bit htt rx ring cfg, define separate 64 bit htt rx ring cfg message and attach it in runtime based on target_64bit hw param flag. Signed-off-by: Govind Singh <govinds@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-12-27ath10k: Add support for 64 bit HTT in-order indication msgGovind Singh1-1/+11
WCN3990 target use 64bit msdu address in htt in-order indication message. Add support for 64 bit msdu address in HTT_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND message. Signed-off-by: Govind Singh <govinds@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-12-14ath10k: add per peer tx stats support for 10.2.4Anilkumar Kolli1-0/+17
10.2.4 firmware branch (used in QCA988X) does not support HTT_10_4_T2H_MSG_TYPE_PEER_STATS and that's why ath10k does not provide tranmission rate statistics to user space, instead it just shows hardcoded 6 Mbit/s. But pktlog firmware facility provides per peer tx statistics. The firmware sends one pktlog event for every four PPDUs per peer, which include: * successful number of packets and bytes transmitted * number of packets and bytes dropped * retried number of packets and bytes * rate info per ppdu Firmware supports WMI_SERVICE_PEER_STATS, pktlog is enabled through ATH10K_FLAG_PEER_STATS, which is nowadays enabled by default in ath10k. This patch does not impact throughput. Tested on QCA9880 with firmware version 10.2.4.70.48. This should also work with firmware branch 10.2.4-1.0-00029 Parse peer stats from pktlog packets and update the tx rate information per STA. This way user space can query about transmit rate with iw: $iw wlan0 station dump Station 3c:a9:f4:72:bb:a4 (on wlan1) inactive time: 8210 ms rx bytes: 9166 rx packets: 44 tx bytes: 1105 tx packets: 9 tx retries: 0 tx failed: 1 rx drop misc: 3 signal: -75 [-75, -87, -88] dBm signal avg: -75 [-75, -85, -88] dBm tx bitrate: 39.0 MBit/s MCS 10 rx bitrate: 26.0 MBit/s MCS 3 rx duration: 23250 us authorized: yes authenticated: yes associated: yes preamble: short WMM/WME: yes MFP: no TDLS peer: no DTIM period: 2 beacon interval:100 short preamble: yes short slot time:yes connected time: 22 seconds Signed-off-by: Anilkumar Kolli <akolli@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-12-14ath10k: unify rx processing in napi_pollRajkumar Manoharan1-1/+1
With current NAPI implementation, NAPI poll can deliver more frames to net core than allotted budget. This may cause warning in napi_poll. Remaining quota is not accounted, while processing amsdus in rx_in_ord_ind and rx_ind queue. Adding num_msdus at last can not prevent delivering more frames to net core. With this change, all amdus from both in_ord_ind and rx_ind queues are processed and enqueued into common skb list instead of delivering into mac80211. Later msdus from common queue are dequeued and delivered depends on quota availability. This change also simplifies the rx processing in napi poll routine. Signed-off-by: Rajkumar Manoharan <rmanohar@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-04-05ath10k: clean header files from bad block commentsMarcin Rokicki1-8/+16
Fix output from checkpatch.pl like: Block comments use a trailing */ on a separate line Signed-off-by: Marcin Rokicki <marcin.rokicki@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-02-07ath10k: use names in function definition argumentsKalle Valo1-1/+1
Fixes new checkpatch warnings: drivers/net/wireless/ath/ath10k/htt.h:1823: function definition argument 'struct sk_buff *' should also have an identifier name drivers/net/wireless/ath/ath10k/wmi.h:6607: function definition argument 'struct wmi_start_scan_arg *' should also have an identifier name Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-02-07ath10k: prefer unsigned int over just unsignedKalle Valo1-2/+2
Fixes new checkpatch warnings: drivers/net/wireless/ath/ath10k/htt.h:1639: Prefer 'unsigned int' to bare use of 'unsigned' drivers/net/wireless/ath/ath10k/htt.h:1660: Prefer 'unsigned int' to bare use of 'unsigned' Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2016-12-01ath10k: fix Tx DMA alloc failure during continuous wifi down/upMohammed Shafi Shajakhan1-1/+5
With maximum number of vap's configured in a two radio supported systems of ~256 Mb RAM, doing a continuous wifi down/up and intermittent traffic streaming from the connected stations results in failure to allocate contiguous memory for tx buffers. This results in the disappearance of all VAP's and a manual reboot is needed as this is not a crash (or) OOM(for OOM killer to be invoked). To address this allocate contiguous memory for tx buffers one time and re-use them until the modules are unloaded but this results in a slight increase in memory footprint of ath10k when the wifi is down, but the modules are still loaded. Also as of now we use a separate bool 'tx_mem_allocated' to keep track of the one time memory allocation, as we cannot come up with something like 'ath10k_tx_{register,unregister}' before 'ath10k_probe_fw' is called as 'ath10k_htt_tx_alloc_cont_frag_desc' memory allocation is dependent on the hw_param 'continuous_frag_desc' a) memory footprint of ath10k without the change lsmod | grep ath10k ath10k_core 414498 1 ath10k_pci ath10k_pci 38236 0 b) memory footprint of ath10k with the change ath10k_core 414980 1 ath10k_pci ath10k_pci 38236 0 Memory Failure Call trace: hostapd: page allocation failure: order:6, mode:0xd0 [<c021f150>] (__dma_alloc_buffer.isra.23) from [<c021f23c>] (__alloc_remap_buffer.isra.26+0x14/0xb8) [<c021f23c>] (__alloc_remap_buffer.isra.26) from [<c021f664>] (__dma_alloc+0x224/0x2b8) [<c021f664>] (__dma_alloc) from [<c021f810>] (arm_dma_alloc+0x84/0x90) [<c021f810>] (arm_dma_alloc) from [<bf954764>] (ath10k_htt_tx_alloc+0xe0/0x2e4 [ath10k_core]) [<bf954764>] (ath10k_htt_tx_alloc [ath10k_core]) from [<bf94e6ac>] (ath10k_core_start+0x538/0xcf8 [ath10k_core]) [<bf94e6ac>] (ath10k_core_start [ath10k_core]) from [<bf947eec>] (ath10k_start+0xbc/0x56c [ath10k_core]) [<bf947eec>] (ath10k_start [ath10k_core]) from [<bf8a7a04>] (drv_start+0x40/0x5c [mac80211]) [<bf8a7a04>] (drv_start [mac80211]) from [<bf8b7cf8>] (ieee80211_do_open+0x170/0x82c [mac80211]) [<bf8b7cf8>] (ieee80211_do_open [mac80211]) from [<c056afc8>] (__dev_open+0xa0/0xf4) [21053.491752] Normal: 641*4kB (UEMR) 505*8kB (UEMR) 330*16kB (UEMR) 126*32kB (UEMR) 762*64kB (UEMR) 237*128kB (UEMR) 1*256kB (M) 0*512kB 0*1024kB 0*2048kB 0*4096kB = 95276kB Signed-off-by: Mohammed Shafi Shajakhan <mohammed@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2016-11-23ath10k: add per peer htt tx stats support for 10.4Anilkumar Kolli1-0/+25
Per peer tx stats are part of 'HTT_10_4_T2H_MSG_TYPE_PEER_STATS' event, Firmware sends one HTT event for every four PPDUs. HTT payload has success pkts/bytes, failed pkts/bytes, retry pkts/bytes and rate info per ppdu. Peer stats are enabled through 'WMI_SERVICE_PEER_STATS', which are nowadays enabled by default. Parse peer stats and update the tx rate information per STA. tx rate, Peer stats are tested on QCA4019 with Firmware version 10.4-3.2.1-00028. Signed-off-by: Anilkumar Kolli <akolli@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2016-09-27ath10k: spelling and miscellaneous neateningJoe Perches1-4/+4
Correct some trivial comment typos. Remove unnecessary parentheses in a long line. Signed-off-by: Joe Perches <joe@perches.com> [kvalo@qca.qualcomm.com: drop the change for return] Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2016-09-09ath10k: implement NAPI supportRajkumar Manoharan1-1/+1
Add NAPI support for rx and tx completion. NAPI poll is scheduled from interrupt handler. The design is as below - on interrupt - schedule napi and mask interrupts - on poll - process all pipes (no actual Tx/Rx) - process Rx within budget - if quota exceeds budget reschedule napi poll by returning budget - process Tx completions and update budget if necessary - process Tx fetch indications (pull-push) - push any other pending Tx (if possible) - before resched or napi completion replenish htt rx ring buffer - if work done < budget, complete napi poll and unmask interrupts This change also get rid of two tasklets (intr_tq and txrx_compl_task). Measured peak throughput with NAPI on IPQ4019 platform in controlled environment. No noticeable reduction in throughput is seen and also observed improvements in CPU usage. Approx. 15% CPU usage got reduced in UDP uplink case. DL: AP DUT Tx UL: AP DUT Rx IPQ4019 (avg. cpu usage %) ======== TOT +NAPI =========== ============= TCP DL 644 Mbps (42%) 645 Mbps (36%) TCP UL 673 Mbps (30%) 675 Mbps (26%) UDP DL 682 Mbps (49%) 680 Mbps (49%) UDP UL 720 Mbps (28%) 717 Mbps (11%) Signed-off-by: Rajkumar Manoharan <rmanohar@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2016-06-14ath10k: fix some of the macro definitions of HTT_RX_IND messageVasanthakumar Thiagarajan1-3/+3
Only five bits are defined to pass tid information in HTT_RX_IND message, so the mask which can be used to extract tid should be 0x1f instead of the current 0x3f. Also, macros which can be used to extract flush_valid and release_valid bits have to be left shifted one bit less because these information follow the tid right after. This patch does not really fix anything functionally because these macros are not used currently. Signed-off-by: Vasanthakumar Thiagarajan <vthiagar@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2016-04-20ath10k: move htt_op_version to struct ath10k_fw_fileKalle Valo1-1/+0
Preparation for testmode.c to use ath10k_core_fetch_board_data_api_n(). Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2016-04-14ath10k: prefer kernel type 'u64' over 'u_int64_t'Kalle Valo1-2/+2
Fixes checkpatch warnings: drivers/net/wireless/ath/ath10k/htt.h:1477: Prefer kernel type 'u64' over 'u_int64_t' drivers/net/wireless/ath/ath10k/htt.h:1480: Prefer kernel type 'u64' over 'u_int64_t' Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2016-04-04ath10k: combine txrx and replenish taskRajkumar Manoharan1-2/+1
Since tx completion and rx indication processing are moved out of txrx tasklet and rx ring lock contention also removed from txrx for rx_ind messages, it would be efficient to combine both replenish and txrx tasks. Refill threshold is adjusted for both AP135 and AP148 (low and high end systems). With this adjustment in AP135, TCP DL is improved from 603 Mbps to 620 Mbps and UDP DL is improved from 758 Mbps to 803 Mbps. Also no watchdog are observed on UDP BiDi. Signed-off-by: Rajkumar Manoharan <rmanohar@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2016-04-04ath10k: register ath10k_htt_htc_t2h_msg_handlerRajkumar Manoharan1-1/+2
Except qca61x4 family chips (qca6164, qca6174), copy engine 5 is used for receiving target to host htt messages. In follow up patch, CE5 descriptors will be reused. In such case, same API can not be used as htc layer callback where the response messages will be freed at the end. Hence register new API for HTC layer that free up received message and keep the message handler common for both HTC and HIF layers. Signed-off-by: Rajkumar Manoharan <rmanohar@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2016-04-04ath10k: speedup htt rx descriptor processing for rx_indRajkumar Manoharan1-0/+1
In follow up patch, htt rx descriptors will be reused instead of dealloc and refill. To achieve that htt rx indication messages should not be deferred and should be processed in pci tasklet itself. Also from rx indication message, mpdu_count alone is used. So it is maintained as atomic variable and all rx amsdu handlers are done processed from txrx tasklet. This change get rid of rx_compl_q usage. Signed-off-by: Rajkumar Manoharan <rmanohar@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2016-04-04ath10k: speedup htt rx descriptor processing for tx completionRajkumar Manoharan1-5/+13
To optimize CPU usage htt rx descriptors will be reused instead of refilling it for htt rx copy engine (CE5). To support that all htt rx indications should be processed at same context. FIFO queue is used to maintain tx completion status for each msdu. This helps to retain the order of tx completion. Signed-off-by: Rajkumar Manoharan <rmanohar@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2016-03-18ath10k: move mgmt descriptor limit handle under mgmt_txRajkumar Manoharan1-5/+5
Frames that are transmitted via MGMT_TX are using reserved descriptor slots in firmware. This limitation is for the htt_mgmt_tx path itself, not for mgmt frames per se. In 16 MBSSID scenario, these reserved slots will be easy exhausted due to frequent probe responses. So for 10.4 based solutions, probe responses are limited by a threshold (24). management tx path is separate for all except tlv based solutions. Since tlv solutions (qca6174 & qca9377) do not support 16 AP interfaces, it is safe to move management descriptor limitation check under mgmt_tx function. Though CPU improvement is negligible, unlikely conditions or never hit conditions in hot path can be avoided on data transmission. Signed-off-by: Rajkumar Manoharan <rmanohar@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2016-03-18ath10k: handle channel change htt eventRajkumar Manoharan1-0/+9
Whenever firmware is configuring operating channel during scan or home channel, channel change event will be indicated to host. In some cases (device probe/ last vdev down), target will be configured to default channel whereas host is unaware of target's operating channel. This leads to packet drop due to unknown channel and kernel log will be filled up with "no channel configured; ignoring frame(s)!". Fix that by handling HTT_T2H_MSG_TYPE_CHAN_CHANGE event. Signed-off-by: Rajkumar Manoharan <rmanohar@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2016-03-06ath10k: implement push-pull txMichal Kazior1-0/+6
The current/old tx path design was that host, at its own leisure, pushed tx frames to the device. For HTT there was ~1000-1400 msdu queue depth. After reaching that limit the driver would request mac80211 to stop queues. There was little control over what packets got in there as far as DA/RA was considered so it was rather easy to starve per-station traffic flows. With MU-MIMO this became a significant problem because the queue depth was insufficient to buffer frames from multiple clients (which could have different signal quality and capabilities) in an efficient fashion. Hence the new tx path in 10.4 was introduced: a pull-push mode. Firmware and host can share tx queue state via DMA. The state is logically a 2 dimensional array addressed via peer_id+tid pair. Each entry is a counter (either number of bytes or packets. Host keeps it updated and firmware uses it for scheduling Tx pull requests to host. This allows MU-MIMO to become a lot more effective with 10+ clients. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2016-03-06ath10k: implement updating shared htt txq stateMichal Kazior1-0/+3
Firmware 10.4.3 onwards can support a pull-push Tx model where it shares a Tx queue state with the host. The host updates the DMA region it pointed to during HTT setup whenever number of software queued from (on host) changes. Based on this information firmware issues fetch requests to the host telling the host how many frames from a list of given stations/tids should be submitted to the firmware. The code won't be called because not all appropriate HTT events are processed yet. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2016-03-06ath10k: add new htt message generation/parsing logicMichal Kazior1-0/+5
This merely adds some parsing, generation and sanity checks with placeholders for real code/functionality to be added later. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2016-03-06ath10k: refactor tx pending managementMichal Kazior1-1/+6
Tx pending counter logic assumed that the sk_buff is already known and hence was performed in HTT functions themselves. However, for the sake of future wake_tx_queue() usage the driver must be able to tell whether it can submit more frames to firmware before it dequeues frame from ieee80211_txq (and thus long before HTT Tx functions are called) because once a frame is dequeued it cannot be requeud back to mac80211. This prepares the driver for future changes. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2016-01-28ath10k: implement basic support for new tx path firmwareMichal Kazior1-0/+8
This allows to use the new firmware which implements the new tx data path. Without this patch firmware supporting new tx path stops responding shortly after booting. This patch doesn't implement the entire pull-push logic available in the new firmware. This will be done in subsequent patches. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2016-01-28ath10k: add new htt definitionsMichal Kazior1-3/+150
These definitions are associated with some improvements upcomming for 10.4 and QCA99X0. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2016-01-28ath10k: rename some HTT eventsMichal Kazior1-4/+4
New names make a bit more sense. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-11-23ath10k: remove txmode from skb_cbMichal Kazior1-1/+3
It was wasteful to keep it in the struct because it can be passed as function argument down the tx path. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-11-12ath10k: fix peerid configuration in htt tx desc for htt version < 3.4Vasanthakumar Thiagarajan1-2/+7
Of a word in struct htt_data_tx_desc htt version >= 3.4 firmware uses LSB 16-bit for frequency configuration which is used for offchannel tx and MSB 16-bit is for peerid. But other firmwares using version 2.X (10.1, 10.2.2, 10.2.4 and 10.4) are using 32-bit for peerid in htt tx desc. So far no issue is found with the existing code setting peerid and freq for HTT version 2.X, this could be mainly because of 0 as frequecy (home channel) is being always passed with those firmwares. There may be issues when non-zero freq is passed with firmware using < 3.4 htt version. To be safe use target_version_major and target_version_minor along with htt-op-version before configuring peer id and freq in htt tx desc. This patch extends ath10k_mac_tx_frm_has_freq() to check for htt_op_version_tlv and uses the helper while setting peerid in htt_tx_desc. Fixes: 8d6d36243610 ("ath10k: fix offchan reliability") Signed-off-by: Vasanthakumar Thiagarajan <vthiagar@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-11-04ath10k: add support for pktlog in QCA99X0Vivek Natarajan1-0/+2
This patch adds pktlog support for 10.4 fw versions. Signed-off-by: Vivek Natarajan <nataraja@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-10-16ath10k: export htt tx rx handlersRajkumar Manoharan1-0/+1
Some special copy engines delivers messages directly to HTT by bypassing HTC layer. Hence exporting tx_completion and rx_handler for delivering the data to HTT layer. Reviewed-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Rajkumar Manoharan <rmanohar@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-10-06ath10k: use pre-allocated DMA buffer in TxPeter Oh1-1/+5
ath10k driver is using dma_pool_alloc per packet and dma_pool_free in coresponding at Tx completion. Use of pre-allocated DMA buffer in Tx will improve saving CPU resource by 5% while it consumes about 56KB memory more as trade off. Signed-off-by: Peter Oh <poh@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-09-09ath10k: drop probe responses when too many are queuedVivek Natarajan1-1/+2
In a noisy environment, when multiple interfaces are created, the management tx descriptors are fully occupied by the probe responses from all the interfaces. This prevents a new station from a successful association. Fix this by limiting the probe responses when the specified threshold limit is reached. Signed-off-by: Vivek Natarajan <nataraja@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-07-29ath10k: enable raw encap mode and software crypto engineDavid Liu1-0/+8
This patch enables raw Rx/Tx encap mode to support software based crypto engine. This patch introduces a new module param 'cryptmode'. cryptmode: 0: Use hardware crypto engine globally with native Wi-Fi mode TX/RX encapsulation to the firmware. This is the default mode. 1: Use sofware crypto engine globally with raw mode TX/RX encapsulation to the firmware. Known limitation: A-MSDU must be disabled for RAW Tx encap mode to perform well when heavy traffic is applied. Testing: (by Michal Kazior <michal.kazior@tieto.com>) a) Performance Testing cryptmode=1 ap=qca988x sta=killer1525 killer1525 -> qca988x 194.496 mbps [tcp1 ip4] killer1525 -> qca988x 238.309 mbps [tcp5 ip4] killer1525 -> qca988x 266.958 mbps [udp1 ip4] killer1525 -> qca988x 477.468 mbps [udp5 ip4] qca988x -> killer1525 301.378 mbps [tcp1 ip4] qca988x -> killer1525 297.949 mbps [tcp5 ip4] qca988x -> killer1525 331.351 mbps [udp1 ip4] qca988x -> killer1525 371.528 mbps [udp5 ip4] ap=killer1525 sta=qca988x qca988x -> killer1525 331.447 mbps [tcp1 ip4] qca988x -> killer1525 328.783 mbps [tcp5 ip4] qca988x -> killer1525 375.309 mbps [udp1 ip4] qca988x -> killer1525 403.379 mbps [udp5 ip4] killer1525 -> qca988x 203.689 mbps [tcp1 ip4] killer1525 -> qca988x 222.339 mbps [tcp5 ip4] killer1525 -> qca988x 264.199 mbps [udp1 ip4] killer1525 -> qca988x 479.371 mbps [udp5 ip4] Note: - only open network tested for RAW vs nwifi performance comparison - killer1525 (qca6174 hw2.2) is 2x2 device (hence max 866mbps) - used iperf - OTA, devices a few cm apart from each other, no shielding - tcpX/udpX, X - means number of threads used Overview: - relative Tx performance drop is seen but is within reasonable and expected threshold (A-MSDU must be disabled with RAW Tx) b) Connectivity Testing cryptmode=1 ap=iwl6205 sta1=qca988x crypto=open topology-1ap1sta OK ap=iwl6205 sta1=qca988x crypto=wep1 topology-1ap1sta OK ap=iwl6205 sta1=qca988x crypto=wpa topology-1ap1sta OK ap=iwl6205 sta1=qca988x crypto=wpa-ccmp topology-1ap1sta OK ap=qca988x sta1=iwl6205 crypto=open topology-1ap1sta OK ap=qca988x sta1=iwl6205 crypto=wep1 topology-1ap1sta OK ap=qca988x sta1=iwl6205 crypto=wpa topology-1ap1sta OK ap=qca988x sta1=iwl6205 crypto=wpa-ccmp topology-1ap1sta OK ap=iwl6205 sta1=qca988x crypto=open topology-1ap1sta2br OK ap=iwl6205 sta1=qca988x crypto=wep1 topology-1ap1sta2br OK ap=iwl6205 sta1=qca988x crypto=wpa topology-1ap1sta2br OK ap=iwl6205 sta1=qca988x crypto=wpa-ccmp topology-1ap1sta2br OK ap=qca988x sta1=iwl6205 crypto=open topology-1ap1sta2br OK ap=qca988x sta1=iwl6205 crypto=wep1 topology-1ap1sta2br OK ap=qca988x sta1=iwl6205 crypto=wpa topology-1ap1sta2br OK ap=qca988x sta1=iwl6205 crypto=wpa-ccmp topology-1ap1sta2br OK ap=iwl6205 sta1=qca988x crypto=open topology-1ap1sta2br1vlan OK ap=iwl6205 sta1=qca988x crypto=wep1 topology-1ap1sta2br1vlan OK ap=iwl6205 sta1=qca988x crypto=wpa topology-1ap1sta2br1vlan OK ap=iwl6205 sta1=qca988x crypto=wpa-ccmp topology-1ap1sta2br1vlan OK ap=qca988x sta1=iwl6205 crypto=open topology-1ap1sta2br1vlan OK ap=qca988x sta1=iwl6205 crypto=wep1 topology-1ap1sta2br1vlan OK ap=qca988x sta1=iwl6205 crypto=wpa topology-1ap1sta2br1vlan OK ap=qca988x sta1=iwl6205 crypto=wpa-ccmp topology-1ap1sta2br1vlan OK Note: - each test takes all possible endpoint pairs and pings - each pair-ping flushes arp table - ip6 is used c) Testbed Topology: 1ap1sta: [ap] ---- [sta] endpoints: ap, sta 1ap1sta2br: [veth0] [ap] ---- [sta] [veth2] | | | | [veth1] | \ [veth3] \ / \ / [br0] [br1] endpoints: veth0, veth2, br0, br1 note: STA works in 4addr mode, AP has wds_sta=1 1ap1sta2br1vlan: [veth0] [ap] ---- [sta] [veth2] | | | | [veth1] | \ [veth3] \ / \ / [br0] [br1] | | [vlan0_id2] [vlan1_id2] endpoints: vlan0_id2, vlan1_id2 note: STA works in 4addr mode, AP has wds_sta=1 Credits: Thanks to Michal Kazior <michal.kazior@tieto.com> who helped find the amsdu issue, contributed a workaround (already squashed into this patch), and contributed the throughput and connectivity tests results. Signed-off-by: David Liu <cfliu.tw@gmail.com> Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Tested-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-07-24ath10k: extend struct htt_mgmt_tx_dec for qca99x0Raja Mani1-0/+6
HTT_H2T_MSG_TYPE_MGMT_TX msg in 10.4 firmware carries additional 4 byte in htt_mgmt_tx_desc where it tells to firmware that at what rate mgmt frame has to go out in the air. It's an optional parameter, setting this field to zero will force firmware to choose auto rate and send the frame out. Those 4 byte info is missed out in the current code and 10.4 firmware ended up reading some junk in those 4 byte and sometime malfunctioning. Fix it by adding 4 byte in struct htt_mgmt_tx_desc. Non 10.4 firmware will not process those four byte. So, adding 4 byte at the end of struct htt_mgmt_tx_desc will not create any impact on other chipset. Signed-off-by: Raja Mani <rmani@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-07-24ath10k: add TCP/UDP Checksum offload support for QCA99x0Manikanta Pubbisetty1-1/+16
The patch adds support to offload TCP/UDP checksum calculations for QCA99x0. Signed-off-by: Manikanta Pubbisetty <c_mpubbi@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-07-24ath10k: update tx path to support QCA99X0Peter Oh1-2/+11
Since QCA99X0 uses fragmentation descriptor differently from other ones on tx path, we need to handle it separately. QCA99X0 is using 48 bits for address and 16 bits for length out of 2 dword and each values have to be programmed by frag desc base addr + msdu id, so that hardware can retrieve corresponding frag data. Signed-off-by: Peter Oh <poh@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-07-02ath10k: configure frag desc memory to target for qca99X0Raja Mani1-0/+11
Pre qca99X0 chipsets follows the model where dynamically allocate memory for frag desc on getting new skb for TX. But, this is not going to be the case in qca99X0. It expects frag desc memory to be allocated at boot time and let the driver to reuse allocated memory after every TX completion. So there won't be any dynamic frag memory memory allocation in qca99X0 during data transmission. qca99X0 hardware doesn't need fragment desc address to be programmed in msdu descriptor for every data transaction. It needs to know only starting address of fragment descriptor at the time of the boot. During data transmission, qca99X0 hardware can retrieve corresponding frag addr by adding programmed frag desc base addr + msdu id. Allocate continuous fragment descriptor memory (same size as number of descriptor) at the time of target initialization and configure allocated dma address to the target via HTT_H2T_MSG_TYPE_FRAG_DESC_BANK_CFG. How this is allocated continuous memory is going to be used is not covered in this patch. It just allocates memory and hand over to firmware. If we don't do it at init time, qca99X0 will stall when firmware tries to do TX. Signed-off-by: Raja Mani <rmani@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-07-02ath10k: add 10.4 fw specific htt msg definitionsRaja Mani1-0/+36
New htt event table is added for 10.4 firmware. Following new htt events are available only 10.4. adding this to generic htt event table, HTT_T2H_MSG_TYPE_EN_STATS, HTT_T2H_MSG_TYPE_TX_FETCH_IND, HTT_T2H_MSG_TYPE_TX_FETCH_CONF, HTT_T2H_MSG_TYPE_TX_LOW_LATENCY_IND Signed-off-by: Raja Mani <rmani@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
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