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path: root/drivers/net/ethernet/intel/igc/igc_i225.c
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2021-12-22igc: Fix typo in i225 LTR functionsSasha Neftin1-1/+1
[ Upstream commit 0182d1f3fa640888a2ed7e3f6df2fdb10adee7c8 ] The LTR maximum value was incorrectly written using the scale from the LTR minimum value. This would cause incorrect values to be sent, in cases where the initial calculation lead to different min/max scales. Fixes: 707abf069548 ("igc: Add initial LTR support") Suggested-by: Dima Ruinskiy <dima.ruinskiy@intel.com> Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Nechama Kraus <nechamax.kraus@linux.intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
2021-02-10igc: set the default return value to -IGC_ERR_NVM in igc_write_nvm_srwrKevin Lo1-2/+1
[ Upstream commit ebc8d125062e7dccb7922b2190b097c20d88ad96 ] This patch sets the default return value to -IGC_ERR_NVM in igc_write_nvm_srwr. Without this change it wouldn't lead to a shadow RAM write EEWR timeout. Fixes: ab4056126813 ("igc: Add NVM support") Signed-off-by: Kevin Lo <kevlo@kevlo.org> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-06-30igc: Add initial LTR supportSasha Neftin1-0/+100
The LTR message on the PCIe inform the requested latency on which the PCIe must become active to the downstream PCIe port of the system. This patch provide recommended LTR parameters by i225 specification. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2020-06-30igc: Add initial EEE supportSasha Neftin1-0/+56
IEEE802.3az-2010 Energy Efficient Ethernet has been approved as standard (September 2010) and the driver can enable and disable it via ethtool. Disable the feature by default on parts which support it. Add enable/disable eee options. tx-lpi, tx-timer and advertise not supported yet. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Reviewed-by: Andre Guedes <andre.guedes@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-10-17igc: Add NVM supportSasha Neftin1-0/+349
Add code for NVM support and get MAC address, complete probe method. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-10-17igc: Add HW initialization codeSasha Neftin1-0/+141
Add code for hardware initialization and reset Add code for semaphore handling Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>