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2022-07-27net: dsa: microchip: ksz8795: use common xmii functionArun Ramadoss2-42/+1
This patch updates the ksz8795 cpu configuration to use the ksz common xmii set functions. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-27net: dsa: microchip: ksz9477: use common xmii functionArun Ramadoss4-167/+49
In ksz9477.c file, configuring the xmii register is performed based on the flag NEW_XMII. The flag is reset for ksz9893 switch and set for other switch. This patch uses the ksz common xmii set and get function. The bit values are configured based on the chip id. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-27net: dsa: microchip: apply rgmii tx and rx delay in phylink mac configArun Ramadoss5-1/+130
This patch read the rgmii tx and rx delay from device tree and stored it in the ksz_port. It applies the rgmii delay to the xmii tune adjust register based on the interface selected in phylink mac config. There are two rgmii port in LAN937x and value to be loaded in the register vary depends on the port selected. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-27net: dsa: microchip: lan937x: add support for configuing xMII registerArun Ramadoss4-40/+53
This patch add the common ksz_set_xmii function for ksz series switch and update the lan937x code phylink mac config. The register address for the ksz8795 is Port 5 Interface control 6 and for all other switch is xMII Control 1. The bit value for selecting the interface is same for KSZ8795 and KSZ9893 are same. The bit values for KSZ9477 and lan973x are same. So, this patch add the bit value for each switches in ksz_chip_data and configure the registers based on the chip id. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-27net: dsa: microchip: add support for common phylink mac link upArun Ramadoss4-33/+16
This patch add the support for common phylink mac link up for the ksz series switch. The register address, bit position and values are configured based on the chip id to the dev->info structure. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-27net: dsa: microchip: add common duplex and flow control functionArun Ramadoss5-23/+57
This patch add common function for configuring the Full/Half duplex and transmit/receive flow control. KSZ8795 uses the Global control register 4 for configuring the duplex and flow control, whereas all other KSZ9477 based switch uses the xMII Control 0 register. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-27net: dsa: microchip: add common ksz port xmii speed selection functionArun Ramadoss5-15/+69
This patch adds the function for configuring the 100/10Mbps speed selection for the ksz switches. KSZ8795 switch uses Global control 4 register 0x06 bit 4 for choosing 100/10Mpbs. Other switches uses xMII control 1 0xN300 for it. For KSZ8795, if the bit is set then 10Mbps is chosen and if bit is clear then 100Mbps chosen. For all other switches it is other way around, if the bit is set then 100Mbps is chosen. So, this patch add the generic function for ksz switch to select the 100/10Mbps speed selection. While configuring, first it disables the gigabit functionality and then configure the respective speed. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-27net: dsa: microchip: add common gigabit set and get functionArun Ramadoss6-48/+82
This patch add helper function for setting and getting the gigabit enable for the ksz series switch. KSZ8795 switch has different register address compared to all other ksz switches. KSZ8795 series uses the Port 5 Interface control 6 Bit 6 for configuring the 1Gbps or 100/10Mbps speed selection. All other switches uses the xMII control 1 0xN301 register Bit6 for gigabit. Further, for KSZ8795 & KSZ9893 switches if bit 1 then 1Gbps is chosen and if bit 0 then 100/10Mbps is chosen. It is other way around for other switches bit 0 is for 1Gbps. So, this patch implements the common function for configuring the gigabit set and get capability. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-21Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski3-1/+30
No conflicts. Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-07-19net: dsa: microchip: fix the missing ksz8_r_mib_cntArun Ramadoss1-0/+1
During the refactoring for the ksz8_dev_ops from ksz8795.c to ksz_common.c, the ksz8_r_mib_cnt has been missed. So this patch adds the missing one. Fixes: 6ec23aaaac43 ("net: dsa: microchip: move ksz_dev_ops to ksz_common.c") Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20220718061803.4939-1-arun.ramadoss@microchip.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2022-07-19net: dsa: vitesse-vsc73xx: silent spi_device_id warningsOleksij Rempel1-0/+10
Add spi_device_id entries to silent SPI warnings. Fixes: 5fa6863ba692 ("spi: Check we have a spi_device_id for each DT compatible") Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20220717135831.2492844-2-o.rempel@pengutronix.de Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2022-07-19net: dsa: sja1105: silent spi_device_id warningsOleksij Rempel1-0/+16
Add spi_device_id entries to silent following warnings: SPI driver sja1105 has no spi_device_id for nxp,sja1105e SPI driver sja1105 has no spi_device_id for nxp,sja1105t SPI driver sja1105 has no spi_device_id for nxp,sja1105p SPI driver sja1105 has no spi_device_id for nxp,sja1105q SPI driver sja1105 has no spi_device_id for nxp,sja1105r SPI driver sja1105 has no spi_device_id for nxp,sja1105s SPI driver sja1105 has no spi_device_id for nxp,sja1110a SPI driver sja1105 has no spi_device_id for nxp,sja1110b SPI driver sja1105 has no spi_device_id for nxp,sja1110c SPI driver sja1105 has no spi_device_id for nxp,sja1110d Fixes: 5fa6863ba692 ("spi: Check we have a spi_device_id for each DT compatible") Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20220717135831.2492844-1-o.rempel@pengutronix.de Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2022-07-18net: dsa: microchip: fix Clang -Wunused-const-variable warning on 'ksz_dt_ids'Arun Ramadoss1-1/+1
This patch removes the of_match_ptr() pointer when dereferencing the ksz_dt_ids which produce the unused variable warning. Reported-by: kernel test robot <lkp@intel.com> Suggested-by: Arnd Bergmann <arnd@kernel.org> Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-16net: dsa: microchip: ksz_common: Fix refcount leak bugLiang He1-1/+4
In ksz_switch_register(), we should call of_node_put() for the reference returned by of_get_child_by_name() which has increased the refcount. Fixes: 912aae27c6af ("net: dsa: microchip: really look for phy-mode in port nodes") Signed-off-by: Liang He <windhl@126.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20220714153138.375919-1-windhl@126.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-07-15net: dsa: qca8k: move driver to qca dirChristian Marangi6-9/+9
Move qca8k driver to qca dir in preparation for code split and introduction of ipq4019 switch based on qca8k. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-12net: dsa: hellcreek: Use the bitmap API to allocate bitmapsChristophe JAILLET1-5/+2
Use devm_bitmap_zalloc() instead of hand-writing them. It is less verbose and it improves the semantic. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Acked-by: Kurt Kanzenbach <kurt@linutronix.de> Link: https://lore.kernel.org/r/8306e2ae69a5d8553691f5d10a86a4390daf594b.1657376651.git.christophe.jaillet@wanadoo.fr Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-07-07net: dsa: b53: remove unnecessary spi_set_drvdata()Yang Yingliang1-2/+0
Remove unnecessary spi_set_drvdata() in b53_spi_remove(), the driver_data will be set to NULL in device_unbind_cleanup() after calling ->remove(). Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20220705131733.351962-1-yangyingliang@huawei.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-07-06net: dsa: felix: build as module when tc-taprio is moduleVladimir Oltean1-0/+1
felix_vsc9959.c calls taprio_offload_get() and taprio_offload_free(), symbols exported by net/sched/sch_taprio.c. As such, we must disallow building the Felix driver as built-in when the symbol exported by tc-taprio isn't present in the kernel image. Fixes: 1c9017e44af2 ("net: dsa: felix: keep reference on entire tc-taprio config") Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://lore.kernel.org/r/20220704190241.1288847-2-vladimir.oltean@nxp.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-07-02net: dsa: microchip: add LAN937x in the ksz spi probeArun Ramadoss1-0/+26
This patch add the LAN937x part support in the existing ksz_spi_probe. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-02net: dsa: microchip: lan937x: add phylink_mac_config supportArun Ramadoss4-2/+74
This patch add support for phylink_mac_config dsa hook. It configures the mac for MII/RMII modes. The RGMII mode will be added in the future patches. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-02net: dsa: microchip: lan937x: add phylink_mac_link_up supportArun Ramadoss5-0/+82
This patch add support for phylink_mac_link_up. It configures the mac for the speed, flow control and duplex mode. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-02net: dsa: microchip: lan937x: add phylink_get_caps supportArun Ramadoss3-0/+15
The internal phy of the LAN937x are capable of 100Mbps Full duplex. The xMII port of switch is capable of 10Mbps Full & Half Duplex, 100Mbps Full & Half Duplex and 1000Mbps Half duplex. xMII port also supports Tx and Rx Flow control. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-02net: dsa: microchip: lan937x: add MTU and fast_age supportArun Ramadoss4-0/+36
This patch add the support for port_max_mtu, port_change_mtu and port_fast_age dsa functionality. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-02net: dsa: microchip: lan937x: register mdio-busArun Ramadoss1-0/+74
This patch register mdio-bus for the lan937x series switch. mdio read and write uses the vphy for accessing the phy register. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-02net: dsa: microchip: lan937x: add phy read and write supportArun Ramadoss4-0/+156
This patch add support for the writing and reading of the phy registers. LAN937x uses the Vphy indirect addressing method for accessing the phys. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-02net: dsa: microchip: lan937x: add dsa_tag_protocolArun Ramadoss2-0/+12
This patch update the ksz_get_tag_protocol to return LAN937x specific tag if the chip id matches one of LAN937x series switch Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-02net: dsa: microchip: add DSA support for microchip LAN937xArun Ramadoss6-1/+333
Basic DSA driver support for lan937x and the device will be configured through SPI interface. It adds the lan937x_dev_ops in ksz_common.c file and tries to reuse the functionality of ksz9477 series switch. drivers/net/dsa/microchip/ path is already part of MAINTAINERS & the new files come under this path. Hence no update needed to the MAINTAINERS Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-02net: dsa: microchip: generic access to ksz9477 static and reserved tableArun Ramadoss4-10/+58
The ksz9477 and lan937x has few difference in the static and reserved table register 0x041C. For the ksz9477 if the bit 0 is 1 - read operation and 0 - write operation. But for lan937x bit 1:0 used for selecting the read/write operation, 01 - write and 10 - read. To use ksz9477 mdb add/del and enable_stp_addr for the lan937x, masks & shifts are introduced for ksz9477 & lan937x in ksz_common.c. Then updated the function with masks & shifts based on the switch instead of hard coding it. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-01time64.h: consolidate uses of PSEC_PER_NSECVladimir Oltean1-2/+3
Time-sensitive networking code needs to work with PTP times expressed in nanoseconds, and with packet transmission times expressed in picoseconds, since those would be fractional at higher than gigabit speed when expressed in nanoseconds. Convert the existing uses in tc-taprio and the ocelot/felix DSA driver to a PSEC_PER_NSEC macro. This macro is placed in include/linux/time64.h as opposed to its relatives (PSEC_PER_SEC etc) from include/vdso/time64.h because the vDSO library does not (yet) need/use it. Cc: Andy Lutomirski <luto@kernel.org> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Vincenzo Frascino <vincenzo.frascino@arm.com> # for the vDSO parts Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-07-01net: dsa: felix: drop oversized frames with tc-taprio instead of hanging the ↵Vladimir Oltean3-0/+211
port Currently, sending a packet into a time gate too small for it (or always closed) causes the queue system to hold the frame forever. Even worse, this frame isn't subject to aging either, because for that to happen, it needs to be scheduled for transmission in the first place. But the frame will consume buffer memory and frame references while it is forever held in the queue system. Before commit a4ae997adcbd ("net: mscc: ocelot: initialize watermarks to sane defaults"), this behavior was somewhat subtle, as the switch had a more intricately tuned default watermark configuration out of reset, which did not allow any single port and tc to consume the entire switch buffer space. Nonetheless, the held frames are still there, and they reduce the total backplane capacity of the switch. However, after the aforementioned commit, the behavior can be very clearly seen, since we deliberately allow each {port, tc} to consume the entire shared buffer of the switch minus the reservations (and we disable all reservations by default). That is to say, we allow a permanently closed tc-taprio gate to hang the entire switch. A careful inspection of the documentation shows that the QSYS:Q_MAX_SDU per-port-tc registers serve 2 purposes: one is for guard band calculation (when zero, this falls back to QSYS:PORT_MAX_SDU), and the other is to enable oversized frame dropping (when non-zero). Currently the QSYS:Q_MAX_SDU registers are all zero, so oversized frame dropping is disabled. The goal of the change is to enable it seamlessly. For that, we need to hook into the MTU change, tc-taprio change, and port link speed change procedures, since we depend on these variables. Frames are not dropped on egress due to a queue system oversize condition, instead that egress port is simply excluded from the mask of valid destination ports for the packet. If there are no destination ports at all, the ingress counter that increments is the generic "drop_tail" in ethtool -S. The issue exists in various forms since the tc-taprio offload was introduced. Fixes: de143c0e274b ("net: dsa: felix: Configure Time-Aware Scheduler via taprio offload") Reported-by: Richie Pearn <richard.pearn@nxp.com> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-07-01net: dsa: felix: keep QSYS_TAG_CONFIG_INIT_GATE_STATE(0xFF) out of rmwVladimir Oltean1-12/+5
In vsc9959_tas_clock_adjust(), the INIT_GATE_STATE field is not changed, only the ENABLE field. Similarly for the disabling of the time-aware shaper in vsc9959_qos_port_tas_set(). To reflect this, keep the QSYS_TAG_CONFIG_INIT_GATE_STATE_M mask out of the read-modify-write procedure to make it clearer what is the intention of the code. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-07-01net: dsa: felix: keep reference on entire tc-taprio configVladimir Oltean1-10/+13
In a future change we will need to remember the entire tc-taprio config on all ports rather than just the base time, so use the taprio_offload_get() helper function to replace ocelot_port->base_time with ocelot_port->taprio. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-07-01net: dsa: rzn1-a5psw: add missing of_node_put() in a5psw_pcs_get()Yang Yingliang1-0/+2
of_parse_phandle() will increase the refcount of 'pcs_node', so add of_node_put() before return from a5psw_pcs_get(). Fixes: 888cdb892b61 ("net: dsa: rzn1-a5psw: add Renesas RZ/N1 advanced 5 port switch driver") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20220630014153.1888811-1-yangyingliang@huawei.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-07-01Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski3-0/+10
drivers/net/ethernet/microchip/sparx5/sparx5_switchdev.c 9c5de246c1db ("net: sparx5: mdb add/del handle non-sparx5 devices") fbb89d02e33a ("net: sparx5: Allow mdb entries to both CPU and ports") Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-30net: dsa: felix: fix race between reading PSFP stats and port statsVladimir Oltean1-0/+4
Both PSFP stats and the port stats read by ocelot_check_stats_work() are indirectly read through the same mechanism - write to STAT_CFG:STAT_VIEW, read from SYS:STAT:CNT[n]. It's just that for port stats, we write STAT_VIEW with the index of the port, and for PSFP stats, we write STAT_VIEW with the filter index. So if we allow them to run concurrently, ocelot_check_stats_work() may change the view from vsc9959_psfp_counters_get(), and vice versa. Fixes: 7d4b564d6add ("net: dsa: felix: support psfp filter on vsc9959") Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://lore.kernel.org/r/20220629183007.3808130-1-vladimir.oltean@nxp.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-30net: dsa: rzn1-a5psw: fix a NULL vs IS_ERR() check in a5psw_probe()Peng Wu1-2/+2
The devm_platform_ioremap_resource() function never returns NULL. It returns error pointers. Signed-off-by: Peng Wu <wupeng58@huawei.com> Reported-by: Hulk Robot <hulkci@huawei.com> Reviewed-by: Clément Léger <clement.leger@bootlin.com> Link: https://lore.kernel.org/r/20220628130920.49493-1-wupeng58@huawei.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-30net: dsa: microchip: count pause packets together will all other packetsOleksij Rempel1-2/+4
This switch is calculating tx/rx_bytes for all packets including pause. So, include rx/tx_pause counter to rx/tx_packets to make tx/rx_bytes fit to rx/tx_packets. Link: https://lore.kernel.org/all/20220624220317.ckhx6z7cmzegvoqi@skbuf/ Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-30net: dsa: microchip: add pause stats supportOleksij Rempel2-0/+20
Add support for pause specific stats. Tested on ksz9477. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-30net: dsa: ar9331: add support for pause statsOleksij Rempel1-0/+17
Add support for pause stats. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-29net: dsa: microchip: move remaining register offset to ksz_chip_regArun Ramadoss2-42/+18
This patch moves the broadcast ctrl, multicast ctrl and start control registers from ksz_chip_dat to ksz_chip_reg. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-29net: dsa: microchip: add P_STP_CTRL to ksz_chip_regArun Ramadoss6-29/+35
This patch moves the stp_ctrl_reg from the ksz_chip_data to ksz_chip_reg structure. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-29net: dsa: microchip: change the size of reg from u8 to u16Arun Ramadoss3-14/+14
The register size for the ksz8 switches is u8 and for ksz9477 series is u16. To have common struct for ksz series switches the size of reg is increased from u8 to u16. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-29net: dsa: microchip: remove the struct ksz8Arun Ramadoss3-27/+4
This patch removes the struct ksz8 from ksz8.h which is no longer needed. The platform bus specific details are now deferenced through dev->priv. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-29net: dsa: microchip: move ksz8->shifts to ksz_commonArun Ramadoss4-56/+46
This patch moves ksz8->shifts from ksz8795.c to ksz_common.c. The shifts are dereferenced using dev->info->shifts. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-29net: dsa: microchip: move ksz8->masks to ksz_commonArun Ramadoss5-86/+81
This patch moves the ksz8->masks from ksz8795.c to ksz_common.c. The mask will be dereferenced using dev->info->masks. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-29net: dsa: microchip: move ksz8->regs to ksz_commonArun Ramadoss5-73/+79
This patch moves the ksz8->regs from ksz8795.c to the ksz_common.c. And the regs is dereferrenced using dev->info->regs. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-27net: dsa: rzn1-a5psw: add FDB supportClément Léger2-0/+185
This commits add forwarding database support to the driver. It implements fdb_add(), fdb_del() and fdb_dump(). Signed-off-by: Clément Léger <clement.leger@bootlin.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-27net: dsa: rzn1-a5psw: add statistics supportClément Léger2-0/+220
Add statistics support to the rzn1-a5psw driver by implementing the following dsa_switch_ops callbacks: - get_sset_count() - get_strings() - get_ethtool_stats() - get_eth_mac_stats() - get_eth_ctrl_stats() - get_rmon_stats() Signed-off-by: Clément Léger <clement.leger@bootlin.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-27net: dsa: rzn1-a5psw: add Renesas RZ/N1 advanced 5 port switch driverClément Léger4-0/+926
Add Renesas RZ/N1 advanced 5 port switch driver. This switch handles 5 ports including 1 CPU management port. A MDIO bus is also exposed by this switch and allows to communicate with PHYs connected to the ports. Each switch port (except for the CPU management ports) is connected to the MII converter. This driver includes basic bridging support, more support will be added later (vlan, etc). Suggested-by: Jean-Pierre Geslin <jean-pierre.geslin@non.se.com> Suggested-by: Phil Edworthy <phil.edworthy@renesas.com> Signed-off-by: Clément Léger <clement.leger@bootlin.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-24net: dsa: microchip: common ksz_spi_probe for ksz switchesArun Ramadoss4-183/+69
As of now, there are two spi probes, one ksz8795_spi.c and other ksz9477_spi.c. This patch combines two files into single ksz_spi.c. The difference between the two are regmap config and struct ksz8. The regmap config is assigned based on the platform data. And struct ksz8 is left untouched, as it is used only ksz8795.c. It can be used for all other switches also in future. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>