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path: root/drivers/net/dsa
AgeCommit message (Expand)AuthorFilesLines
2015-11-16net: dsa: mv88e6060: replace magic values with register definesNeil Armstrong1-27/+37
2015-11-16net: dsa: mv88e6060: add register defines header fileNeil Armstrong1-0/+111
2015-11-16net: dsa: mv88e6060: use the correct bit shift for mac0Neil Armstrong1-1/+2
2015-11-16net: dsa: mv88e6060: use the correct MaxFrameSize bitNeil Armstrong1-1/+1
2015-11-16net: dsa: mv88e6060: use the correct InitReady bitNeil Armstrong1-1/+1
2015-11-16net: dsa: mv88e6060: remove poll_link callbackNeil Armstrong1-49/+0
2015-11-05net: dsa: mv88e6xxx: isolate unbridged portsVivien Didelot4-0/+48
2015-11-03net: dsa: mv88e6xxx: include DSA ports in VLANsVivien Didelot1-6/+6
2015-11-03net: dsa: mv88e6xxx: disable SA learning for DSA and CPU portsAndrew Lunn2-2/+11
2015-11-02net: dsa: mv88e6xxx: lookup switch nameVivien Didelot6-112/+95
2015-11-02net: dsa: mv88e6xxx: assert SMI lockVivien Didelot1-11/+14
2015-11-01net: dsa: use switchdev obj for VLAN add/del opsVivien Didelot4-27/+97
2015-10-27net: dsa: bcm_sf2: Unhardcode port numbersFlorian Fainelli2-11/+97
2015-10-27net: dsa: bcm_sf2: Implement FDB operationsFlorian Fainelli3-0/+335
2015-10-23net: dsa: Make mv88e6060 use nested mdiobus read/writeNeil Armstrong1-2/+2
2015-10-23net: dsa: Make mv88e6xxx use nested mdiobus read/writeNeil Armstrong1-37/+9
2015-10-23net: dsa: mv88e6xxx: remove debugfs interfaceVivien Didelot2-293/+0
2015-10-22net: dsa: mv88e6xxx: remove port_fdb_getnextVivien Didelot4-77/+0
2015-10-22net: dsa: mv88e6xxx: implement port_fdb_dumpVivien Didelot4-0/+70
2015-10-22net: dsa: mv88e6xxx: write MAC outside of ATU Get Next codeVivien Didelot1-6/+5
2015-10-22net: dsa: mv88e6xxx: write VID outside of VTU Get Next codeVivien Didelot1-10/+29
2015-10-13net: dsa: mv88e6xxx: fix hardware bridgingVivien Didelot4-50/+3
2015-10-13net: dsa: mv88e6xxx: do not support per-port FIDVivien Didelot2-63/+11
2015-10-13net: dsa: mv88e6xxx: bridges do not need an FIDVivien Didelot2-110/+32
2015-10-11net: dsa: use switchdev obj in port_fdb_delVivien Didelot2-3/+3
2015-10-11net: dsa: push prepare phase in port_fdb_addVivien Didelot2-4/+7
2015-10-11net: dsa: add port_fdb_prepareVivien Didelot4-0/+15
2015-10-07net: dsa: mv88e6xxx: remove link pollingRussell King6-72/+0
2015-10-02Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller1-0/+2
2015-09-30dsa: mv88e6xxx: Fix unsigned/signed issueAndrew Lunn1-1/+2
2015-09-30dsa: mv88e6xxx: Enable forwarding for unknown to the CPU portAndrew Lunn1-0/+2
2015-09-27Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller1-0/+1
2015-09-23net: dsa: actually force the speed on the CPU portRussell King1-0/+1
2015-09-15net: dsa: mv88e6xxx: remove all MACs when disabling a portVivien Didelot1-1/+1
2015-09-15net: dsa: mv88e6xxx: remove addresses when a port leaves a VLANVivien Didelot1-0/+29
2015-09-15net: dsa: mv88e6xxx: flush all addresses when adding a VLANVivien Didelot1-1/+2
2015-09-15net: dsa: mv88e6xxx: flush ATU on initial setupVivien Didelot1-0/+5
2015-09-15net: dsa: mv88e6xxx: rework ATU Flush operationVivien Didelot2-13/+44
2015-09-15net: dsa: mv88e6xxx: extract ATU data write accessVivien Didelot1-19/+24
2015-09-15net: dsa: mv88e6xxx: extract FID write from ATU commandVivien Didelot1-9/+23
2015-09-10net: dsa: bcm_sf2: Fix 64-bits register writesFlorian Fainelli1-2/+2
2015-09-09net: dsa: bcm_sf2: Fix ageing conditions and operationFlorian Fainelli1-4/+8
2015-09-07net: dsa: mv88e6171: add hardware 802.1Q supportVivien Didelot1-0/+5
2015-09-01dsa: mv88e6xxx: Don't poll forced interfaces for state changesAndrew Lunn1-0/+5
2015-09-01dsa: mv88e6xxx: Set the RGMII delay based on phy interfaceAndrew Lunn2-0/+12
2015-09-01dsa: mv88e6xxx: Allow speed/duplex of port to be configuredAndrew Lunn6-0/+64
2015-08-24net: dsa: mv88e6xxx: set 802.1Q mode to FallbackVivien Didelot1-1/+1
2015-08-19dsa: mv88e6xxx: Set DSA mode based on chip abilitiesAndrew Lunn1-5/+8
2015-08-19net: dsa: Add dsa_is_dsa_port() helperAndrew Lunn1-3/+2
2015-08-14net: dsa: mv88e6xxx: use port 802.1Q mode SecureVivien Didelot2-7/+12
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