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2014-09-16mtd: denali: remove a set-but-unused variableMasahiro Yamada1-2/+0
The variable "retry" in wait_for_irq() is set, but not used. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: Josh Triplett <josh@joshtriplett.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-09-16mtd: denali: change the type of iterators to intMasahiro Yamada1-4/+7
We should rathar use "int" type for loop iterators. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-09-16mtd: denali: remove unnecessary castsMasahiro Yamada1-18/+18
Useless casts result in unreadable source code. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-09-16mtd: denali: remove unnecessary variable initializationsMasahiro Yamada1-32/+27
All of these variables are initialized to zero and then set to a different value below. Zero-initializing is redundant. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-09-16mtd: denali: fix the format of comment blocksMasahiro Yamada1-123/+188
We should use /* * Blah Blah ... * ... */ for multi-line comment blocks. In addition, refactor some comments where it seems reasonable and remove some comments where the code is clear enough such as: /* clear interrupts */ clear_interrupts(denali); Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: Josh Triplett <josh@joshtriplett.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-09-16Merge tag 'v3.17-rc5' from upstreamBrian Norris1-4/+12
2014-08-26mtd: nand: omap: Fix 1-bit Hamming code scheme, omap_calculate_ecc()Roger Quadros1-1/+1
commit 65b97cf6b8de introduced in v3.7 caused a regression by using a reversed CS_MASK thus causing omap_calculate_ecc to always fail. As the NAND base driver never checks for .calculate()'s return value, the zeroed ECC values are used as is without showing any error to the user. However, this won't work and the NAND device won't be guarded by any error code. Fix the issue by using the correct mask. Code was tested on omap3beagle using the following procedure - flash the primary bootloader (MLO) from the kernel to the first NAND partition using nandwrite. - boot the board from NAND. This utilizes OMAP ROM loader that relies on 1-bit Hamming code ECC. Fixes: 65b97cf6b8de (mtd: nand: omap2: handle nand on gpmc) Cc: <stable@vger.kernel.org> [3.7+] Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-08-26mtd: nand: omap: Revert to using software ECC by defaultRoger Quadros1-3/+11
For v3.12 and prior, 1-bit Hamming code ECC via software was the default choice. Commit c66d039197e4 in v3.13 changed the behaviour to use 1-bit Hamming code via Hardware using a different ECC layout i.e. (ROM code layout) than what is used by software ECC. This ECC layout change causes NAND filesystems created in v3.12 and prior to be unusable in v3.13 and later. So revert back to using software ECC by default if an ECC scheme is not explicitely specified. This defect can be observed on the following boards during legacy boot -omap3beagle -omap3touchbook -overo -am3517crane -devkit8000 -ldp -3430sdp Signed-off-by: Roger Quadros <rogerq@ti.com> Tested-by: Grazvydas Ignotas <notasas@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-08-19mtd: nand: Use ULL-suffix for big u64 constantGeert Uytterhoeven1-1/+1
drivers/mtd/nand/nand_timings.c:45: warning: integer constant is too large for ‘long’ type [ Editorial note: This is a false warning. Looking at ISO draft N1124 (this is approximately C11, the first PDF I had lying around), section 6.4.4.1 (statement 5): "The type of an integer constant is the first of the corresponding list in which its value can be represented." So this should not be an overflow, and any toolchain that says so (e.g., GCC 4.4) is buggy. -Brian ] Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-08-19mtd: atmel_nand: NFC: fix mtd_nandbiterrs.ko test fail when using sram writeWu, Josh1-8/+9
When enable NFC sram write, it will failed the mtd_nandbiterrs.ko test. As in driver's nfc_sram_write_page(), if ops->mode equal to MTD_OSP_RAW, driver assumes the data buffer contains one page data and one oob data followed. And driver will write the page data and oob data to nand. But this is wrong implementation. Since the data buffer don't contains the oob data to write. We should write the chip->oob_poi to nand's oob. So this patch fix it by writing the oob data from chip->oob_poi. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-08-19mtd: nand: fix integer widening problemsBrian Norris1-2/+2
chip->pagebuf is a 32-bit type (int), so the shift will only be applied as 32-bit. Fix this for 64-bit safety. Caught by Coverity. Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-08-19mtd: nandsim: fix integer wideningBrian Norris1-1/+1
This multiplication should be done in 64-bit, not 32-bit. Caught by Coverity. Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-08-19mtd: nand: denali: set proper error code on timeoutBrian Norris1-3/+1
The condition "if (irq_status == 0)" already ensures that one half of the ternary ?: is dead. I think this should probably actually be a FAIL, not a PASS. Caught by Coverity. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: Jamie Iles <jamie@jamieiles.com>
2014-08-19mtd: use __packed shorthandBrian Norris1-1/+1
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-08-19mtd: nand: fix nand_lock/unlock() functionWhite Ding1-0/+18
Do nand reset before write protect check. If we want to check the WP# low or high through STATUS READ and check bit 7, we must reset the device, other operation (eg.erase/program a locked block) can also clear the bit 7 of status register. As we know the status register can be refreshed, if we do some operation to trigger it, for example if we do erase/program operation to one block that is locked, then READ STATUS, the bit 7 of READ STATUS will be 0 indicate the device in write protect, then if we do erase/program operation to another block that is unlocked, the bit 7 of READ STATUS will be 1 indicate the device is not write protect. Suppose we checked the bit 7 of READ STATUS is 0 then judge the WP# is low (write protect), but in this case the WP# maybe high if we do erase/program operation to a locked block, so we must reset the device if we want to check the WP# low or high through STATUS READ and check bit 7. Signed-off-by: White Ding <bpqw@micron.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-08-19mtd: denali: avoid using a magic numberMasahiro Yamada1-1/+2
MAP10 command with '0x2000' data sets up a read-ahead/write access. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-08-19mtd: atmel_nand: remove redundant dev_err callWei Yongjun1-8/+1
There is a error message within devm_ioremap_resource already, so remove the dev_err call to avoid redundant error message. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-08-19mtd: atmel_nand: add pmecc support for 512, 1k, 4k, 8k page sizeWu, Josh1-5/+11
PMECC can support 512, 1k, 2k, 4k, 8k page size. The driver currently only support 2k page size nand flash. So this patch add support to 512, 1k, 4k and 8k page size nand flash. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-08-19mtd: atmel_nand: increase chip_delayRaphaël Poggi1-1/+1
Some nand with 8k page size like Micron MT29F32G08ABAAAWP need more than 20us. Signed-off-by: Raphaël Poggi <poggi.raph@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-08-19mtd: ndfc: silence an array underflow static checker warningDan Carpenter1-1/+2
We check "cs" for array overflows but we don't check for underflows and it upsets the static checkers. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-08-09Merge tag 'for-linus-20140808' of git://git.infradead.org/linux-mtdLinus Torvalds12-107/+443
Pull MTD updates from Brian Norris: "AMD-compatible CFI driver: - Support OTP programming for Micron M29EW family - Increase buffer write timeout, according to detected flash parameter info NAND - Add helpers for retrieving ONFI timing modes - GPMI: provide option to disable bad block marker swapping (required for Ka-On electronics platforms) SPI NOR - EON EN25QH128 support - Support new Flag Status Register (FSR) on a few Micron flash Common - New sysfs entries for bad block and ECC stats And a few miscellaneous refactorings, cleanups, and driver improvements" * tag 'for-linus-20140808' of git://git.infradead.org/linux-mtd: (31 commits) mtd: gpmi: make blockmark swapping optional mtd: gpmi: remove line breaks from error messages and improve wording mtd: gpmi: remove useless (void *) type casts and spaces between type casts and variables mtd: atmel_nand: NFC: support multiple interrupt handling mtd: atmel_nand: implement the nfc_device_ready() by checking the R/B bit mtd: atmel_nand: add NFC status error check mtd: atmel_nand: make ecc parameters same as definition mtd: nand: add ONFI timing mode to nand_timings converter mtd: nand: define struct nand_timings mtd: cfi_cmdset_0002: fix do_write_buffer() timeout error mtd: denali: use 8 bytes for READID command mtd/ftl: fix the double free of the buffers allocated in build_maps() mtd: phram: Fix whitespace issues mtd: spi-nor: add support for EON EN25QH128 mtd: cfi_cmdset_0002: Add support for locking OTP memory mtd: cfi_cmdset_0002: Add support for writing OTP memory mtd: cfi_cmdset_0002: Invalidate cache after entering/exiting OTP memory mtd: cfi_cmdset_0002: Add support for reading OTP mtd: spi-nor: add support for flag status register on Micron chips mtd: Account for BBT blocks when a partition is being allocated ...
2014-08-07Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds1-16/+13
Pull MIPS updates from Ralf Baechle: "This is the main pull request for 3.17. It contains: - misc Cavium Octeon, BCM47xx, BCM63xx and Alchemy updates - MIPS ptrace updates and cleanups - various fixes that will also go to -stable - a number of cleanups and small non-critical fixes. - NUMA support for the Loongson 3. - more support for MSA - support for MAAR - various FP enhancements and fixes" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (139 commits) MIPS: jz4740: remove unnecessary null test before debugfs_remove MIPS: Octeon: remove unnecessary null test before debugfs_remove_recursive MIPS: ZBOOT: implement stack protector in compressed boot phase MIPS: mipsreg: remove duplicate MIPS_CONF4_FTLBSETS_SHIFT MIPS: Bonito64: remove a duplicate define MIPS: Malta: initialise MAARs MIPS: Initialise MAARs MIPS: detect presence of MAARs MIPS: define MAAR register accessors & bits MIPS: mark MSA experimental MIPS: Don't build MSA support unless it can be used MIPS: consistently clear MSA flags when starting & copying threads MIPS: 16 byte align MSA vector context MIPS: disable preemption whilst initialising MSA MIPS: ensure MSA gets disabled during boot MIPS: fix read_msa_* & write_msa_* functions on non-MSA toolchains MIPS: fix MSA context for tasks which don't use FP first MIPS: init upper 64b of vector registers when MSA is first used MIPS: save/disable MSA in lose_fpu MIPS: preserve scalar FP CSR when switching vector context ...
2014-07-30MIPS: Alchemy: remove au_read/write/syncManuel Lauss1-11/+10
replace au_read/write/sync with __raw_read/write and wmb. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/7465/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-07-30MIPS: Alchemy: add helpers to access static memory ctrl registers.Manuel Lauss1-5/+3
This patch changes the static memory controller registers to offsets from base, prefixes them with AU1000_ to avoid silent failures due to changed addresses and introduces helpers to access them. No functional changes, comparing assembly of a few select functions shows no differences. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/7463/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-07-28mtd: gpmi: make blockmark swapping optionalLothar Waßmann1-19/+32
With a flash-based BBT there is no reason to move the Factory Bad Block Marker from the data area buffer (to where it is mapped by the GPMI NAND controller) to the OOB buffer. Thus, make this feature configurable via DT. This is required for the Ka-Ro electronics platforms. In the original code 'this->swap_block_mark' was synonymous with '!GPMI_IS_MX23()', so use the latter at the relevant places. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Acked-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-07-28mtd: gpmi: remove line breaks from error messages and improve wordingLothar Waßmann1-5/+5
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-07-28mtd: gpmi: remove useless (void *) type casts and spaces between type casts ↵Lothar Waßmann1-5/+5
and variables Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-07-22mtd: atmel_nand: NFC: support multiple interrupt handlingJosh Wu1-22/+62
Fix the following error, which sometimes happens during the NFC data transfer: atmel_nand 80000000.nand: Time out to wait for interrupt: 0x00010000 atmel_nand 80000000.nand: something wrong, No XFR_DONE interrupt comes. The root cause is that in the interrupt handler, we read the ISR but only handle one interrupt. If more than one interrupt arrive at the same time, then the second one will be lost. During the NFC data transfer. Two NFC interrupts (NFC_CMD_DONE and NFC_XFR_DONE) may come at the same time. NFC_CMD_DONE means NFC command is sent, and NFC_XFR_DONE means NFC data is transferred. This patch can handle multiple NFC interrupts at the same time. During the NFC data transfer, we need to wait for two NFC interrupts: NFC_CMD_DONE and NFC_XFR_DONE. Also we separate the completion initialization code to a nfc_prepare_interrupt(), which is paired with nfc_wait_interrupt(). We call nfc_prepare_interrupt() before sending out nfc commands, to make sure no interrupt lost. Reported-by: Matthieu CRAPET <Matthieu.CRAPET@ingenico.com> Tested-by: Matthieu Crapet <Matthieu.Crapet@ingenico.com> Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-07-22mtd: atmel_nand: implement the nfc_device_ready() by checking the R/B bitWu, Josh1-3/+11
In nfc_device_ready(), it's more reasonable to check R/B bit in NFC_SR than waiting for the R/B interrupt. It cost less time. Signed-off-by: Josh Wu <josh.wu@atmel.com> Tested-by: Matthieu Crapet <Matthieu.Crapet@ingenico.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-07-22mtd: atmel_nand: add NFC status error checkWu, Josh2-1/+27
Add a new function to read the NFC status. Meantime, this function will check if there is any errors in NFC. Signed-off-by: Josh Wu <josh.wu@atmel.com> Tested-by: Matthieu Crapet <Matthieu.Crapet@ingenico.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-07-22mtd: atmel_nand: make ecc parameters same as definitionBo Shen1-10/+10
If the ecc parameter is not the same as definition, when the mtd core check these parameters, it will give the error result. Take the following as an example: Calculate how many bits can be corrected in one page. According to the ecc parameters definition, one page correct bits = (mtd->writesize * ecc->strength) / ecc->size take the following use case as an example: mtd->writesize = 2048 bytes ecc->strength = 4 bytes (for 512 bytes) before this patch, the ecc->size = 2048, so the result is 4 bytes. after this patch, the ecc->size = 512, so the result is 16 bytes. So, align the ecc parameters the same as definition to correct this kind of error. Signed-off-by: Bo Shen <voice.shen@atmel.com> Acked-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-07-22mtd: nand: add ONFI timing mode to nand_timings converterBoris BREZILLON2-1/+254
Add a converter to retrieve NAND timings from an ONFI NAND timing mode. At the moment, only SDR NAND timings are supported. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-07-21Merge tag 'v3.16-rc6' into MTD development branchBrian Norris1-2/+4
Linux 3.16-rc6
2014-07-15mtd: denali: use 8 bytes for READID commandgrmoore@altera.com1-3/+3
The Denali NAND driver reads only 5 bytes of ID, but some Hynix and Samsung have size parameters in the 6th byte. As a result, the page and oob size for a Hynix H27UAG8T2B were calculated incorrectly and the driver failed to load. The solution is to read 8 bytes of ID, as expected by the NAND framework. Signed-off-by: Graham Moore <grmoore@altera.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-07-14mtd: nand: reduce the warning noise when the ECC is too weakThomas Petazzoni1-2/+4
In commit 67a9ad9b8a6f ("mtd: nand: Warn the user if the selected ECC strength is too weak"), a check was added to inform the user when the ECC used for a NAND device is weaker than the recommended ECC advertised by the NAND chip. However, the warning uses WARN_ON(), which has two undesirable side-effects: - It just prints to the kernel log the fact that there is a warning in this file, at this line, but it doesn't explain anything about the warning itself. - It dumps a stack trace which is very noisy, for something that the user is most likely not able to fix. If a certain ECC used by the kernel is weaker than the advertised one, it's most likely to make sure the kernel uses an ECC that is compatible with the one used by the bootloader, and changing the bootloader may not necessarily be easy. Therefore, normal users would not be able to do anything to fix this very noisy warning, and will have to suffer from it at every kernel boot. At least every time I see this stack trace in my kernel boot log, I wonder what new thing is broken, just to realize that it's once again this NAND ECC warning. Therefore, this commit turns: ------------[ cut here ]------------ WARNING: CPU: 0 PID: 1 at /home/thomas/projets/linux-2.6/drivers/mtd/nand/nand_base.c:4051 nand_scan_tail+0x538/0x780() Modules linked in: CPU: 0 PID: 1 Comm: swapper Not tainted 3.16.0-rc3-dirty #4 [<c000e3dc>] (unwind_backtrace) from [<c000bee4>] (show_stack+0x10/0x14) [<c000bee4>] (show_stack) from [<c0018180>] (warn_slowpath_common+0x6c/0x8c) [<c0018180>] (warn_slowpath_common) from [<c001823c>] (warn_slowpath_null+0x1c/0x24) [<c001823c>] (warn_slowpath_null) from [<c02c50cc>] (nand_scan_tail+0x538/0x780) [<c02c50cc>] (nand_scan_tail) from [<c0639f78>] (orion_nand_probe+0x224/0x2e4) [<c0639f78>] (orion_nand_probe) from [<c026da00>] (platform_drv_probe+0x18/0x4c) [<c026da00>] (platform_drv_probe) from [<c026c1f4>] (really_probe+0x80/0x218) [<c026c1f4>] (really_probe) from [<c026c47c>] (__driver_attach+0x98/0x9c) [<c026c47c>] (__driver_attach) from [<c026a8f0>] (bus_for_each_dev+0x64/0x94) [<c026a8f0>] (bus_for_each_dev) from [<c026bae4>] (bus_add_driver+0x144/0x1ec) [<c026bae4>] (bus_add_driver) from [<c026cb00>] (driver_register+0x78/0xf8) [<c026cb00>] (driver_register) from [<c026da5c>] (platform_driver_probe+0x20/0xb8) [<c026da5c>] (platform_driver_probe) from [<c00088b8>] (do_one_initcall+0x80/0x1d8) [<c00088b8>] (do_one_initcall) from [<c0620c9c>] (kernel_init_freeable+0xf4/0x1b4) [<c0620c9c>] (kernel_init_freeable) from [<c049a098>] (kernel_init+0x8/0xec) [<c049a098>] (kernel_init) from [<c00095f0>] (ret_from_fork+0x14/0x24) ---[ end trace 62f87d875aceccb4 ]--- Into the much shorter, and much more useful: nand: WARNING: MT29F2G08ABAEAWP: the ECC used on your system is too weak compared to the one required by the NAND chip Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-07-09mtd: Introduce mtd_block_isreserved()Ezequiel Garcia2-0/+32
In addition to mtd_block_isbad(), which checks if a block is bad or reserved, it's needed to check if a block is reserved only (but not bad). This commit adds an MTD interface for it, in a similar fashion to mtd_block_isbad(). While here, fix mtd_block_isbad() so the out-of-bounds checking is done before the callback check. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Pekon Gupta <pekon@ti.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-07-03mtd: bf5xx_nand: drop no-op PM supportBrian Norris1-24/+0
This driver's suspend/resume hooks are no-ops, so just remove them. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: Julia Lawall <Julia.Lawall@lip6.fr> Cc: Fabio Estevam <festevam@gmail.com> Cc: Dan Carpenter <dan.carpenter@oracle.com> Cc: Mike Frysinger <vapier.adi@gmail.com>
2014-07-03mtd: s3c2410: Move to clk_prepare_enable/clk_disable_unprepareVasily Khoruzhick1-2/+2
Use clk_prepare_enable/clk_disable_unprepare to make the driver work properly with common clock framework. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-07-02mtd: lpc32xx: drop bitflip_threshold initializationBrian Norris2-12/+0
These drivers don't need to explicitly initialize their bitflip thresholds. The comment is no longer correct, since nand_scan_tail() performs this initialization as of the following commit: commit ea3b2ea24ef0f2ef9c6795b19cff456195b6728a Author: Shmulik Ladkani <shmulik@jungo.com> Date: Fri Jun 8 18:29:06 2012 +0300 mtd: nand: initialize bitflip_threshold prior to BBT scanning (It seems there were some parallel efforts on writing/submitting these drivers, and Shmulik's bug fix.) Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: Roland Stigge <stigge@antcom.de>
2014-06-12Merge branch 'for-linus' of ↵Linus Torvalds1-2/+2
git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs Pull vfs updates from Al Viro: "This the bunch that sat in -next + lock_parent() fix. This is the minimal set; there's more pending stuff. In particular, I really hope to get acct.c fixes merged this cycle - we need that to deal sanely with delayed-mntput stuff. In the next pile, hopefully - that series is fairly short and localized (kernel/acct.c, fs/super.c and fs/namespace.c). In this pile: more iov_iter work. Most of prereqs for ->splice_write with sane locking order are there and Kent's dio rewrite would also fit nicely on top of this pile" * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs: (70 commits) lock_parent: don't step on stale ->d_parent of all-but-freed one kill generic_file_splice_write() ceph: switch to iter_file_splice_write() shmem: switch to iter_file_splice_write() nfs: switch to iter_splice_write_file() fs/splice.c: remove unneeded exports ocfs2: switch to iter_file_splice_write() ->splice_write() via ->write_iter() bio_vec-backed iov_iter optimize copy_page_{to,from}_iter() bury generic_file_aio_{read,write} lustre: get rid of messing with iovecs ceph: switch to ->write_iter() ceph_sync_direct_write: stop poking into iov_iter guts ceph_sync_read: stop poking into iov_iter guts new helper: copy_page_from_iter() fuse: switch to ->write_iter() btrfs: switch to ->write_iter() ocfs2: switch to ->write_iter() xfs: switch to ->write_iter() ...
2014-06-12Merge commit '9f12600fe425bc28f0ccba034a77783c09c15af4' into for-linusAl Viro1-0/+6
Backmerge of dcache.c changes from mainline. It's that, or complete rebase... Conflicts: fs/splice.c Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2014-05-29mtd: gpmi: add gpmi support for imx6sxHuang Shijie4-15/+28
The gpmi's IP for imx6sx is nearly the same as the gpmi's IP for imx6q, except the following two new features: (1) the new BCH contoller has 62-BIT correcting ECC strength (The BCH for imx6q only has 40-BIT ECC strength). (2) add the hardware Randomizer support. This patch does the follow changes: (1) add a new macro GPMI_IS_MX6SX to represent the imx6sx's gpmi. (2) add a new macro GPMI_IS_MX6. We use this macro to initialize the same registers for both imx6sx and imx6q, and so on. (3) add a new gpmi_devdata instance, the gpmi_devdata_imx6sx, for imx6sx. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-05-29mtd: bf5xx_nand: use the managed version of kzallocHimangi Saraogi1-9/+4
This patch moves data allocated using kzalloc to managed data allocated using devm_kzalloc and cleans now unnecessary kfrees in probe and remove functions. Also, the now unnecessary label out_err_hw_init is done away with and the label out_err_kzalloc is renamed to out_err. The following Coccinelle semantic patch was used for making the change: @platform@ identifier p, probefn, removefn; @@ struct platform_driver p = { .probe = probefn, .remove = removefn, }; @prb@ identifier platform.probefn, pdev; expression e, e1, e2; @@ probefn(struct platform_device *pdev, ...) { <+... - e = kzalloc(e1, e2) + e = devm_kzalloc(&pdev->dev, e1, e2) ... ?-kfree(e); ...+> } @rem depends on prb@ identifier platform.removefn; expression e; @@ removefn(...) { <... - kfree(e); ...> } Signed-off-by: Himangi Saraogi <himangi774@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-05-29mtd: pxa3xx_nand: make the driver work on big-endian systemsThomas Petazzoni1-2/+2
The pxa3xx_nand driver currently uses __raw_writel() and __raw_readl() to access I/O registers. However, those functions do not do any endianness swapping, which means that they won't work when the CPU runs in big-endian but the I/O registers are little endian, which is the common situation for ARM systems running big endian. Since __raw_writel() and __raw_readl() do not include any memory barriers and the pxa3xx_nand driver can only be compiled for ARM platforms, the closest I/o accessors functions that do endianess swapping are writel_relaxed() and readl_relaxed(). This patch has been verified to work on Armada XP GP: without the patch, the NAND is not detected when the kernel runs big endian while it is properly detected when the kernel runs little endian. With the patch applied, the NAND is properly detected in both situations (little and big endian). Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: <stable@vger.kernel.org> # v3.13+ Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-05-29mtd: nand: omap: fix omap_calculate_ecc_bch() for-loop errorTed Juan1-5/+5
Fixes: 2c9f2365d1e1d0e318b068f683f18c99515b80f8 mtd: nand: omap: ecc.calculate: merge omap3_calculate_ecc_bch4 in omap_calculate_ecc_bch Fixes: 7bcd1dca1d587ad29f9825ba4414620440e8c8da mtd: nand: omap: ecc.calculate: merge omap3_calculate_ecc_bch8 in omap_calculate_ecc_bch Cc: <stable@vger.kernel.org> # 3.13.x+ Signed-off-by: Ted Juan <ted.juan@gmail.com> Acked-by: Pekon Gupta <pekon@ti.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-05-28mtd: nand: r852: correct write_buf loop boundsBrian Norris1-2/+4
The two loops in r852_write_buf() are designed to handle 4-byte-aligned and then 1-byte-aligned portions, respectively. However, there are two issues: (1) The first loop will only terminate if 'len' is a multiple of 4 (2) The second loop will never terminate if it runs at least once Rewrite these loops as they were probably intended. Compile tested only. Issues pointed out by Coverity Scan. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: Maxim Levitsky <maximlevitsky@gmail.com>
2014-05-28mtd: nand_bbt: handle error case for nand_create_badblock_pattern()Brian Norris1-2/+6
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-05-28mtd: nand_bbt: remove unused variableBrian Norris1-4/+1
Set, but unused, variable. Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-05-21mtd: nand: pxa3xx: Use ECC strength and step size devicetree bindingEzequiel Garcia1-2/+15
This commit adds support for the user to specify the ECC strength and step size through the devicetree. We keep the previous behavior, when there is no DT parameter provided. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-05-21mtd: nand: pxa3xx: Clean pxa_ecc_init() error handlingEzequiel Garcia1-11/+10
Let's make pxa_ecc_init() return a negative errno on error or zero if succesful, which is standard kernel practice. Also, report the selected ECC strength and step size, which is important information. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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