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path: root/drivers/mtd/nand/lpc32xx_slc.c
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2015-10-20mtd: lpc32xx_slc: fix warnings caused by enabling unprepared clockVladimir Zapolskiy1-5/+5
If common clock framework is configured, the driver generates a warning, which is fixed by this change: WARNING: CPU: 0 PID: 1 at drivers/clk/clk.c:727 clk_core_enable+0x2c/0xa4() Modules linked in: CPU: 0 PID: 1 Comm: swapper Not tainted 4.3.0-rc2+ #201 Hardware name: LPC32XX SoC (Flattened Device Tree) Backtrace: [<>] (dump_backtrace) from [<>] (show_stack+0x18/0x1c) [<>] (show_stack) from [<>] (dump_stack+0x20/0x28) [<>] (dump_stack) from [<>] (warn_slowpath_common+0x90/0xb8) [<>] (warn_slowpath_common) from [<>] (warn_slowpath_null+0x24/0x2c) [<>] (warn_slowpath_null) from [<>] (clk_core_enable+0x2c/0xa4) [<>] (clk_core_enable) from [<>] (clk_enable+0x24/0x38) [<>] (clk_enable) from [<>] (lpc32xx_nand_probe+0x290/0x568) [<>] (lpc32xx_nand_probe) from [<>] (platform_drv_probe+0x50/0xa0) [<>] (platform_drv_probe) from [<>] (driver_probe_device+0x18c/0x408) [<>] (driver_probe_device) from [<>] (__driver_attach+0x70/0x94) [<>] (__driver_attach) from [<>] (bus_for_each_dev+0x74/0x98) [<>] (bus_for_each_dev) from [<>] (driver_attach+0x20/0x28) [<>] (driver_attach) from [<>] (bus_add_driver+0x11c/0x248) [<>] (bus_add_driver) from [<>] (driver_register+0xa4/0xe8) [<>] (driver_register) from [<>] (__platform_driver_register+0x50/0x64) [<>] (__platform_driver_register) from [<>] (lpc32xx_nand_driver_init+0x18/0x20) [<>] (lpc32xx_nand_driver_init) from [<>] (do_one_initcall+0x11c/0x1dc) [<>] (do_one_initcall) from [<>] (kernel_init_freeable+0x10c/0x1d4) [<>] (kernel_init_freeable) from [<>] (kernel_init+0x10/0xec) [<>] (kernel_init) from [<>] (ret_from_fork+0x14/0x24) Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-10-13mtd: nand: pass page number to ecc->write_xxx() methodsBoris BREZILLON1-2/+3
The ->read_xxx() methods are all passed the page number the NAND controller is supposed to read, but ->write_xxx() do not have such a parameter. This is a problem if we want to properly implement data scrambling/randomization in order to mitigate MLC sensibility to repeated pattern: to prevent bitflips in adjacent pages in the same block we need to avoid repeating the same pattern at the same offset in those pages, hence the randomizer/scrambler engine need to be passed the page value in order to adapt its seed accordingly. Moreover, adding the page parameter to the ->write_xxx() methods add some consistency to the current API. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Josh Wu <josh.wu@atmel.com> CC: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> CC: Maxime Ripard <maxime.ripard@free-electrons.com> CC: Greg Kroah-Hartman <gregkh@linuxfoundation.org> CC: Huang Shijie <shijie.huang@arm.com> CC: Stefan Agner <stefan@agner.ch> CC: devel@driverdev.osuosl.org CC: linux-arm-kernel@lists.infradead.org CC: linux-kernel@vger.kernel.org Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-10-05mtd: nand: lpc32xx_slc: fix calculation of timing arcs from given valuesVladimir Zapolskiy1-1/+1
According to LPC32xx User's Manual all values measured in clock cycles are programmable from 1 to 16 clocks (4 bits) starting from 0 in bitfield, the current version of calculated clock cycles is too conservative. Correctness of 0 bitfield value (i.e. programmed 1 clock timing) is proven with actual NAND chip devices. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-10-05mtd: nand: lpc32xx_slc: fix potential overflow over 4 bitsVladimir Zapolskiy1-1/+1
In case if quotient of controller clock rate to device clock rate does not fit into 4 bit value, choose the maximum acceptable value 0xF, which stands for 16 clocks. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-10-05mtd: nand: lpc32xx_slc: improve SLCTAC_*() macro definitionsVladimir Zapolskiy1-12/+15
No functional change, move bitfield calculations to macro definitions with added clock rate argument, which are in turn defined by new common SLCTAC_CLOCKS(c, n, s) macro definition. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-10-20mtd: nand: drop owner assignment from platform_driversWolfram Sang1-1/+0
A platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-07-02mtd: lpc32xx: drop bitflip_threshold initializationBrian Norris1-6/+0
These drivers don't need to explicitly initialize their bitflip thresholds. The comment is no longer correct, since nand_scan_tail() performs this initialization as of the following commit: commit ea3b2ea24ef0f2ef9c6795b19cff456195b6728a Author: Shmulik Ladkani <shmulik@jungo.com> Date: Fri Jun 8 18:29:06 2012 +0300 mtd: nand: initialize bitflip_threshold prior to BBT scanning (It seems there were some parallel efforts on writing/submitting these drivers, and Shmulik's bug fix.) Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: Roland Stigge <stigge@antcom.de>
2014-01-07mtd: lpc32xx_slc: Remove unnecessary OOM messagesJingoo Han1-7/+2
The site-specific OOM messages are unnecessary, because they duplicate the MM subsystem generic OOM message. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Acked-by: Roland Stigge <stigge@antcom.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-01-03mtd: lpc32xx_slc: Use devm_*() functionsJingoo Han1-7/+3
Use devm_*() functions to make cleanup paths simpler. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Acked-by: Roland Stigge <stigge@antcom.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: nand: lpc32xx_slc: Remove redundant of_match_ptrSachin Kamat1-1/+1
The data structure of_match_ptr() protects is always compiled in. Hence of_match_ptr() is not needed. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-10-28mtd: nand: lpc32xx_slc: don't call nand_default_bbt directlyBrian Norris1-8/+0
This driver is doing some strange logic here. If it doesn't have flash-based BBT enabled, it allows nand_scan_tail() to scan the BBT. But if it is using flash-based BBT, it tells nand_scan_tail() to skip scanning, then it immediately calls the default BBT scanning function itself. As I read it, this logic is equivalent to the default nand_scan_tail() behavior without interfering with NAND_SKIP_BBTSCAN or calling nand_default_bbt() directly at all. Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-08-31mtd: nand: use dev_get_platdata()Jingoo Han1-1/+1
Use the wrapper function for retrieving the platform data instead of accessing dev->platform_data directly. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-08-05mtd: nand: lpc32xx: remove unnecessary platform_set_drvdata()Jingoo Han1-2/+0
The driver core clears the driver data to NULL after device_release or on probe failure, since commit 0998d0631001288a5974afc0b2a5f568bcdecb4d (device-core: Ensure drvdata = NULL when no driver is bound). Thus, it is not needed to manually clear the device driver data to NULL. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Tested-by: Roland Stigge <stigge@antcom.de> Acked-by: Roland Stigge <stigge@antcom.de> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-01-26mtd: Convert to devm_ioremap_resource()Thierry Reding1-5/+3
Convert all uses of devm_request_and_ioremap() to the newly introduced devm_ioremap_resource() which provides more consistent error handling. devm_ioremap_resource() provides its own error messages so all explicit error messages can be removed from the failure code paths. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Cc: David Woodhouse <dwmw2@infradead.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-11-22mtd: remove use of __devexitBill Pemberton1-1/+1
CONFIG_HOTPLUG is going away as an option so __devexit is no longer needed. Signed-off-by: Bill Pemberton <wfp5p@virginia.edu> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-22mtd: remove use of __devinitBill Pemberton1-1/+1
CONFIG_HOTPLUG is going away as an option so __devinit is no longer needed. Signed-off-by: Bill Pemberton <wfp5p@virginia.edu> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-22mtd: remove use of __devexit_pBill Pemberton1-1/+1
CONFIG_HOTPLUG is going away as an option so __devexit_p is no longer needed. Signed-off-by: Bill Pemberton <wfp5p@virginia.edu> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-09-29mtd: lpc32xx_slc: Cleanup after DT-only conversionRoland Stigge1-31/+21
The LPC32xx's DT-only conversion of the SLC NAND driver makes NAND config via platform_data obsolete. Dropped by this patch. Further, the driver really needs CONFIG_OF, which is already reflected by the dependency on ARCH_LPC32XX which depends on CONFIG_OF. So also dropping CONFIG_OF ifdefs. There is still platform_data necessary to supply the dma_filter callback for the dma engine. This is a completely different data structure than the old platform_data for NAND config, so renaming some old "pdata" variable to "ncfg" to prevent confusion with the new platform data. Signed-off-by: Roland Stigge <stigge@antcom.de> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-09-29mtd: kill MTD_NAND_VERIFY_WRITEHuang Shijie1-19/+0
Just as Artem suggested: "Both UBI and JFFS2 are able to read verify what they wrote already. There are also MTD tests which do this verification. So I think there is no reason to keep this in the NAND layer, let alone wasting RAM in the driver to support this feature. Besides, it does not work for sub-pages and many drivers have it broken. It hurts more than it provides benefits." So kill MTD_NAND_VERIFY_WRITE entirely. Signed-off-by: Huang Shijie <shijie8@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-09-29mtd: lpc32xx_slc: Make driver independent of AMBA DMA engine driverRoland Stigge1-2/+11
This patch makes the SLC NAND driver independent of the single AMBA DMA engine driver by using the platform data provided dma_filter callback. Signed-off-by: Roland Stigge <stigge@antcom.de> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-13mtd: lpc32xx_slc: Adjust to pl08x DMA interface changesRoland Stigge1-12/+1
This patch adjusts the LPC32xx SLC NAND driver to the new pl08x DMA interface, fixing the compile error resulting from changed pl08x structures. Signed-off-by: Roland Stigge <stigge@antcom.de> Acked-By: Alexandre Pereira da Silva <aletes.xgr@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06mtd: lpc32xx_slc: Make probe() return -EPROBE_DEFER if necessaryRoland Stigge1-0/+2
Via of_get_named_gpio(), wp_gpio can become -EPROBE_DEFER which now makes probe() return -EPROBE_DEFER as well to wait until the gpio controller is probed before trying to probe lpc32xx_slc again. Signed-off-by: Roland Stigge <stigge@antcom.de> Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06mtd: lpc32xx_slc: Use of_get_named_gpio()Roland Stigge1-1/+1
This patch makes the lpc32xx_slc driver use of_get_named_gpio() instead of of_get_named_gpio_flags() whose flags are discarded anyway. Signed-off-by: Roland Stigge <stigge@antcom.de> Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-07-06mtd: lpc32xx_slc: Make wp gpio optionalAlexandre Pereira da Silva1-4/+7
This patch supports missing wp gpio. Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com> Signed-off-by: Roland Stigge <stigge@antcom.de> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-07-06mtd: add LPC32xx SLC NAND driverRoland Stigge1-0/+1065
This patch adds support for the SLC NAND controller inside the LPC32xx SoC. [dwmw2: 21st century pedantry] Signed-off-by: Roland Stigge <stigge@antcom.de> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>