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path: root/drivers/mtd/nand/denali_pci.c
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2017-06-20mtd: nand: denali: avoid magic numbers and rename for clarificationMasahiro Yamada1-8/+8
Introduce some macros and helpers to avoid magic numbers and rename macros/functions for clarification. - We see '| 2' in several places. This means Data Cycle in MAP11 mode. The Denali User's Guide says bit[1:0] of MAP11 is like follows: b'00 = Command Cycle b'01 = Address Cycle b'10 = Data Cycle So, this commit added DENALI_MAP11_{CMD,ADDR,DATA} macros. - We see 'denali->flash_mem + 0x10' in several places, but 0x10 is a magic number. Actually, this accesses the data port of the Host Data/Command Interface. So, this commit added DENALI_HOST_DATA. On the other hand, 'denali->flash_mem' gets access to the address port, so DENALI_HOST_ADDR was also added. - We see 'index_addr(denali, cmd, 0x1)' in denali_erase(), but 0x1 is a magic number. 0x1 means the erase operation. Replace 0x1 with DENALI_ERASE. - Rename index_addr() to denali_host_write() for clarification - Denali User's Guide says MAP{00,01,10,11} for access mode. Match the macros with terminology in the IP document. - Rename struct members as follows: flash_bank -> active_bank (currently selected bank) flash_reg -> reg (base address of registers) flash_mem -> host (base address of host interface) devnum -> devs_per_cs (devices connected in parallel) bbtskipbytes -> oob_skip_bytes (number of bytes to skip in OOB) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-06-20mtd: nand: denali: handle timing parameters by setup_data_interface()Masahiro Yamada1-2/+4
Handling timing parameters in a driver's own way should be avoided because it duplicates efforts of drivers/mtd/nand/nand_timings.c Besides, this driver hard-codes Intel specific parameters such as CLK_X=5, CLK_MULTI=4. Taking a certain device (Samsung K9WAG08U1A) into account by get_samsung_nand_para() is weird as well. Now, the core framework provides .setup_data_interface() hook, which handles timing parameters in a generic manner. While I am working on this, I found even more issues in the current code, so fixed the following as well: - In recent IP versions, WE_2_RE and TWHR2 share the same register. Likewise for ADDR_2_DATA and TCWAW, CS_SETUP_CNT and TWB. When updating one, the other must be masked. Otherwise, the other will be set to 0, then timing settings will be broken. - The recent IP release expanded the ADDR_2_DATA to 7-bit wide. This register is related to tADL. As commit 74a332e78e8f ("mtd: nand: timings: Fix tADL_min for ONFI 4.0 chips") addressed, the ONFi 4.0 increased the minimum of tADL to 400 nsec. This may not fit in the 6-bit ADDR_2_DATA in older versions. Check the IP revision and handle this correctly, otherwise the register value would wrap around. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-06-10mtd: nand: denali: avoid hard-coding ECC step, strength, bytesMasahiro Yamada1-0/+4
This driver was originally written for the Intel MRST platform with several platform-specific parameters hard-coded. Currently, the ECC settings are hard-coded as follows: #define ECC_SECTOR_SIZE 512 #define ECC_8BITS 14 #define ECC_15BITS 26 Therefore, the driver can only support two cases. - ecc.size = 512, ecc.strength = 8 --> ecc.bytes = 14 - ecc.size = 512, ecc.strength = 15 --> ecc.bytes = 26 However, these are actually customizable parameters, for example, UniPhier platform supports the following: - ecc.size = 1024, ecc.strength = 8 --> ecc.bytes = 14 - ecc.size = 1024, ecc.strength = 16 --> ecc.bytes = 28 - ecc.size = 1024, ecc.strength = 24 --> ecc.bytes = 42 So, we need to handle the ECC parameters in a more generic manner. Fortunately, the Denali User's Guide explains how to calculate the ecc.bytes. The formula is: ecc.bytes = 2 * CEIL(13 * ecc.strength / 16) (for ecc.size = 512) ecc.bytes = 2 * CEIL(14 * ecc.strength / 16) (for ecc.size = 1024) For DT platforms, it would be reasonable to allow DT to specify ECC strength by either "nand-ecc-strength" or "nand-ecc-maximize". If none of them is specified, the driver will try to meet the chip's ECC requirement. For PCI platforms, the max ECC strength is used to keep the original behavior. Newer versions of this IP need ecc.size and ecc.steps explicitly set up via the following registers: CFG_DATA_BLOCK_SIZE (0x6b0) CFG_LAST_DATA_BLOCK_SIZE (0x6c0) CFG_NUM_DATA_BLOCKS (0x6d0) For older IP versions, write accesses to these registers are just ignored. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-11-19mtd: nand: denali: remove unneeded <linux/slab.h> includesMasahiro Yamada1-1/+0
The driver calls devm_kzalloc()/devm_kfree() to allocate/free memory. They are declared in <linux/device.h>, not in <linux/slab.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2015-08-19mtd: denali_pci: switch to dev_err()Andy Shevchenko1-4/+4
It is better to have device name prefixed the actual error message. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-08-19mtd: denali_pci: refactor driver using devres APIAndy Shevchenko1-17/+6
In recent kernels we have a lot of helper functions, including devres API, to make life of device driver developer easy. Convert the driver using devm_kzalloc() and pcim_enable_device(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-08-19mtd: denali_pci: use module_pci_driver() macroAndy Shevchenko1-11/+1
Let's use module_pci_driver() macro to reduce code base of the driver. There is no functional change. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-01-09mtd: denali: Drop print of build date/timeJosh Triplett1-1/+0
The kernel already has this information, and individual drivers shouldn't duplicate that. This also eliminates the use of __DATE__ and __TIME__, which make the build non-deterministic. Signed-off-by: Josh Triplett <josh@joshtriplett.org> Reviewed-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-01-03mtd: denali: remove DEFINE_PCI_DEVICE_TABLE macroJingoo Han1-1/+1
Don't use DEFINE_PCI_DEVICE_TABLE macro, because this macro is not preferred. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: denali: remove unnecessary pci_set_drvdata()Jingoo Han1-1/+0
The driver core clears the driver data to NULL after device_release or on probe failure. Thus, it is not needed to manually clear the device driver data to NULL. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2012-11-22mtd: remove use of __devexitBill Pemberton1-1/+1
CONFIG_HOTPLUG is going away as an option so __devexit is no longer needed. Signed-off-by: Bill Pemberton <wfp5p@virginia.edu> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-22mtd: remove use of __devinitBill Pemberton1-1/+1
CONFIG_HOTPLUG is going away as an option so __devinit is no longer needed. Signed-off-by: Bill Pemberton <wfp5p@virginia.edu> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-15mtd: denali: split the generic driver and PCI layerDinh Nguyen1-0/+144
The Denali controller can also be found in SoC devices attached to a simple bus. Move the PCI specific parts into denali_pci so that we can add a denali_dt that uses the same driver but for a device tree driver instead of a PCI based device. Signed-off-by: Jamie Iles <jamie@jamieiles.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>