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path: root/drivers/mmc/host/sdhci_am654.c
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2020-07-13mmc: sdhci_am654: Add support for clkbuf_sel propertyFaiz Abbas1-0/+11
Add support for writing new clkbuf_sel property for the J721e 4 bit IP. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Link: https://lore.kernel.org/r/20200619125801.9530-7-faiz_abbas@ti.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-07-13mmc: sdhci_am654: Update delay chain configurationFaiz Abbas1-1/+9
For speed modes where DLL is not enabled write to TXDLYCLK to enable transmitter delay chain mode. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Link: https://lore.kernel.org/r/20200619125801.9530-6-faiz_abbas@ti.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-07-13mmc: sdhci_am654: Fix conditions for enabling dllFaiz Abbas1-22/+20
The clock > CLOCK_TOO_SLOW_HZ condition gating phy configuration is only required because dll should not be enabled at too low a clock frequency or too low timing. Make sure that this condition only gates dll enablement. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Link: https://lore.kernel.org/r/20200619125801.9530-5-faiz_abbas@ti.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-07-13mmc: sdhci_am654: Add Support for SR2.0Faiz Abbas1-1/+22
Add Support for AM65x PG2.0. Use the SoC bus framework to fixup the driver data and skip do DLL calibration if the revision is 1.0 Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Link: https://lore.kernel.org/r/20200619125801.9530-4-faiz_abbas@ti.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-07-13mmc: sdhci_am654: Add flag for PHY calibrationFaiz Abbas1-3/+5
Not all controllers need calibration for the PHY DLL. Add a DLL_CALIB flag to indicate the same. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Link: https://lore.kernel.org/r/20200619125801.9530-3-faiz_abbas@ti.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-03-24mmc: sdhci: am654: Use sdhci_set_power_and_voltage()Nicolas Saenz Julienne1-14/+3
The sdhci core provides a helper function with the same functionality as this controller's set_power() callback. Use it instead. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20200306174413.20634-8-nsaenzjulienne@suse.de Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-03-24mmc: sdhci_am654: Enable DLL only for some speed modesFaiz Abbas1-60/+68
Its recommended that DLL must only be enabled for SDR50, DDR50, DDR52, SDR104, HS200 and HS400 speed modes. Move DLL configuration to its own function and call it only in the above speed modes. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20200108150920.14547-4-faiz_abbas@ti.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-03-24mmc: sdhci_am654: Update OTAPDLY writesFaiz Abbas1-18/+105
According to the latest AM65x Data Manual[1], a different output tap delay value is optimum for a given speed mode. Therefore, deprecate the ti,otap-del-sel binding and introduce a new binding for each of the possible MMC/SD speed modes. If the legacy mode is not found, fall back to old binding to maintain dts compatibility. [1] http://www.ti.com/lit/gpn/am6526 Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20200108150920.14547-3-faiz_abbas@ti.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-01-16Merge branch 'fixes' into nextUlf Hansson1-19/+35
2020-01-16mmc: sdhci_am654: Fix Command Queuing in AM65xFaiz Abbas1-13/+14
Command Queuing was enabled completely for J721e controllers which lead to partial enablement even for Am65x. Complete CQ implementation for AM65x by adding the irq callback. Fixes: f545702b74f9 ("mmc: sdhci_am654: Add Support for Command Queuing Engine to J721E") Cc: stable@vger.kernel.org Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20200108143301.1929-4-faiz_abbas@ti.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-01-16mmc: sdhci_am654: Reset Command and Data line after tuningFaiz Abbas1-0/+18
The tuning data is leftover in the buffer after tuning. This can cause issues in future data commands, especially with CQHCI. Reset the command and data lines after tuning to continue from a clean state. Fixes: 41fd4caeb00b ("mmc: sdhci_am654: Add Initial Support for AM654 SDHCI driver") Cc: stable@vger.kernel.org Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20200108143301.1929-3-faiz_abbas@ti.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-01-16mmc: sdhci_am654: Remove Inverted Write Protect flagFaiz Abbas1-6/+3
The MMC/SD controllers on am65x and j721e don't in fact detect the write protect line as inverted. No issues were detected because of this because the sdwp line is not connected on any of the evms. Fix this by removing the flag. Fixes: 1accbced1c32 ("mmc: sdhci_am654: Add Support for 4 bit IP on J721E") Cc: stable@vger.kernel.org Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20200108143301.1929-2-faiz_abbas@ti.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-12-18mmc: sdhci_am654: convert to devm_platform_ioremap_resourceYangtao Li1-3/+1
Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> Link: https://lore.kernel.org/r/20191215175120.3290-8-tiny.windzz@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-11-20mmc: sdhci_am654: Add Support for Command Queuing Engine to J721EFaiz Abbas1-1/+70
Add Support for CQHCI (Command Queuing Host Controller Interface) for each of the host controllers present in TI's J721E devices. Add cqhci_ops and a .irq() callback to handle cqhci specific interrupts. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-07-10mmc: sdhci_am654: Make some symbols staticYueHaibing1-3/+4
Fix sparse warnings: drivers/mmc/host/sdhci_am654.c:192:6: warning: symbol 'sdhci_j721e_4bit_set_clock' was not declared. Should it be static? drivers/mmc/host/sdhci_am654.c:261:18: warning: symbol 'sdhci_j721e_8bit_ops' was not declared. Should it be static? drivers/mmc/host/sdhci_am654.c:284:18: warning: symbol 'sdhci_j721e_4bit_ops' was not declared. Should it be static? Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-06-17mmc: sdhci_am654: Add Support for 4 bit IP on J721EFaiz Abbas1-38/+86
Add support for 4 bit instances on TI's J721E devices. Because these instances have no DLL, introduce a DLL_PRESENT flag and make sure DLL related registers are only accessed when it is present. Also add a separate set_clock callback for this compatible. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-06-17mmc: sdhci_am654: Add Support for 8 bit IP on J721EFaiz Abbas1-25/+110
The 8 bit IP on the TI's J721E device departs from the AM654x IP in some ways which require special handling. Create a driver_data structure which holds the pltfm_data and a flags field which is used to indicate these differences. These are the following: 1. The pins are not muxed with anything else inside the SoC and hence the IOMUX_ENABLE field does not exist. Add a flag which is used to indicate the presence of the field. 2. The register field used to select DLL frequency is 3 bit wide as compared to 2 bits in AM65x. Add another flag which differentiates between 3 bit and 2 bit fields. 3. The strobe select field is 8 bit wide as compared to 4 bits for AM65x. Add yet another flag to indicate this difference. Strobe select is used only for HS400 speed mode, support for which has not yet been added in AM65x. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-06-10mmc: sdhci_am654: Print error message if the DLL fails to lockFaiz Abbas1-0/+5
Print an error message and return if DLL fails to lock. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-06-10mmc: sdhci_am654: Improve whitespace utilisation with regmap_*() callsFaiz Abbas1-21/+13
Line wrapping with the regmap_*() functions is way more conservative than required by the 80 character rule. Expand the function calls out to use less number of lines. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-06-03mmc: sdhci_am654: Fix SLOTTYPE writeFaiz Abbas1-1/+1
In the call to regmap_update_bits() for SLOTTYPE, the mask and value fields are exchanged. Fix this. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Fixes: 41fd4caeb00b ("mmc: sdhci_am654: Add Initial Support for AM654 SDHCI driver") Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-04-15mmc: sdhci_am654: Clear HISPD_ENA in some lower speed modesFaiz Abbas1-0/+22
According to the AM654x Data Manual[1], the setup timing in lower speed modes can only be met if the controller uses a falling edge data launch. To ensure this, the HIGH_SPEED_ENA (HOST_CONTROL[2]) bit should be cleared in default speed, SD high speed, MMC high speed, SDR12 and SDR25 speed modes. Use the sdhci writeb callback to implement this condition. [1] http://www.ti.com/lit/gpn/am6546 Section 5.10.5.16.1 Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-02-25mmc: sdhci_am654: Make symbol 'sdhci_am654_ops' staticWei Yongjun1-1/+1
Fixes the following sparse warning: drivers/mmc/host/sdhci_am654.c:161:18: warning: symbol 'sdhci_am654_ops' was not declared. Should it be static? Fixes: aff88ff23512 ("mmc: sdhci_am654: Add Initial Support for AM654 SDHCI driver") Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-12-17mmc: sdhci_am654: Add Initial Support for AM654 SDHCI driverFaiz Abbas1-0/+374
The host controllers on TI's AM654 SOCs are not compatible with the phy and consumer model of the sdhci-of-arasan driver. It turns out that for optimal operation at higher speeds, a special tuning procedure needs to be implemented which involves configuration of platform specific phy registers. Therefore, branch out to a new sdhci_am654 driver and add the phy register space with all phy configurations to it. Populate AM654 specific callbacks to sdhci_ops and add SDHCI_QUIRKS wherever applicable. Only add support for upto High Speed for SD card and upto DDR52 speed mode for eMMC. Higher speeds will be added in subsequent patches. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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