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path: root/drivers/mmc/host/sdhci-pci-core.c
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2018-04-11mmc: sdhci-pci: Only do AMD tuning for HS200Daniel Kurtz1-2/+23
Commit c31165d7400b ("mmc: sdhci-pci: Add support for HS200 tuning mode on AMD, eMMC-4.5.1") added a HS200 tuning method for use with AMD SDHCI controllers. As described in the commit subject, this tuning is specific for HS200. However, as implemented, this method is used for all host timings, because platform_execute_tuning, if it exists, is called unconditionally by sdhci_execute_tuning(). This breaks tuning when using the AMD controller with, for example, a DDR50 SD card. Instead, we can implement an amd execute_tuning wrapper callback, and then conditionally do the HS200 specific tuning for HS200, and otherwise call back to the standard sdhci_execute_tuning(). Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> Acked-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Fixes: c31165d7400b ("mmc: sdhci-pci: Add support for HS200 tuning mode on AMD, eMMC-4.5.1") Cc: stable@vger.kernel.org # v4.11+ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-03-05mmc: sdhci-pci: Respect PM flags when enabling card detect GPIO IRQ wakeupAdrian Hunter1-4/+19
Commit 03dbaa04a2e5 ("mmc: slot-gpio: Add support to enable irq wake on cd_irq") enabled wakeup at initialization. However, users also want to control it from sysfs power/wakeup attribute. That means the driver needs to check the PM flags before enabling it in the suspend callback. Add support for that in sdhci-pci, which is the only driver presently using the MMC_CAP_CD_WAKE flag, and remove the enabling in mmc_gpiod_request_cd_irq() Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-03-05mmc: sdhci-pci: Get rid of glk_cqe_enable()Adrian Hunter1-19/+1
Now that tuning no longer leaves the Buffer Read Enable bit set (refer intel_execute_tuning()), glk_cqe_enable() is no longer needed. Get rid of it. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-02-27mmc: sdhci-pci: Fix S0i3 for Intel BYT-based controllersAdrian Hunter1-4/+31
Tuning can leave the IP in an active state (Buffer Read Enable bit set) which prevents the entry to low power states (i.e. S0i3). Data reset will clear it. Generally tuning is followed by a data transfer which will anyway sort out the state, so it is rare that S0i3 is actually prevented. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-01-17mmc: sdhci-pci: Use device wakeup capability to determine ↵Adrian Hunter1-4/+7
MMC_PM_WAKE_SDIO_IRQ capability PCI and ACPI determine if a device is wakeup capable, so use that to determine the MMC_PM_WAKE_SDIO_IRQ capability correctly. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-01-17mmc: sdhci-pci: Stop calling sdhci_enable_irq_wakeups()Adrian Hunter1-37/+21
sdhci_enable_irq_wakeups() is already called by sdhci_suspend_host() so sdhci-pci should not need to call it. However sdhci_suspend_host() only calls it if wakeups are enabled, and sdhci-pci does not enable them until after calling sdhci_suspend_host(). So move the calls to sdhci_pci_init_wakeup() before calling sdhci_suspend_host(), and stop calling sdhci_enable_irq_wakeups(). That results in some simplification because sdhci_pci_suspend_host() and __sdhci_pci_suspend_host() no longer need to be separate functions. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-01-11sdhci: Advertise 2.0v supply on SDIO host controllerAndy Shevchenko1-0/+2
On Intel Edison the Broadcom Wi-Fi card, which is connected to SDIO, requires 2.0v, while the host, according to Intel Merrifield TRM, supports 1.8v supply only. The card announces itself as mmc2: new ultra high speed DDR50 SDIO card at address 0001 Introduce a custom OCR mask for SDIO host controller on Intel Merrifield and add a special case to sdhci_set_power_noreg() to override 2.0v supply by enforcing 1.8v power choice. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-01-04mmc:host:sdhci-pci:Addition of Arasan PCI Controller with integrated phy.Atul Garg1-2/+2
The Arasan Controller is based on a FPGA platform and has integrated phy with specific registers used during initialization and management of different modes. The phy and the controller are integrated and registers are very specific to Arasan. Arasan being an IP provider, licenses these IPs to various companies for integration of IP in custom SOCs. The custom SOCs define own register map depending on how bits are tied inside the SOC for phy registers, depending on SOC memory plan and hence will require own platform drivers. If more details on phy registers are required, an interface document is hosted at https://arasan.com/NF/eMMC5.1 PHY Programming in Linux.pdf. Signed-off-by: Atul Garg <agarg@arasan.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-12-11mmc: sdhci-pci: Add CQHCI support for Intel GLKAdrian Hunter1-1/+154
Add CQHCI initialization and implement CQHCI operations for Intel GLK. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-30mmc: sdhci-pci: Tidy o2micro definitionsAdrian Hunter1-10/+0
We keep PCI Ids in sdhci-pci.h and the O2-specific definitions belong in sdhci-pci-o2micro.c. Move those definitions accordingly. Remove unused O2 definitions in sdhci-pci-core.c. The 3 o2micro external function declarations might as well be in sdhci-pci.h as well, so move them there and get rid of sdhci-pci-o2micro.h entirely. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-10-30mmc: sdhci-pci: Add support for Intel CDFAdrian Hunter1-0/+1
Add PCI Id for Intel CDF. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-10-10mmc: sdhci-pci: Fix default d3_retune for Intel host controllersAdrian Hunter1-0/+2
The default for d3_retune is true, but that was not being set in all cases, which results in eMMC errors because re-tuning has not been done. Fix by initializing d3_retune to true. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Fixes: c959a6b00ff5 ("mmc: sdhci-pci: Don't re-tune with runtime pm for some Intel devices") Cc: stable@vger.kernel.org # v4.12+ Reported-and-tested-by: ojab <ojab@ojab.ru> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-09-22mmc: sdhci-pci: Fix voltage switch for some Intel host controllersAdrian Hunter1-0/+15
Some Intel host controllers (e.g. CNP) use an ACPI device-specific method to ensure correct voltage switching. Fix voltage switch for those, by adding a call to the DSM. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-08-30mmc: sdhci-pci: use generic sdhci_set_bus_width()Michał Mirosław1-27/+3
Now that sdhci_set_bus_width() supports 8-bit bus widths based on the MMC_CAP_8_BIT_DATA capability flag, replace the sdhci-pci version with the generic sdhci version. Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-08-30sdhci: pci: Fix up power if device has ACPI companionAndy Shevchenko1-0/+20
Fix up a power state in case PCI device has an ACPI companion. Do it only for Intel Merrifield for now. This is almost copy'n'paste of part of sdhci_acpi_probe() and might be split out to a helper function in the future. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-07-04Merge tag 'mmc-v4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmcLinus Torvalds1-552/+116
Pull MMC updates from Ulf Hansson: "MMC core: - Add support to enable irq wake for slot gpio - Remove MMC_CAP2_HC_ERASE_SZ and make it the default behaviour - Improve R1 response error checks for stop commands - Cleanup and clarify some MMC specific code - Keep card runtime resumed while adding SDIO function devices - Use device_property_read instead of of_property_read in mmc_of_parse() - Move boot partition locking into a driver op to enable proper I/O scheduling - Move multi/single-ioctl() to use block layer to enable proper I/O scheduling - Delete bounce buffer Kconfig option - Improve the eMMC HW reset support provided via the eMMC pwrseq - Add host API to manage SDIO IRQs from a workqueue MMC host: - dw_mmc: Drop support for multiple slots - dw_mmc: Use device_property_read instead of of_property_read - dw_mmc-rockchip: Optional improved tuning to greatly decrease tuning time - dw_mmc: Prevent rpm suspend for SDIO IRQs instead of always for SDIO cards - dw_mmc: Convert to use MMC_CAP2_SDIO_IRQ_NOTHREAD for SDIO IRQs - omap_hsmmc: Convert to mmc regulator APIs to consolidate code - omap_hsmmc: Deprecate "vmmc_aux" in DT and use "vqmmc" instead - tmio: make sure SDIO gets reinitialized after resume - sdhi: add CMD23 support to R-Car Gen2 & Gen3 - tmio: add CMD23 support - sdhi/tmio: Refactor code and rename files to simplify Kconfig options - sdhci-pci: Enable card detect wake for Intel BYT-related SD controllers - sdhci-pci: Add support for Intel CNP - sdhci-esdhc-imx: Remove ENGcm07207 workaround - allow multi block transfers - sdhci-esdhc-imx: Allow all supported prescaler values - sdhci-esdhc-imx: Fix DAT line software reset - sdhci-esdhc: Add SDHCI_QUIRK_32BIT_DMA_ADDR - atmel-mci: Drop AVR32 support" * tag 'mmc-v4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (86 commits) mmc: dw_mmc: remove the unnecessary slot variable mmc: dw_mmc: use the 'slot' instead of 'cur_slot' mmc: dw_mmc: remove the 'id' arguments about functions relevant to slot mmc: dw_mmc: change the array of slots mmc: dw_mmc: remove the loop about finding slots mmc: dw_mmc: deprecated the "num-slots" property mmc: dw_mmc-rockchip: parse rockchip, desired-num-phases from DT dt-bindings: rockchip-dw-mshc: add optional rockchip, desired-num-phases mmc: renesas-sdhi: improve checkpatch cleanness mmc: tmio: improve checkpatch cleanness mmc: sdhci-pci: Enable card detect wake for Intel BYT-related SD controllers mmc: slot-gpio: Add support to enable irq wake on cd_irq mmc: core: Remove MMC_CAP2_HC_ERASE_SZ mmc: core: for data errors, take response of stop cmd into account mmc: core: check also R1 response for stop commands mmc: core: Clarify code for sending CSD mmc: core: Drop mmc_all_send_cid() and use mmc_send_cxd_native() instead mmc: core: Re-factor code for sending CID mmc: core: Remove redundant code in mmc_send_cid() mmc: core: Make mmc_can_reset() static ...
2017-06-20mmc: sdhci-pci: Enable card detect wake for Intel BYT-related SD controllersAdrian Hunter1-1/+1
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-06-20mmc: core: Remove MMC_CAP2_HC_ERASE_SZUlf Hansson1-3/+1
The MMC_CAP2_HC_ERASE_SZ is used only by a few mmc host drivers. Its intent is to enable eMMC's high-capacity erase size, as to improve the behaviour of the erase operations. We should strive to avoid software configuration options that aren't necessary, but instead deploy common behaviours. For these reasons, let's remove the capability bit for MMC_CAP2_HC_ERASE_SZ and make it the default behaviour. Note that this change doesn't affect eMMCs supporting trim/discard, because these commands operates on sectors and takes precedence over erase commands. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com> Tested-by: Shawn Lin <shawn.lin@rock-chips.com>
2017-06-20mmc: sdhci-pci: Add support for Intel CNPAdrian Hunter1-1/+45
Add PCI ids and enhanced strobe support for Intel CNP. This is combined with GLK due to the pending CMDQ support which they both share. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-06-20mmc: sdhci-pci: Use macros in pci_ids definitionMatthias Kraemer1-548/+70
This patch applies customized PCI_DEVICE_ macros to specify the pci_ids instead of open-coding them within the sdhci-pci driver. By introducing device specific macros the pci_ids table becomes much shorter and easier to comprehend than it would be possible using the generic version of the PCI_DEVICE_ macros. Signed-off-by: Matthias Kraemer <matthiasmartinsson@gmail.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-06-20mmc: sdhci-pci: make guid intel_dsm_guid staticColin Ian King1-1/+1
The guid intel_dsm_guid does not need to be in global scope, so make it static. Signed-off-by: Colin Ian King <colin.king@canonical.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Christoph Hellwig <hch@lst.de>
2017-06-07ACPI: Switch to use generic guid_t in acpi_evaluate_dsm()Andy Shevchenko1-5/+4
acpi_evaluate_dsm() and friends take a pointer to a raw buffer of 16 bytes. Instead we convert them to use guid_t type. At the same time we convert current users. acpi_str_to_uuid() becomes useless after the conversion and it's safe to get rid of it. Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Cc: Borislav Petkov <bp@suse.de> Acked-by: Dan Williams <dan.j.williams@intel.com> Cc: Amir Goldstein <amir73il@gmail.com> Reviewed-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Acked-by: Jani Nikula <jani.nikula@intel.com> Cc: Ben Skeggs <bskeggs@redhat.com> Acked-by: Benjamin Tissoires <benjamin.tissoires@redhat.com> Acked-by: Joerg Roedel <jroedel@suse.de> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Cc: Yisen Zhuang <yisen.zhuang@huawei.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Felipe Balbi <felipe.balbi@linux.intel.com> Acked-by: Mathias Nyman <mathias.nyman@linux.intel.com> Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Acked-by: Mark Brown <broonie@kernel.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Christoph Hellwig <hch@lst.de>
2017-04-24mmc: sdhci-pci: Allow for 3 bytes from Intel DSMAdrian Hunter1-6/+6
The DSM used by some Intel controllers can return a 3 byte package. Allow for that by using memcpy to copy the bytes. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-04-24mmc: sdhci-pci: Set MMC_CAP_AGGRESSIVE_PM for BYT-related Intel controllersAzhar Shaikh1-4/+3
Set MMC_CAP_AGGRESSIVE_PM for BYT-related Intel SD card controllers. Signed-off-by: Azhar Shaikh <azhar.shaikh@intel.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-04-24mmc: sdhci-pci: Move a function to avoid later forward declarationAdrian Hunter1-38/+38
Move a function to avoid having to forward declare it in a subsequent patch. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2017-04-24mmc: sdhci-pci: Add runtime suspend/resume callbacksAdrian Hunter1-40/+58
Add runtime suspend/resume callbacks to match suspend/resume callbacks. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2017-04-24mmc: sdhci-pci: Let suspend/resume callbacks replace default callbacksAdrian Hunter1-71/+99
The suspend / resume callbacks lack the flexibility to allow a device to specify a different function entirely. Change them around so that device functions are called directly and they in turn can call the default implementations if needed. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2017-04-24mmc: sdhci-pci: Conditionally compile pm sleep functionsAdrian Hunter1-0/+10
It is confusing to have some parts of suspend / resume under conditional compilation and some parts not. Use conditional compilation everywhere. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2017-04-24mmc: sdhci-pci: Do not use suspend/resume callbacks with runtime pmAdrian Hunter1-12/+0
Do not use suspend/resume callbacks with runtime pm. It doesn't make sense and isn't being used, so remove. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2017-04-24mmc: sdhci-pci: Let devices define how to add the hostAdrian Hunter1-1/+4
SDHCI provides more flexibility than simply calling sdhci_add_host(). Make that available by allowing devices to specify their own ->add_host() function. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2017-04-24mmc: sdhci: Do not use spin lock in set_ios pathsAdrian Hunter1-4/+0
The spin lock is not necessary in set_ios. Anything that is racing with changes to the I/O state is already broken. The mmc core already provides synchronization via "claiming" the host. So remove spin_lock and friends from sdhci_set_ios and related callbacks. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2017-04-24mmc: sdhci: Remove ->select_drive_strength() callbackAdrian Hunter1-20/+0
Drivers can use the host operation directly, so remove this now unused callback. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2017-04-24mmc: sdhci-pci: Use ACPI DSM to get driver strength for some Intel devicesAdrian Hunter1-63/+14
Make use of an Intel ACPI _DSM that provides eMMC driver strength. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2017-04-24mmc: sdhci-pci: Don't re-tune with runtime pm for some Intel devicesAdrian Hunter1-0/+90
Make use of an Intel ACPI _DSM that indicates if re-tuning is needed after D3. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2017-04-24mmc: sdhci-pci: Let devices define their own private dataAdrian Hunter1-1/+2
Let devices define their own private data to facilitate device-specific operations. The size of the private structure is specified in the sdhci_pci_fixes structure, then sdhci_pci_probe_slot() will allocate extra space for it, and sdhci_pci_priv() can be used to get a reference to it. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2017-04-24mmc: sdhci: Let drivers decide whether to use mmc_retune_needed() with pmAdrian Hunter1-4/+18
Devices might save and restore tuning values so that re-tuning might not be needed after a pm transition. Let drivers decide by pushing the mmc_retune_needed() logic down to them. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2017-03-23mmc: sdhci-pci: Do not disable interrupts in sdhci_intel_set_powerAdrian Hunter1-0/+4
Disabling interrupts for even a millisecond can cause problems for some devices. That can happen when Intel host controllers wait for the present state to propagate. The spin lock is not necessary here. Anything that is racing with changes to the I/O state is already broken. The mmc core already provides synchronization via "claiming" the host. Although the spin lock probably should be removed from the code paths that lead to this point, such a patch would touch too much code to be suitable for stable trees. Consequently, for this patch, just drop the spin lock while waiting. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org # v4.9+ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2017-02-13mmc: sdhci-pci: Add support for HS200 tuning mode on AMD, eMMC-4.5.1Shyam Sundar S K1-3/+91
This patch adds support for HS200 tuning mode on AMD eMMC-4.5.1 Reviewed-by: Sen, Pankaj <Pankaj.Sen@amd.com> Reviewed-by: Shah, Nehal-bakulchandra <Nehal-bakulchandra.Shah@amd.com> Reviewed-by: Agrawal, Nitesh-kumar <Nitesh-kumar.Agrawal@amd.com> Signed-off-by: S-k, Shyam-sundar <Shyam-sundar.S-k@amd.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-02-13mmc: sdhci-pci: Remove unused member cd_con_idAndy Shevchenko1-2/+1
cd_con_id is not used and always NULL. Remove it to make code a bit more cleaner. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-12-05mmc: sdhci-pci: Use ACPI to get max frequency for Intel NI byt sdioZach Brown1-0/+32
On NI 9037 boards the max SDIO frequency is limited by trace lengths and other layout choices. The max SDIO frequency is stored in an ACPI table. The driver reads the ACPI entry MXFQ during sdio_probe_slot and sets the f_max field of the host. Signed-off-by: Nathan Sullivan <nathan.sullivan@ni.com> Reviewed-by: Jaeden Amero <jaeden.amero@ni.com> Reviewed-by: Josh Cartwright <joshc@ni.com> Signed-off-by: Zach Brown <zach.brown@ni.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-12-05mmc: sdhci-pci: Add PCI ID for Intel NI byt sdioZach Brown1-0/+24
Add PCI ID for Intel byt sdio host controller sub-vended by NI. The controller has different behavior because of the board layout NI puts it on. Signed-off-by: Zach Brown <zach.brown@ni.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-11-29mmc: sdhci-pci: Allow deferred probe for sd card detect gpioDavid E. Box1-5/+10
With commit f35bbf61ab77 ("gpio / ACPI: Return -EPROBE_DEFER if the gpiochip was not found"), a gpio descriptor request can now be deferred if the providing gpio host controller driver hasn't been loaded yet. Allow use in mmc slot probe in order to prevent card detect gpio setup from failing in this case. Signed-off-by: David E. Box <david.e.box@linux.intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-11-29mmc: sdhci-pci: Add support for Intel GLKAdrian Hunter1-1/+26
Add support for eMMC/SD/SDIO Intel GLK host controllers. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-10-10mmc: sdhci-pci: Fix bus power failing to enable for some Intel controllersAdrian Hunter1-0/+50
Some Intel controllers (e.g. BXT) might fail to set bus power after a D3 -> D0 transition due to the present state not yet having propagated. Retry for up to 2 milliseconds. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-10-10mmc: sdhci-pci: Let devices define their own sdhci_opsAdrian Hunter1-1/+3
Let devices define their own sdhci_ops so that device-specific variations can be implemented without adding quirks. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-09-26mmc: sdhci-pci: Set MMC_CAP_CMD_DURING_TFR for Intel eMMC controllersAdrian Hunter1-0/+1
Set MMC_CAP_CMD_DURING_TFR for Intel BYT and related eMMC host controllers. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-09-26sdhci-pci: enable SD card interface on MerrifieldAndy Shevchenko1-1/+4
Intel Merrifield provides an interface to an external SD card. Enable it here. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-09-26sdhci-pci: enable SDIO interface on Intel MerrifieldAndy Shevchenko1-0/+5
Intel Merrifield is known to have an SDIO interface and on Intel Edison board a WiFi card is wired to it. Enable the interface here to allow WiFi card enumeration. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-09-26sdhci-pci: refactor intel_mrfld_mmc_probe_slot()Andy Shevchenko1-6/+11
Refactor intel_mrfld_mmc_probe_slot() to use switch case. The change allows to add a support for SD and SDIO interfaces without any pain. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-09-26mmc: sdhci-pci: Convert to use managed functions (part2)Andy Shevchenko1-28/+6
The commit 52ac7acf412b ("mmc: sdhci-pci: Convert to use managed functions pcim_* and devm_*") converted ->probe() / ->remove() functions to use device managed resource API. Here is a follow up to cover sdhci_pci_probe_slot() and sdhci_pci_remove_slot(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
generated by cgit v1.2.3 (git 2.39.0) at 2024-12-29 01:27:52 +0300