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2019-05-02iommu/amd: Fix IOMMU page flush when detach device from a domainSuravee Suthikulpanit1-4/+11
commit 9825bd94e3a2baae1f4874767ae3a7d4c049720e upstream. When a VM is terminated, the VFIO driver detaches all pass-through devices from VFIO domain by clearing domain id and page table root pointer from each device table entry (DTE), and then invalidates the DTE. Then, the VFIO driver unmap pages and invalidate IOMMU pages. Currently, the IOMMU driver keeps track of which IOMMU and how many devices are attached to the domain. When invalidate IOMMU pages, the driver checks if the IOMMU is still attached to the domain before issuing the invalidate page command. However, since VFIO has already detached all devices from the domain, the subsequent INVALIDATE_IOMMU_PAGES commands are being skipped as there is no IOMMU attached to the domain. This results in data corruption and could cause the PCI device to end up in indeterministic state. Fix this by invalidate IOMMU pages when detach a device, and before decrementing the per-domain device reference counts. Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com> Suggested-by: Joerg Roedel <joro@8bytes.org> Co-developed-by: Brijesh Singh <brijesh.singh@amd.com> Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Fixes: 6de8ad9b9ee0 ('x86/amd-iommu: Make iommu_flush_pages aware of multiple IOMMUs') Signed-off-by: Joerg Roedel <jroedel@suse.de> [bwh: Backported to 3.16: adjust context] Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
2018-01-01iommu/amd: Finish TLB flush in amd_iommu_unmap()Joerg Roedel1-0/+1
commit ce76353f169a6471542d999baf3d29b121dce9c0 upstream. The function only sends the flush command to the IOMMU(s), but does not wait for its completion when it returns. Fix that. Fixes: 601367d76bd1 ('x86/amd-iommu: Remove iommu_flush_domain function') Signed-off-by: Joerg Roedel <jroedel@suse.de> Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
2017-03-16iommu/amd: Fix the left value check of cmd bufferHuang Rui1-1/+1
commit 432abf68a79332282329286d190e21fe3ac02a31 upstream. The generic command buffer entry is 128 bits (16 bytes), so the offset of tail and head pointer should be 16 bytes aligned and increased with 0x10 per command. When cmd buf is full, head = (tail + 0x10) % CMD_BUFFER_SIZE. So when left space of cmd buf should be able to store only two command, we should be issued one COMPLETE_WAIT additionally to wait all older commands completed. Then the left space should be increased after IOMMU fetching from cmd buf. So left check value should be left <= 0x20 (two commands). Signed-off-by: Huang Rui <ray.huang@amd.com> Fixes: ac0ea6e92b222 ('x86/amd-iommu: Improve handling of full command buffer') Signed-off-by: Joerg Roedel <jroedel@suse.de> Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
2017-02-23iommu/amd: Free domain id when free a domain of struct dma_ops_domainBaoquan He1-0/+3
commit c3db901c54466a9c135d1e6e95fec452e8a42666 upstream. The current code missed freeing domain id when free a domain of struct dma_ops_domain. Signed-off-by: Baoquan He <bhe@redhat.com> Fixes: ec487d1a110a ('x86, AMD IOMMU: add domain allocation and deallocation functions') Signed-off-by: Joerg Roedel <jroedel@suse.de> Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
2015-11-16iommu/amd: Don't clear DTE flags when modifying itJoerg Roedel1-2/+2
commit cbf3ccd09d683abf1cacd36e3640872ee912d99b upstream. During device assignment/deassignment the flags in the DTE get lost, which might cause spurious faults, for example when the device tries to access the system management range. Fix this by not clearing the flags with the rest of the DTE. Reported-by: G. Richard Bellamy <rbellamy@pteradigm.com> Tested-by: G. Richard Bellamy <rbellamy@pteradigm.com> Signed-off-by: Joerg Roedel <jroedel@suse.de> Signed-off-by: Luis Henriques <luis.henriques@canonical.com>
2015-07-15iommu/amd: Handle large pages correctly in free_pagetableJoerg Roedel1-0/+6
commit 0b3fff54bc01e8e6064d222a33e6fa7adabd94cd upstream. Make sure that we are skipping over large PTEs while walking the page-table tree. Fixes: 5c34c403b723 ("iommu/amd: Fix memory leak in free_pagetable") Signed-off-by: Joerg Roedel <jroedel@suse.de> Signed-off-by: Luis Henriques <luis.henriques@canonical.com>
2014-09-17iommu/amd: Fix cleanup_domain for mass device removalJoerg Roedel1-4/+6
commit 9b29d3c6510407d91786c1cf9183ff4debb3473a upstream. When multiple devices are detached in __detach_device, they are also removed from the domains dev_list. This makes it unsafe to use list_for_each_entry_safe, as the next pointer might also not be in the list anymore after __detach_device returns. So just repeatedly remove the first element of the list until it is empty. Tested-by: Marti Raudsepp <marti@juffo.org> Signed-off-by: Joerg Roedel <jroedel@suse.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-05-30iommu/amd: Fix recently introduced compile warningsJoerg Roedel1-2/+0
Fix two compile warnings about unused variables introduced by commit ecef115. Reported-by: Paul Bolle <pebolle@tiscali.nl> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2014-05-26iommu/amd: Remove duplicate checking codeVaughan Cao1-6/+0
amd_iommu_rlookup_table[devid] != NULL is already guaranteed by check_device called before, it's fine to attach device at this point. Signed-off-by: Vaughan Cao <vaughan.cao@oracle.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2014-05-13iommu/amd: Fix interrupt remapping for aliased devicesAlex Williamson1-1/+1
An apparent cut and paste error prevents the correct flags from being set on the alias device resulting in MSI on conventional PCI devices failing to work. This also produces error events from the IOMMU like: AMD-Vi: Event logged [INVALID_DEVICE_REQUEST device=00:14.4 address=0x000000fdf8000000 flags=0x0a00] Where 14.4 is a PCIe-to-PCI bridge with a device behind it trying to use MSI interrupts. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Cc: stable@vger.kernel.org Signed-off-by: Joerg Roedel <joro@8bytes.org>
2014-03-24iommu/amd: Fix logic to determine and checking max PASIDSuravee Suthikulpanit1-2/+2
In reality, the spec can only support 16-bit PASID since INVALIDATE_IOTLB_PAGES and COMPLETE_PPR_REQUEST commands only allow 16-bit PASID. So, we updated the PASID_MASK accordingly and invoke BUG_ON if the hardware is reporting PASmax more than 16-bit. Besides, max PASID is defined as ((2^(PASmax+1)) - 1). The current does not determine this correctly. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Tested-by: Jay Cornwall <Jay.Cornwall@amd.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
2014-03-04iommu/amd: Fix PASID format in INVALIDATE_IOTLB_PAGES commandJay Cornwall1-2/+2
This patch corrects the PASID format in the INVALIDATE_IOTLB_PAGES command, which was caused by incorrect information in the AMD IOMMU Architectural Specification v2.01 document. Incorrect format: cmd->data[0][16:23] = PASID[7:0] cmd->data[1][16:27] = PASID[19:8] Correct format: cmd->data[0][16:23] = PASID[15:8] cmd->data[1][16:23] = PASID[7:0] However, this does not affect the IOMMUv2 hardware implementation, and has been corrected since version 2.02 of the specification (available through AMD NDA). Signed-off-by: Jay Cornwall <jay.cornwall@amd.com> Reviewed-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
2014-01-07iommu/amd: Use dev_is_pci() to check whether it is pci deviceYijing Wang1-2/+2
Use PCI standard marco dev_is_pci() instead of directly compare pci_bus_type to check whether it is pci device. Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
2013-08-15iommu/amd: Fix resource leak in iommu_init_device()Radmila Kompová1-1/+3
Detected by cppcheck. Signed-off-by: Kamil Dudka <kdudka@redhat.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
2013-06-26Merge branches 'x86/vt-d', 'arm/omap', 'core', 'x86/amd' and 'arm/smmu' into ↵Joerg Roedel1-25/+54
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2013-06-23iommu/amd: Only unmap large pages from the first pteAlex Williamson1-1/+5
If we use a large mapping, the expectation is that only unmaps from the first pte in the superpage are supported. Unmaps from offsets into the superpage should fail (ie. return zero sized unmap). In the current code, unmapping from an offset clears the size of the full mapping starting from an offset. For instance, if we map a 16k physically contiguous range at IOVA 0x0 with a large page, then attempt to unmap 4k at offset 12k, 4 ptes are cleared (12k - 28k) and the unmap returns 16k unmapped. This potentially incorrectly clears valid mappings and confuses drivers like VFIO that use the unmap size to release pinned pages. Fix by refusing to unmap from offsets into the page. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Cc: stable@vger.kernel.org Signed-off-by: Joerg Roedel <joro@8bytes.org>
2013-06-21iommu/amd: Fix memory leak in free_pagetableJoerg Roedel1-24/+49
The IOMMU pagetables can have up to 6 levels, but the code in free_pagetable() only releases the first 3 levels. Fix this leak by releasing all levels. Reported-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Joerg Roedel <joro@8bytes.org> Reviewed-by: Alex Williamson <alex.williamson@redhat.com>
2013-06-20iommu/{vt-d,amd}: Remove multifunction assumption around groupingAlex Williamson1-6/+19
If a device is multifunction and does not have ACS enabled then we assume that the entire package lacks ACS and use function 0 as the base of the group. The PCIe spec however states that components are permitted to implement ACS on some, none, or all of their applicable functions. It's therefore conceivable that function 0 may be fully independent and support ACS while other functions do not. Instead use the lowest function of the slot that does not have ACS enabled as the base of the group. This may be the current device, which is intentional. So long as we use a consistent algorithm, all the non-ACS functions will be grouped together and ACS functions will get separate groups. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
2013-05-07Merge tag 'iommu-updates-v3.10' of ↵Linus Torvalds1-81/+64
git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu Pull IOMMU updates from Joerg Roedel: "The updates are mostly about the x86 IOMMUs this time. Exceptions are the groundwork for the PAMU IOMMU from Freescale (for a PPC platform) and an extension to the IOMMU group interface. On the x86 side this includes a workaround for VT-d to disable interrupt remapping on broken chipsets. On the AMD-Vi side the most important new feature is a kernel command-line interface to override broken information in IVRS ACPI tables and get interrupt remapping working this way. Besides that there are small fixes all over the place." * tag 'iommu-updates-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (24 commits) iommu/tegra: Fix printk formats for dma_addr_t iommu: Add a function to find an iommu group by id iommu/vt-d: Remove warning for HPET scope type iommu: Move swap_pci_ref function to drivers/iommu/pci.h. iommu/vt-d: Disable translation if already enabled iommu/amd: fix error return code in early_amd_iommu_init() iommu/AMD: Per-thread IOMMU Interrupt Handling iommu: Include linux/err.h iommu/amd: Workaround for ERBT1312 iommu/amd: Document ivrs_ioapic and ivrs_hpet parameters iommu/amd: Don't report firmware bugs with cmd-line ivrs overrides iommu/amd: Add ioapic and hpet ivrs override iommu/amd: Add early maps for ioapic and hpet iommu/amd: Extend IVRS special device data structure iommu/amd: Move add_special_device() to __init iommu: Fix compile warnings with forward declarations iommu/amd: Properly initialize irq-table lock iommu/amd: Use AMD specific data structure for irq remapping iommu/amd: Remove map_sg_no_iommu() iommu/vt-d: add quirk for broken interrupt remapping on 55XX chipsets ...
2013-05-02Merge branches 'iommu/fixes', 'x86/vt-d', 'x86/amd', 'ppc/pamu', 'core' and ↵Joerg Roedel1-93/+74
'arm/tegra' into next
2013-04-29Merge tag 'pci-v3.10-changes' of ↵Linus Torvalds1-7/+7
git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI updates from Bjorn Helgaas: "PCI changes for the v3.10 merge window: PCI device hotplug - Remove ACPI PCI subdrivers (Jiang Liu, Myron Stowe) - Make acpiphp builtin only, not modular (Jiang Liu) - Add acpiphp mutual exclusion (Jiang Liu) Power management - Skip "PME enabled/disabled" messages when not supported (Rafael Wysocki) - Fix fallback to PCI_D0 (Rafael Wysocki) Miscellaneous - Factor quirk_io_region (Yinghai Lu) - Cache MSI capability offsets & cleanup (Gavin Shan, Bjorn Helgaas) - Clean up EISA resource initialization and logging (Bjorn Helgaas) - Fix prototype warnings (Andy Shevchenko, Bjorn Helgaas) - MIPS: Initialize of_node before scanning bus (Gabor Juhos) - Fix pcibios_get_phb_of_node() declaration "weak" annotation (Gabor Juhos) - Add MSI INTX_DISABLE quirks for AR8161/AR8162/etc (Xiong Huang) - Fix aer_inject return values (Prarit Bhargava) - Remove PME/ACPI dependency (Andrew Murray) - Use shared PCI_BUS_NUM() and PCI_DEVID() (Shuah Khan)" * tag 'pci-v3.10-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (63 commits) vfio-pci: Use cached MSI/MSI-X capabilities vfio-pci: Use PCI_MSIX_TABLE_BIR, not PCI_MSIX_FLAGS_BIRMASK PCI: Remove "extern" from function declarations PCI: Use PCI_MSIX_TABLE_BIR, not PCI_MSIX_FLAGS_BIRMASK PCI: Drop msi_mask_reg() and remove drivers/pci/msi.h PCI: Use msix_table_size() directly, drop multi_msix_capable() PCI: Drop msix_table_offset_reg() and msix_pba_offset_reg() macros PCI: Drop is_64bit_address() and is_mask_bit_support() macros PCI: Drop msi_data_reg() macro PCI: Drop msi_lower_address_reg() and msi_upper_address_reg() macros PCI: Drop msi_control_reg() macro and use PCI_MSI_FLAGS directly PCI: Use cached MSI/MSI-X offsets from dev, not from msi_desc PCI: Clean up MSI/MSI-X capability #defines PCI: Use cached MSI-X cap while enabling MSI-X PCI: Use cached MSI cap while enabling MSI interrupts PCI: Remove MSI/MSI-X cap check in pci_msi_check_device() PCI: Cache MSI/MSI-X capability offsets in struct pci_dev PCI: Use u8, not int, for PM capability offset [SCSI] megaraid_sas: Use correct #define for MSI-X capability PCI: Remove "extern" from function declarations ...
2013-04-23iommu: Move swap_pci_ref function to drivers/iommu/pci.h.Varun Sethi1-6/+1
The swap_pci_ref function is used by the IOMMU API code for swapping pci device pointers, while determining the iommu group for the device. Currently this function was being implemented for different IOMMU drivers. This patch moves the function to a new file, drivers/iommu/pci.h so that the implementation can be shared across various IOMMU drivers. Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
2013-04-23iommu/AMD: Per-thread IOMMU Interrupt HandlingSuravee Suthikulpanit1-49/+33
In the current interrupt handling scheme, there are as many threads as the number of IOMMUs. Each thread is created and assigned to an IOMMU at the time of registering interrupt handlers (request_threaded_irq). When an IOMMU HW generates an interrupt, the irq handler (top half) wakes up the corresponding thread to process event and PPR logs of all IOMMUs starting from the 1st IOMMU. In the system with multiple IOMMU,this handling scheme complicates the synchronization of the IOMMU data structures and status registers as there could be multiple threads competing for the same IOMMU while the other IOMMU could be left unhandled. To simplify, this patch is proposing a different interrupt handling scheme by having each thread only managing interrupts of the corresponding IOMMU. This can be achieved by passing the struct amd_iommu when registering the interrupt handlers. This structure is unique for each IOMMU and can be used by the bottom half thread to identify the IOMMU to be handled instead of calling for_each_iommu. Besides this also eliminate the needs to lock the IOMMU for processing event and PPR logs. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
2013-04-19iommu/amd: Workaround for ERBT1312Joerg Roedel1-8/+26
Work around an IOMMU hardware bug where clearing the EVT_INT or PPR_INT bit in the status register may race with the hardware trying to set it again. When not handled the bit might not be cleared and we lose all future event or ppr interrupts. Reported-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Joerg Roedel <joro@8bytes.org>
2013-04-18iommu/amd: Properly initialize irq-table lockJoerg Roedel1-0/+3
Fixes a lockdep warning. Cc: stable@vger.kernel.org # >= v3.7 Reviewed-by: Shuah Khan <shuahkhan@gmail.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
2013-04-18iommu/amd: Use AMD specific data structure for irq remappingJoerg Roedel1-27/+27
For compatibility reasons the irq remapping code for the AMD IOMMU used the same per-irq data structure as the Intel implementation. Now that support for the AMD specific data structure is upstream we can use this one instead. Reviewed-by: Shuah Khan <shuahkhan@gmail.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
2013-04-18iommu/amd: Remove map_sg_no_iommu()Joerg Roedel1-21/+1
This function was intended as a fall-back if the map_sg function is called for a device not mapped by the IOMMU. Since the AMD IOMMU driver uses per-device dma_ops this can never happen. So this function isn't needed anymore. Reviewed-by: Shuah Khan <shuahkhan@gmail.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
2013-04-02iommu/fsl: Make iova dma_addr_t in the iommu_iova_to_phys API.Varun Sethi1-1/+1
This is required in case of PAMU, as it can support a window size of up to 64G (even on 32bit). Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
2013-04-02iommu/amd: Re-enable IOMMU event log interrupt after handling.Suravee Suthikulpanit1-0/+3
Current driver does not clear the IOMMU event log interrupt bit in the IOMMU status register after processing an interrupt. This causes the IOMMU hardware to generate event log interrupt only once. This has been observed in both IOMMU v1 and V2 hardware. This patch clears the bit by writing 1 to bit 1 of the IOMMU status register (MMIO Offset 2020h) Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
2013-03-27iommu/amd: Make sure dma_ops are set for hotplug devicesJoerg Roedel1-12/+10
There is a bug introduced with commit 27c2127 that causes devices which are hot unplugged and then hot-replugged to not have per-device dma_ops set. This causes these devices to not function correctly. Fixed with this patch. Cc: stable@vger.kernel.org Reported-by: Andreas Degert <andreas.degert@googlemail.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
2013-03-27iommu/amd: Remove calc_devid() and use PCI_DEVID() from PCIShuah Khan1-1/+1
Change to remove calc_devid() and use PCI_DEVID() from PCI instead. Signed-off-by: Shuah Khan <shuah.khan@hp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Joerg Roedel <joro@8bytes.org>
2013-03-27iommu/amd: Remove local PCI_BUS() define and use PCI_BUS_NUM() from PCIShuah Khan1-6/+6
Change to remove local PCI_BUS() define and use the new PCI_BUS_NUM() interface from PCI. Signed-off-by: Shuah Khan <shuah.khan@hp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Joerg Roedel <joro@8bytes.org>
2013-02-26Merge tag 'iommu-updates-v3.9' of ↵Linus Torvalds1-2/+1
git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu Pull IOMMU Updates from Joerg Roedel: "Besides some fixes and cleanups in the code there are three more important changes to point out this time: * New IOMMU driver for the ARM SHMOBILE platform * An IOMMU-API extension for non-paging IOMMUs (required for upcoming PAMU driver) * Rework of the way the Tegra IOMMU driver accesses its registetrs - register windows are easier to extend now. There are also a few changes to non-iommu code, but that is acked by the respective maintainers." * tag 'iommu-updates-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (23 commits) iommu/tegra: assume CONFIG_OF in SMMU driver iommu/tegra: assume CONFIG_OF in gart driver iommu/amd: Remove redundant NULL check before dma_ops_domain_free(). iommu/amd: Initialize device table after dma_ops iommu/vt-d: Zero out allocated memory in dmar_enable_qi iommu/tegra: smmu: Fix incorrect mask for regbase iommu/exynos: Make exynos_sysmmu_disable static ARM: mach-shmobile: r8a7740: Add IPMMU device ARM: mach-shmobile: sh73a0: Add IPMMU device ARM: mach-shmobile: sh7372: Add IPMMU device iommu/shmobile: Add iommu driver for Renesas IPMMU modules iommu: Add DOMAIN_ATTR_WINDOWS domain attribute iommu: Add domain window handling functions iommu: Implement DOMAIN_ATTR_PAGING attribute iommu: Check for valid pgsize_bitmap in iommu_map/unmap iommu: Make sure DOMAIN_ATTR_MAX is really the maximum iommu/tegra: smmu: Change SMMU's dependency on ARCH_TEGRA iommu/tegra: smmu: Use helper function to check for valid register offset iommu/tegra: smmu: Support variable MMIO ranges/blocks iommu/tegra: Add missing spinlock initialization ...
2013-02-13iommu/amd: Remove redundant NULL check before dma_ops_domain_free().Cyril Roelandt1-2/+1
dma_ops_domain_free on a NULL pointer is a no-op, so the NULL check in amd_iommu_init_dma_ops() can be removed. Signed-off-by: Cyril Roelandt <tipecaml@gmail.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
2013-01-28x86, io-apic: Move CONFIG_IRQ_REMAP code out of x86 coreJoerg Roedel1-4/+4
Move all the code to either to the header file asm/irq_remapping.h or to drivers/iommu/. Signed-off-by: Joerg Roedel <joro@8bytes.org> Acked-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc> Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2012-12-02iommu/amd: Remove obsolete commentJoerg Roedel1-10/+0
The AMD IOMMU driver only uses the page-sizes it gets from IOMMU core and uses the appropriate page-size. So this comment is not necessary. Signed-off-by: Joerg Roedel <joro@8bytes.org>
2012-12-02iommu/amd: Don't use 512GB pagesJoerg Roedel1-1/+3
There is a bug in the hardware that will be triggered when this page size is used. Make sure this does not happen. Signed-off-by: Joerg Roedel <joro@8bytes.org>
2012-10-24iommu/amd: Properly account for virtual aliases in IOMMU groupsAlex Williamson1-5/+56
An alias doesn't always point to a physical device. When this happens we must first verify that the IOMMU group isn't rooted in a device above the alias. In this case the alias is effectively just another quirk for the devices aliased to it. Alternatively, the virtual alias itself may be the root of the IOMMU group. To support this, allow a group to be hosted on the alias dev_data for use by anything that might have the same alias. Signed-off-by: Alex williamson <alex.williamson@redhat.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-10-24iommu/amd: Split IOMMU group allocation and attachAlex Williamson1-11/+19
Add a WARN_ON to make it clear why we don't add dma_pdev->dev to the group we're allocating. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-10-24iommu/amd: Split upstream bus device lookupAlex Williamson1-9/+15
Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-10-24iommu/amd: Split IOMMU Group topology walkAlex Williamson1-25/+33
Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-10-24iommu/amd: Split IOMMU group initializationAlex Williamson1-18/+43
This needs to be broken apart, start with pulling all the IOMMU group init code into a new function. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-10-02Merge branches 'dma-debug', 'iommu/fixes', 'arm/tegra', 'arm/exynos', ↵Joerg Roedel1-5/+509
'x86/amd', 'x86/vt-d' and 'x86/amd-irq-remapping' into next Conflicts: drivers/iommu/amd_iommu_init.c
2012-10-02iommu/amd: Remove obsolete comment lineJoerg Roedel1-1/+0
IRQ_DELAYED_DISABLE does not exist anymore. So this comment is obsolete. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-10-02iommu/amd: Fix possible use after free in get_irq_table()Dan Carpenter1-0/+1
We should return NULL on error instead of the freed pointer. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-09-28iommu/amd: Report irq remapping through IOMMU-APIJoerg Roedel1-0/+2
Report the availability of irq remapping through the IOMMU-API to allow KVM device passthrough again without additional module parameter overrides. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-09-28iommu/amd: Add initialization routines for AMD interrupt remappingJoerg Roedel1-0/+16
Add the six routines required to setup interrupt remapping with the AMD IOMMU. Also put it all together into the AMD specific irq_remap_ops. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-09-28iommu/amd: Add call-back routine for HPET MSIJoerg Roedel1-0/+26
Add a routine to setup a HPET MSI interrupt for remapping. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-09-28iommu/amd: Implement MSI routines for interrupt remappingJoerg Roedel1-0/+74
Add routines to setup interrupt remapping for MSI interrupts. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-09-28iommu/amd: Add IOAPIC remapping routinesJoerg Roedel1-0/+126
Add the routine to setup interrupt remapping for ioapic interrupts. Also add a routine to change the affinity of an irq and to free an irq allocation for interrupt remapping. The last two functions will also be used for MSI interrupts. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-27 02:57:29 +0300