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2025-02-08iio: adc: ad4130: Add filter_type attributesMarcelo Schmitt1-0/+7
Make filter control also available through filter_type attributes which are now standardized in main IIO ABI documentation. Suggested-by: David Lechner <dlechner@baylibre.com> Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Reviewed-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/61a87b288552cad9e925a9af4eb33022d14a4617.1738680728.git.marcelo.schmitt@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-02-08iio: adc: ad7124: Really disable all channels at probe timeUwe Kleine-König1-5/+3
If one or more of the 16 channels are enabled and the driver is not aware of that, unexpected things happen because different channels are used than intended. To prevent that, all channels should be disabled at probe time. In Commit 4be339af334c ("iio: adc: ad7124: Disable all channels at probe time") I intended do that, however only the channels that are potentially used by the driver and not all channels are disabled since then. So disable all 16 channels and not only the used ones. Also fix the same issue in the .disable_all() callback. Fixes: 4be339af334c ("iio: adc: ad7124: Disable all channels at probe time") Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/20250204115023.265813-2-u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-02-08iio: adc: ad7173: add openwire detection support for single conversionsGuillaume Ranquet1-0/+179
Some chips of the ad7173 family supports open wire detection. Generate a level fault event whenever an external source is disconnected from the system input on single conversions. Reviewed-by: Nuno Sa <nuno.sa@analog.com> Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> Reviewed-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250127-ad4111_openwire-v5-2-ef2db05c384f@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-02-08iio: adc: ad7124: Micro-optimize channel disablingUwe Kleine-König1-8/+9
The key objective in ad7124_disable_one() is clearing the AD7124_CHANNEL_EN_MSK bit in the channel register. However there is no advantage to keep the other bits in that register because when the channel is used next time, all fields are rewritten anyhow. So instead of using ad7124_spi_write_mask() (which is a register read plus a register write) use a simple register write clearing the complete register. Also do the same in the .disable_all() callback by using the .disable_one() callback there. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Reviewed-by: Nuno Sa <nuno.sa@analog.com> Link: https://patch.msgid.link/20250120140708.1093655-2-u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-02-03iio: adc: ad7606: fix wrong scale availableAngelo Dureghello1-1/+1
Fix wrong scale available list since only one value is returned: ... iio:device1: ad7606b (buffer capable) 8 channels found: voltage0: (input, index: 0, format: le:S16/16>>0) 2 channel-specific attributes found: attr 0: scale value: 0.305176 attr 1: scale_available value: 0.076293 Fix as: voltage0: (input, index: 0, format: le:S16/16>>0) 2 channel-specific attributes found: attr 0: scale value: 0.305176 attr 1: scale_available value: 0.076293 0.152588 0.305176 Fixes: 97c6d857041d ("iio: adc: ad7606: rework scale-available to be static") Signed-off-by: Angelo Dureghello <adureghello@baylibre.com> Link: https://patch.msgid.link/20250129-wip-bl-ad7606_add_backend_sw_mode-v3-3-c3aec77c0ab7@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-02-03iio: adc: ad7192: fix channel selectMarkus Burri1-1/+1
Channel configuration doesn't work as expected. For FIELD_PREP the bit mask is needed and not the bit number. Fixes: 874bbd1219c7 ("iio: adc: ad7192: Use bitfield access macros") Signed-off-by: Markus Burri <markus.burri@mt.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250124150703.97848-1-markus.burri@mt.com Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-02-03iio: adc: at91-sama5d2_adc: fix sama7g5 realbits valueNayab Sayed1-28/+40
The number of valid bits in SAMA7G5 ADC channel data register are 16. Hence changing the realbits value to 16 Fixes: 840bf6cb983f ("iio: adc: at91-sama5d2_adc: add support for sama7g5 device") Signed-off-by: Nayab Sayed <nayabbasha.sayed@microchip.com> Link: https://patch.msgid.link/20250115-fix-sama7g5-adc-realbits-v2-1-58a6e4087584@microchip.com Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-02-03iio: adc: pac1921: Move ACPI_FREE() to cover all branchesVictor Duicu1-1/+1
This patch moves ACPI_FREE() in pac1921_match_acpi_device() in order to cover all branches. Reported-by: Andy Shevchenko <andy.shevchenko@gmail.com> Fixes: 9fdf1d033316 ("iio: adc: pac1921: Add ACPI support to Microchip pac1921") Acked-by: Matteo Martelli <matteomartelli3@gmail.com> Signed-off-by: Victor Duicu <victor.duicu@microchip.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://patch.msgid.link/20250117065314.4431-1-victor.duicu@microchip.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-02-03iio: adc: ti-ads124s08: Switch to fsleep()Fabio Estevam1-1/+1
According to Documentation/timers/delay_sleep_functions.rst, fsleep() is the preferred delay function to be used in non-atomic context, so switch to it accordingly. Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Fabio Estevam <festevam@denx.de> Link: https://patch.msgid.link/20241209181624.1260868-1-festevam@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-02-03iio: adc: ad4695: add custom regmap bus callbacksTrevor Gamblin2-8/+68
Add a custom implementation of regmap read/write callbacks using the SPI bus. This allows them to be performed at a lower SCLK rate than data reads. Previously, all SPI transfers were being performed at a lower speed, but with this change sample data is read at the max bus speed while the register reads/writes remain at the lower rate. Also remove .can_multi_write from the AD4695 driver's regmap_configs, as this isn't implemented or needed. For some background context, see: https://lore.kernel.org/linux-iio/20241028163907.00007e12@Huawei.com/ Suggested-by: David Lechner <dlechner@baylibre.com> Signed-off-by: Trevor Gamblin <tgamblin@baylibre.com> Reviewed-by: David Lechner <dlechner@baylibre.com> Tested-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20241113-tgamblin-ad4695_improvements-v2-3-b6bb7c758fc4@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-02-03iio: adc: ad4695: make ad4695_exit_conversion_mode() more robustTrevor Gamblin1-6/+28
Ensure that conversion mode is successfully exited when the command is issued by adding an extra transfer beforehand, matching the minimum CNV high and low times from the AD4695 datasheet. The AD4695 has a quirk where the exit command only works during a conversion, so guarantee this happens by triggering a conversion in ad4695_exit_conversion_mode(). Then make this even more robust by ensuring that the exit command is run at AD4695_REG_ACCESS_SCLK_HZ rather than the bus maximum. Signed-off-by: Trevor Gamblin <tgamblin@baylibre.com> Reviewed-by: David Lechner <dlechner@baylibre.com> Tested-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20241113-tgamblin-ad4695_improvements-v2-2-b6bb7c758fc4@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-02-03iio: adc: ad7625: drop BSD license tagTrevor Gamblin1-2/+2
The ad7625 driver was submitted under a dual BSD/GPL license, but this isn't a requirement for the code, and adds extra complexity. To make it consistent with similar drivers, drop the BSD tag and leave it as GPL-2.0-only. Suggested-by: Nuno Sa <nuno.sa@analog.com> Signed-off-by: Trevor Gamblin <tgamblin@baylibre.com> Link: https://patch.msgid.link/20250114-ad7625_license-v1-1-6555b7be05ab@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-02-03iio: adc: ad7173: don't make copy of ad_sigma_delta_info structDavid Lechner1-227/+255
Use two separate static const struct ad_sigma_delta_info instances instead of making a copy for each driver instance. Typically in the IIO subsystem, we use multiple static const instances of the same struct when there are different variants of the same family of devices as opposed to making a copy for each driver instance and modifying it. Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250113-iio-adc-ad7313-fix-non-const-info-struct-v4-2-b63be3ecac4a@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-02-03iio: adc: ad7173: move fwnode_irq_get_byname() call siteDavid Lechner2-9/+9
Move the call to fwnode_irq_get_byname() from the driver-specific ad7173_fw_parse_device_config() to the shared ad_sd_init() function. The main reason for this is that we want struct ad_sigma_delta_info to be static const data that describes the actual ADC chip, not the application-specific configuration or any runtime state. Previously, this struct was being used to pass the IRQ number to the shared ad_sd_init() function. Now, this is replaced by a boolean flag that is set at compile time and the ad_sd_init() function handles looking up the IRQ number instead. This also has the added benefit that if any other drivers need to make use of this in the future, they just have to set the flag and the shared code will take care of the rest rather than duplicating the code in each driver. Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250113-iio-adc-ad7313-fix-non-const-info-struct-v4-1-b63be3ecac4a@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-02-03iio: adc: stm32: Drop unnecessary DT property presence checkRob Herring (Arm)1-4/+2
There's no reason to check for regulator supply property presence before calling devm_regulator_get_optional() as that will return -ENODEV if the supply is not present. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Tested-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Link: https://patch.msgid.link/20250109182325.3973684-2-robh@kernel.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-02-03iio: adc: ad7380: add alert supportJulien Stephan1-0/+192
The alert functionality is an out of range indicator and can be used as an early indicator of an out of bounds conversion result. ALERT_LOW_THRESHOLD and ALERT_HIGH_THRESHOLD registers are common to all channels. When using 1 SDO line (only mode supported by the driver right now), i.e data outputs only on SDOA, SDOB (or SDOD for 4 channels variants) is used as an alert pin. The alert pin is updated at the end of the conversion (set to low if an alert occurs) and is cleared on a falling edge of CS. The ALERT register contains information about the exact alert status: channel and direction. ALERT register can be accessed using debugfs if enabled. User can set high/low thresholds and enable alert detection using the regular iio events attributes: events/in_thresh_falling_value events/in_thresh_rising_value events/thresh_either_en In most use cases, user will hardwire the alert pin to trigger a shutdown. In theory, we could generate userspace IIO events for alerts, but this is not implemented yet for several reasons [1]. This can be implemented later if a real use case actually requires it. Signed-off-by: Julien Stephan <jstephan@baylibre.com> [1] https://lore.kernel.org/all/4be16272-5197-4fa1-918c-c4cdfcaee02e@baylibre.com/ Reviewed-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250108-ad7380-add-alert-support-v4-4-1751802471ba@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-02-03iio: adc: ad7380: do not store osr in private data structureJulien Stephan1-14/+65
Since regmap cache is now enabled, we don't need to store the oversampling ratio in the private data structure. Reviewed-by: David Lechner <dlechner@baylibre.com> Signed-off-by: Julien Stephan <jstephan@baylibre.com> Link: https://patch.msgid.link/20250108-ad7380-add-alert-support-v4-3-1751802471ba@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-02-03iio: adc: ad7380: enable regmap cacheJulien Stephan1-0/+18
Enable regmap cache, to avoid useless access on spi bus. Reviewed-by: David Lechner <dlechner@baylibre.com> Signed-off-by: Julien Stephan <jstephan@baylibre.com> Link: https://patch.msgid.link/20250108-ad7380-add-alert-support-v4-2-1751802471ba@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-02-03iio: adc: ad7380: do not use iio_device_claim_direct_scoped anymoreJulien Stephan1-43/+67
Conditionnal scoped handlers are turning out to be a real pain: readability issues, compiler and linker handling issues among others so rollback and remove the scoped version of iio_dvice_claim_direct_mode. To impove code readability factorize code to set oversampling ratio. Signed-off-by: Julien Stephan <jstephan@baylibre.com> Link: https://patch.msgid.link/20250108-ad7380-add-alert-support-v4-1-1751802471ba@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-01-16Merge tag 'iio-fixes-for-6.13b' of ↵Greg Kroah-Hartman2-21/+29
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/jic23/iio into char-misc-next Merge from Jonathan: IIO: 2nd set of fixes for the 6.13 cycle. Given timing so late in cycle and that they are all confined to specific drivers, it is fine for these to go upstream early in the 6.14 cycle. hid-sensors - Handle processed attention channel rather than just returning an error. adi,ad3552r - Fix output ranges for ad3541r and ad3542r. - Clear the reset status flag so that we can pick up any resets during operation. adi,ad5791 - Fix a misleading dt binding example where the sense of the interrupt was reversed. adi,ad7606 - Fix some hard coded offsets that should be taking the number of channels on a particular part into account. These were missed due to some racing changes. ams,as73211 - Fix an off by one in optimized path for just reading the colour channels. bosch,bme680 - Fix type of variable passed as pointer, ensuring it works on big endian systems and doesn't expose uninitialized data. * tag 'iio-fixes-for-6.13b' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/jic23/iio: iio: dac: ad3552r-hs: clear reset status flag iio: dac: ad3552r-common: fix ad3541/2r ranges iio: chemical: bme680: Fix uninitialized variable in __bme680_read_raw() iio: light: as73211: fix channel handling in only-color triggered buffer dt-bindings: iio: dac: ad5791: ldac gpio is active low iio: hid-sensor-prox: Fix invalid read_raw for attention iio: adc: ad7606: Fix hardcoded offset in the ADC channels
2025-01-13Merge 6.13-rc4 into char-misc-nextGreg Kroah-Hartman11-48/+109
We need the IIO fixes in here as well, and it resolves a merge conflict in: drivers/iio/adc/ti-ads1119.c Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-01-04iio: adc: ad7625: Add ending newlines to error messagesUwe Kleine-König1-4/+4
Error messages passed to dev_err_probe() are supposed to end in "\n". Fix accordingly. Fixes: b7ffd0fa65e9 ("iio: adc: ad7625: add driver") Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Tested-by: Trevor Gamblin <tgamblin@baylibre.com> Link: https://patch.msgid.link/20241230151030.3207529-2-u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28iio: adc: meson: simplify MESON_SAR_ADC_REG11 register accessMartin Blumenstingl1-21/+8
Simply check the max_register value to decide whether MESON_SAR_ADC_REG11 is present on the current IP revision. This allows dropping two additional bool fields from struct meson_sar_adc_param which previously had to be manually kept in sync. No functional changes intended. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://patch.msgid.link/20241224142941.97759-4-martin.blumenstingl@googlemail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28iio: adc: meson: use tabs instead of spaces for some REG11 bit fieldsMartin Blumenstingl1-4/+4
This makes them consistent with the rest of the driver. No functional changes. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://patch.msgid.link/20241224142941.97759-3-martin.blumenstingl@googlemail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28iio: adc: meson: fix voltage reference selection field name typoMartin Blumenstingl1-5/+5
The field should be called "vref_voltage", without a typo in the word voltage. No functional changes intended. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://patch.msgid.link/20241224142941.97759-2-martin.blumenstingl@googlemail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28iio: adc: rockchip: correct alignment of timestampJonathan Cameron1-1/+1
I assume this device is only used on architectures where a 8 byte integer type is always 8 byte aligned. However, I would prefer IIO drivers to never make that assumption as the code gets copied into new drivers which are not so tightly couple to one driver and those can run on architectures that align these types to only 4 bytes in which case this structure may be 4 byte to small leading to a buffer overrun. Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://patch.msgid.link/20241215182912.481706-21-jic23@kernel.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28iio: adc: ti-lmp92064: Switch timestamp type from int64_t __aligned(8) to ↵Jonathan Cameron1-1/+1
aligned_s64 The vast majority of IIO drivers use aligned_s64 for the type of the timestamp field. It is not a bug to use int64_t and until this series iio_push_to_buffers_with_timestamp() took and int64_t timestamp, it is inconsistent. This change is to remove that inconsistency and ensure there is one obvious choice for future drivers. Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://patch.msgid.link/20241215182912.481706-17-jic23@kernel.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28iio: adc: Use aligned_s64 instead of open coding alignment.Jonathan Cameron13-13/+13
Use this new type to both slightly simplify the code and avoid confusing static analysis tools. Mostly this series is about consistency to avoid this code pattern getting copied into more drivers. Acked-by: Marcelo Schmitt <marcelo.schmitt1@gmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://patch.msgid.link/20241215182912.481706-14-jic23@kernel.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28io: adc: ina2xx-adc: Fix sign and use aligned_s64 for timestamp.Jonathan Cameron1-1/+1
Whilst it doesn't actually make any difference because the code that fills this field doesn't care, timestamps are all signed. Use the new aligned_s64 instead of open coding alignment to avoid confusing static analyzers and give slightly cleaner code. Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://patch.msgid.link/20241215182912.481706-3-jic23@kernel.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28iio: adc: ad7944: Fix sign and use aligned_s64 for timestamp.Jonathan Cameron1-1/+1
Whilst it doesn't actually make any difference because the code that fills this field doesn't care, timestamps are all signed. Use the new aligned_s64 instead of open coding alignment to avoid confusing static analyzers and give slightly cleaner code. Reviewed-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://patch.msgid.link/20241215182912.481706-2-jic23@kernel.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28iio: adc: max1363: Use a small fixed size buffer to replace dynamic allocationVasileios Amoiridis1-21/+9
Drop the recurrent allocation of the data buffer from the trigger handler and put it in the iio_priv(). This way, the maximum amount of channels is always allocated in favor of simpler code and drop of usage of the internal private variable "scan_timestamp" of the struct iio_dev. Signed-off-by: Vasileios Amoiridis <vassilisamir@gmail.com> Link: https://patch.msgid.link/20241214191421.94172-3-vassilisamir@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28iio: adc: dln2-adc: zero full struct instead of just the paddingVasileios Amoiridis1-19/+2
Drop a minor optimization of zeroing the padding between data and timestamp and zero the whole structure. This is done in favor of simpler code, and in order to drop the usage of the internal private variable "scan_timestamp" of the struct iio_dev. Signed-off-by: Vasileios Amoiridis <vassilisamir@gmail.com> Link: https://patch.msgid.link/20241214191421.94172-2-vassilisamir@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28iio: adc: ad_sigma_delta: Use `unsigned int` instead of plain `unsigned`Uwe Kleine-König1-1/+1
This fixes a checkpatch warning: WARNING: Prefer 'unsigned int' to bare use of 'unsigned' #70: FILE: drivers/iio/adc/ad_sigma_delta.c:253: + unsigned status_reg; Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/20241218114809.1378063-2-u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-20iio: adc: ad7606: Fix hardcoded offset in the ADC channelsGuillaume Stols2-21/+29
When introducing num_adc_channels, I overlooked some new functions created in a meanwhile that had also the hardcoded offset. This commit adds the new logic to these functions. Fixes: ef67f16e365c ("iio: adc: ad7606: Introduce num_adc_channels") Signed-off-by: Guillaume Stols <gstols@baylibre.com> Link: https://patch.msgid.link/20241210-ad7606_add_iio_backend_software_mode-v2-1-6619c3e50d81@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: ad7173: add calibration supportGuillaume Ranquet1-0/+116
The ad7173 family of chips has up to four calibration modes. Internal zero scale: removes ADC core offset errors. Internal full scale: removes ADC core gain errors. System zero scale: reduces offset error to the order of channel noise. System full scale: reduces gain error to the order of channel noise. All voltage channels will undergo an internal zero/full scale calibration at bootup. System zero/full scale can be done after bootup using the newly created iio interface 'sys_calibration' and 'sys_calibration_mode' Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> Link: https://patch.msgid.link/20241202-ad411x_calibration-v3-1-beb6aeec39e2@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: ad4000: Add support for PulSAR devicesMarcelo Schmitt1-0/+162
The ADI PulSAR series of single-channel devices comprises differential and pseudo-differential ADCs that don't require any input data from the host controller. By not requiring a data input line, PulSAR devices can operate with a 3-wire only data bus in some setups. The AD4000 series and the single-channel PulSAR series of devices have similar SPI transfer specifications and wiring configurations. Single-channel PulSAR devices are slower than AD4000 and don't have a configuration register. That taken into account, single-channel PulSARs can be supported by the ad4000 driver without any increase in code complexity. Extend the AD4000 driver to also support single-channel PulSAR devices. Reviewed-by: David Lechner <dlechner@baylibre.com> Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Link: https://patch.msgid.link/2bfb904e29914c3dc4905e1c87fcc735575f330d.1733147444.git.marcelo.schmitt@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: ad4000: Use device specific timing for SPI transfersMarcelo Schmitt1-9/+42
The SPI transfers for AD4020, AD4021, and AD4022 have slightly different timing specifications. Use device specific timing constraints to set SPI transfer parameters. While tweaking time constraints, remove time related defines including unused AD4000_TQUIET1_NS. Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Reviewed-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/a36fcf44cc00b2a498170e2ae3f005829d516266.1733147444.git.marcelo.schmitt@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: ad4000: Add timestamp channelMarcelo Schmitt1-42/+56
The ADC data is pushed to the IIO buffer along with timestamp but no timestamp channel was provided to retried the time data. Add a timestamp channel to provide sample capture time. Suggested-by: David Lechner <dlechner@baylibre.com> Reviewed-by: David Lechner <dlechner@baylibre.com> Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Link: https://patch.msgid.link/d1f1bb1b726b90a3a7c1148c65d2f7fe073e2b15.1733147444.git.marcelo.schmitt@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: ad7124: Implement temperature measurementUwe Kleine-König1-21/+91
If the maximal count of channels the driver supports isn't fully utilized, add an attribute providing the internal temperature. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/433211af8ac3f02dee58586ecb51d2e98246a095.1733504533.git.u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: ad7124: Add error reporting during probeUwe Kleine-König1-36/+40
A driver that silently fails to probe is annoying and hard to debug. So add messages in the error paths of the probe function. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/55e24392f1e4d5b9896f00a52a93c1c4b1feac43.1733504533.git.u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: ad_sigma_delta: Check for previous ready signalsUwe Kleine-König1-1/+98
It can happen if a previous conversion was aborted the ADC pulls down the R̅D̅Y̅ line but the event wasn't handled before. In that case enabling the irq might immediately fire (depending on the irq controller capabilities) and even with a rdy-gpio isn't identified as an unrelated one. To cure that problem check for a pending event before the measurement is started and clear it if needed. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/3ec6b61fb1e527e935133dc56f589aab4b2094a3.1733504533.git.u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: ad_sigma_delta: Store information about reset sequence lengthUwe Kleine-König6-6/+11
The various chips can be reset using a sequence of SPI transfers with MOSI = 1. The length of such a sequence varies from chip to chip. Store that length in struct ad_sigma_delta_info and replace the respective parameter to ad_sd_reset() with it. Note the ad7192 used to pass 48 as length but the documentation specifies 40 as the required length. Assuming the latter is right. (Using a too long sequence doesn't hurt apart from using a longer spi transfer than necessary, so this is no relevant fix.) The motivation for storing this information is that this is useful to clear a pending R̅D̅Y̅ signal in the next change. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/9750db62fce638bf140ff48172c23bff7f785e5b.1733504533.git.u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: ad_sigma_delta: Fix a race conditionUwe Kleine-König1-21/+35
The ad_sigma_delta driver helper uses irq_disable_nosync(). With that one it is possible that the irq handler still runs after the irq_disable_nosync() function call returns. Also to properly synchronize irq disabling in the different threads proper locking is needed and because it's unclear if the irq handler's irq_disable_nosync() call comes first or the one in the enabler's error path, all code locations that disable the irq must check for .irq_dis first to ensure there is exactly one disable call per enable call. So add a spinlock to the struct ad_sigma_delta and use it to synchronize irq enabling and disabling. Also only act in the irq handler if the irq is still enabled. Fixes: af3008485ea0 ("iio:adc: Add common code for ADI Sigma Delta devices") Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/9e6def47e2e773e0e15b7a2c29d22629b53d91b1.1733504533.git.u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: ad_sigma_delta: Handle CS assertion as intended in ↵Uwe Kleine-König1-1/+1
ad_sd_read_reg_raw() When struct ad_sigma_delta::keep_cs_asserted was introduced only register writing was adapted to honor this new flag. Also respect it when reading a register. Fixes: df1d80aee963 ("iio: ad_sigma_delta: Properly handle SPI bus locking vs CS assertion") Reviewed-by: Trevor Gamblin <tgamblin@baylibre.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/8d76b4ea4a4363b269886c71193b840821c724ea.1733504533.git.u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: ad_sigma_delta: Add support for reading irq status using a GPIOUwe Kleine-König1-5/+33
Some of the ADCs by Analog signal their irq condition on the MISO line. So typically that line is connected to an SPI controller and a GPIO. The GPIO is used as input and the respective interrupt is enabled when the last SPI transfer is completed. Depending on the GPIO controller the toggling MISO line might make the interrupt pending even while it's masked. In that case the irq handler is called immediately after irq_enable() and so before the device actually pulls that line low which results in non-sense values being reported to the upper layers. The only way to find out if the line was actually pulled low is to read the GPIO. (There is a flag in AD7124's status register that also signals if an interrupt was asserted, but reading that register toggles the MISO line and so might trigger another spurious interrupt.) Add the possibility to specify an interrupt GPIO in the machine description in addition to the plain interrupt. This GPIO is used then to check if the irq line is actually active in the irq handler. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/5be9a4cc4dc600ec384c88db01dd661a21506b9c.1733504533.git.u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: ad7124: Refuse invalid input specifiersUwe Kleine-König1-0/+18
The ad7124-4 has 8 analog inputs; the input select values 8 to 15 are reserved and not to be used. These are fine for ad7124-8. For both ad7124-4 and ad7124-8 values bigger than 15 are internal channels that might appear as inputs in the channels specified in the device description according to the description of commit f1794fd7bdf7 ("iio: adc: ad7124: Remove input number limitation"), values bigger than 31 don't fit into the respective register bit field and the driver masked them to smaller values. Check for these invalid input specifiers and fail to probe if one is found. Fixes: f1794fd7bdf7 ("iio: adc: ad7124: Remove input number limitation") Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/80e3bd629d2b755ab5e061c8731dafa57d08698a.1733504533.git.u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: ad7124: Don't create more channels than the driver can handleUwe Kleine-König1-0/+10
The ad7124-4 and ad7124-8 both support 16 channel registers and assigns each channel defined in dt statically such a register. While the driver could be a bit more clever about this, it currently isn't and specifying more than 16 channels yields broken behaviour. So just refuse to bind in this situation. Fixes: b3af341bbd96 ("iio: adc: Add ad7124 support") Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/1b9a5a1d334e5501294f7f9f9d5893f1cdf1b0ec.1733504533.git.u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: rzg2l_adc: Add support for Renesas RZ/G3SClaudiu Beznea1-0/+9
Add ADC support for the Renesas RZ/G3S SoC. The key features of this IP include: - 9 channels, with one dedicated to reading the temperature reported by the Thermal Sensor Unit (TSU) - A different default ADCMP value, which is written to the ADM3 register. - Different default sampling rates - ADM3.ADSMP field is 8 bits wide - ADINT.INTEN field is 11 bits wide Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Link: https://patch.msgid.link/20241206111337.726244-14-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: rzg2l_adc: Add suspend/resume supportClaudiu Beznea1-0/+70
The Renesas RZ/G3S SoC features a power-saving mode where power to most of the SoC components is turned off, including the ADC IP. Suspend/resume support has been added to the rzg2l_adc driver to restore functionality after resuming from this power-saving mode. During suspend, the ADC resets are asserted, and the ADC is powered down. On resume, the ADC resets are de-asserted, the hardware is re-initialized, and the ADC power is restored using the runtime PM APIs. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://patch.msgid.link/20241206111337.726244-12-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: rzg2l_adc: Add support for channel 8Claudiu Beznea1-18/+44
The ADC on the Renesas RZ/G3S SoC includes an additional channel (channel 8) dedicated to reading temperature values from the Thermal Sensor Unit (TSU). There is a direct in-SoC connection between the ADC and TSU IPs. To read the temperature reported by the TSU, a different sampling rate (compared to channels 0-7) must be configured in the ADM3 register. The rzg2l_adc driver has been updated to support reading the TSU temperature. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://patch.msgid.link/20241206111337.726244-11-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-26 04:42:32 +0300