summaryrefslogtreecommitdiff
path: root/drivers/gpu
AgeCommit message (Collapse)AuthorFilesLines
2025-11-20Merge tag 'drm-rust-next-2025-11-18' of ↵Dave Airlie39-1072/+5618
https://gitlab.freedesktop.org/drm/rust/kernel into drm-next Cross-subsystem Changes: Rust - Make slice::as_flattened usable on all supported versions of rustc. - Add FromBytes::from_bytes_prefix() method. Core Changes: - Update Tyr in MAINTAINERS file. - Remove redundant device ptr from Rust GEM object. - Change how AlwaysRefCounted is implemented for GEM objects. - Add deferred vm_bo cleanup to GPUVM and use it in Panthor. Driver Changes: Nova Core - Introduction of bitfield! macro, with support for different storage sizes and custom visibility. - Introduction of safe converters between integer types for which the conversion is lossless. - GSP initialized up to fully booted state on Ampere. - Use more future-proof register for GPU identification. - Various simplifications and optimizations. Nova - Select NOVA_CORE. - Depend on CONFIG_64BIT. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alice Ryhl <aliceryhl@google.com> Link: https://patch.msgid.link/aRxtJC0D1pQUepF4@google.com
2025-11-20drm/amdgpu: Add sriov vf check for VCN per queue reset support.Shikang Fan2-2/+4
Add SRIOV check when setting VCN ring's supported reset mask. Signed-off-by: Shikang Fan <shikang.fan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit ee9b603ad43f9870eb75184f9fb0a84f8c3cc852) Cc: stable@vger.kernel.org
2025-11-20drm/amdgpu/ttm: Fix crash when handling MMIO_REMAP in PDE flagsSrinivasan Shanmugam1-1/+1
The MMIO_REMAP BO is a special 4K IO page that does not have a ttm_tt behind it. However, amdgpu_ttm_tt_pde_flags() was treating it like normal TT/doorbell/preempt memory and unconditionally accessed ttm->caching. For the MMIO_REMAP BO, ttm is NULL, so this leads to a NULL pointer dereference when computing PDE flags. Fix this by checking that ttm is non-NULL before reading ttm->caching. This prevents the crash for MMIO_REMAP and also makes the code more defensive if other BOs ever come through without a ttm_tt. Fixes: fb5a52dbe9fe ("drm/amdgpu: Implement TTM handling for MMIO_REMAP placement") Suggested-by: Jesse Zhang <Jesse.Zhang@amd.com> Suggested-by: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Jesse Zhang <Jesse.Zhang@amd.com> Tested-by: Jesse Zhang <Jesse.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 0db94da5a0a1cacda080b9ec8425fcbe4babc141)
2025-11-20drm/amdgpu/vm: Check PRT uAPI flag instead of PTE flagTimur Kristóf1-2/+2
This fixes sparse mappings (aka. partially resident textures). Check the correct flags. Since a recent refactor, the code works with uAPI flags (for mapping buffer objects), and not PTE (page table entry) flags. Fixes: 6716a823d18d ("drm/amdgpu: rework how PTE flags are generated v3") Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 8feeab26c80635b802f72b3ed986c693ff8f3212)
2025-11-20drm/amdgpu: Skip emit de meta data on gfx11 with rs64 enabledYifan Zha1-2/+2
[Why] Accoreding to CP updated to RS64 on gfx11, WRITE_DATA with PREEMPTION_META_MEMORY(dst_sel=8) is illegal for CP FW. That packet is used for MCBP on F32 based system. So it would lead to incorrect GRBM write and FW is not handling that extra case correctly. [How] With gfx11 rs64 enabled, skip emit de meta data. Signed-off-by: Yifan Zha <Yifan.Zha@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 8366cd442d226463e673bed5d199df916f4ecbcf) Cc: stable@vger.kernel.org
2025-11-20drm/amd: Skip power ungate during suspend for VPEMario Limonciello1-1/+2
During the suspend sequence VPE is already going to be power gated as part of vpe_suspend(). It's unnecessary to call during calls to amdgpu_device_set_pg_state(). It actually can expose a race condition with the firmware if s0i3 sequence starts as well. Drop these calls. Cc: Peyton.Lee@amd.com Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 2a6c826cfeedd7714611ac115371a959ead55bda) Cc: stable@vger.kernel.org
2025-11-20drm/mediatek: Fix device node reference leak in mtk_dp_dt_parse()Miaoqian Lin1-0/+1
The function mtk_dp_dt_parse() calls of_graph_get_endpoint_by_regs() to get the endpoint device node, but fails to call of_node_put() to release the reference when the function returns. This results in a device node reference leak. Fix this by adding the missing of_node_put() call before returning from the function. Found via static analysis and code review. Fixes: f70ac097a2cf ("drm/mediatek: Add MT8195 Embedded DisplayPort driver") Cc: stable@vger.kernel.org Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Reviewed-by: Markus Schneider-Pargmann <msp@baylibre.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Link: https://patchwork.kernel.org/project/dri-devel/patch/20251029072307.10955-1-linmq006@gmail.com/ Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2025-11-20drm/amdgpu: Add sriov vf check for VCN per queue reset support.Shikang Fan2-2/+4
Add SRIOV check when setting VCN ring's supported reset mask. Signed-off-by: Shikang Fan <shikang.fan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-11-20drm/amdgpu/ttm: Fix crash when handling MMIO_REMAP in PDE flagsSrinivasan Shanmugam1-1/+1
The MMIO_REMAP BO is a special 4K IO page that does not have a ttm_tt behind it. However, amdgpu_ttm_tt_pde_flags() was treating it like normal TT/doorbell/preempt memory and unconditionally accessed ttm->caching. For the MMIO_REMAP BO, ttm is NULL, so this leads to a NULL pointer dereference when computing PDE flags. Fix this by checking that ttm is non-NULL before reading ttm->caching. This prevents the crash for MMIO_REMAP and also makes the code more defensive if other BOs ever come through without a ttm_tt. Fixes: fb5a52dbe9fe ("drm/amdgpu: Implement TTM handling for MMIO_REMAP placement") Suggested-by: Jesse Zhang <Jesse.Zhang@amd.com> Suggested-by: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Jesse Zhang <Jesse.Zhang@amd.com> Tested-by: Jesse Zhang <Jesse.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-11-20drm/amdgpu/vm: Check PRT uAPI flag instead of PTE flagTimur Kristóf1-2/+2
This fixes sparse mappings (aka. partially resident textures). Check the correct flags. Since a recent refactor, the code works with uAPI flags (for mapping buffer objects), and not PTE (page table entry) flags. Fixes: 6716a823d18d ("drm/amdgpu: rework how PTE flags are generated v3") Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-11-20drm/amdgpu: Skip emit de meta data on gfx11 with rs64 enabledYifan Zha1-2/+2
[Why] Accoreding to CP updated to RS64 on gfx11, WRITE_DATA with PREEMPTION_META_MEMORY(dst_sel=8) is illegal for CP FW. That packet is used for MCBP on F32 based system. So it would lead to incorrect GRBM write and FW is not handling that extra case correctly. [How] With gfx11 rs64 enabled, skip emit de meta data. Signed-off-by: Yifan Zha <Yifan.Zha@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-11-20drm/amd: Skip power ungate during suspend for VPEMario Limonciello1-1/+2
During the suspend sequence VPE is already going to be power gated as part of vpe_suspend(). It's unnecessary to call during calls to amdgpu_device_set_pg_state(). It actually can expose a race condition with the firmware if s0i3 sequence starts as well. Drop these calls. Cc: Peyton.Lee@amd.com Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-11-19drm/xe/debugfs: Use scope-based runtime PMMatt Roper6-35/+15
Switch the debugfs code to use scope-based runtime PM where possible, for consistency with other parts of the driver. v2: - Drop unnecessary 'ret' variables. (Gustavo) Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patch.msgid.link/20251118164338.3572146-56-matthew.d.roper@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2025-11-19drm/xe/sysfs: Use scope-based runtime power managementMatt Roper4-54/+31
Switch sysfs to use scope-based runtime power management to slightly simplify the code. v2: - Drop unnecessary local variables. (Gustavo) Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patch.msgid.link/20251118164338.3572146-55-matthew.d.roper@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2025-11-19drm/xe/tests: Use scope-based runtime PMMatt Roper4-26/+7
Use scope-based handling of runtime PM in the kunit tests for consistency with other parts of the driver. Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patch.msgid.link/20251118164338.3572146-54-matthew.d.roper@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2025-11-19drm/xe/sriov: Use scope-based runtime PMMatt Roper5-29/+11
Use scope-based runtime power management in the SRIOV code for consistency with other parts of the driver. v2: - Drop unnecessary 'ret' variables. (Gustavo) Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patch.msgid.link/20251118164338.3572146-53-matthew.d.roper@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2025-11-19drm/xe/hwmon: Use scope-based runtime PMMatt Roper1-38/+14
Use scope-based runtime power management in the hwmon code for consistency with other parts of the driver. v2: - Drop unnecessary 'ret' variables. (Gustavo) Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patch.msgid.link/20251118164338.3572146-52-matthew.d.roper@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2025-11-19drm/xe/ggtt: Use scope-based runtime pmMatt Roper1-2/+1
Switch the GGTT code to scope-based runtime PM for consistency with other parts of the driver. Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patch.msgid.link/20251118164338.3572146-51-matthew.d.roper@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2025-11-19drm/xe/bo: Use scope-based runtime PMMatt Roper1-6/+2
Use scope-based runtime power management in the BO code for consistency with other parts of the driver. v2: - Drop unnecessary 'ret' variable. (Gustavo) Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patch.msgid.link/20251118164338.3572146-50-matthew.d.roper@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2025-11-19drm/xe/vram: Use scope-based forcewakeMatt Roper1-4/+2
Switch VRAM code to use scope-based forcewake for consistency with other parts of the driver. Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patch.msgid.link/20251118164338.3572146-49-matthew.d.roper@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2025-11-19drm/xe/reg_sr: Use scope-based forcewakeMatt Roper1-12/+5
Use scope-based forcewake to slightly simplify the reg_sr code. Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patch.msgid.link/20251118164338.3572146-48-matthew.d.roper@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2025-11-19drm/xe/query: Use scope-based forcewakeMatt Roper1-10/+6
Use scope-based forcewake handling for consistency with other parts of the driver. Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patch.msgid.link/20251118164338.3572146-47-matthew.d.roper@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2025-11-19drm/xe/huc: Use scope-based forcewakeMatt Roper1-5/+2
Use scope-based forcewake in the HuC code for a small simplification and consistency with other parts of the driver. Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patch.msgid.link/20251118164338.3572146-46-matthew.d.roper@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2025-11-19drm/xe/gt_debugfs: Use scope-based cleanupMatt Roper1-21/+8
Use scope-based cleanup for forcewake and runtime PM to simplify the debugfs code slightly. Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patch.msgid.link/20251118164338.3572146-45-matthew.d.roper@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2025-11-19drm/xe/drm_client: Use scope-based cleanupMatt Roper1-21/+16
Use scope-based cleanup for forcewake and runtime PM. v2: - Use xe_force_wake_release_only rather than a custom one-off class for "any engine" forcewake. (Gustavo) Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patch.msgid.link/20251118164338.3572146-44-matthew.d.roper@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2025-11-19drm/xe: Return forcewake reference type from force_wake_get_any_engine()Matt Roper1-19/+19
Adjust the signature of force_wake_get_any_engine() such that it returns a 'struct xe_force_wake_ref' rather than a boolean success/failure. Failure cases are now recognized by inspecting the hardware engine returned by reference; a NULL hwe indicates that no engine's forcewake could be obtained. These changes will make it cleaner and easier to incorporate scope-based cleanup in force_wake_get_any_engine()'s caller in a future patch. Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patch.msgid.link/20251118164338.3572146-43-matthew.d.roper@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2025-11-19drm/xe/display: Use scoped-cleanupMatt Roper2-36/+18
Eliminate some goto-based cleanup by utilizing scoped cleanup helpers. v2: - Eliminate unnecessary 'ret' variable in intel_hdcp_gsc_check_status() (Gustavo) Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patch.msgid.link/20251118164338.3572146-42-matthew.d.roper@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2025-11-19drm/xe/devcoredump: Use scope-based cleanupMatt Roper1-18/+12
Use scope-based cleanup for forcewake and runtime PM in the devcoredump code. This eliminates some goto-based error handling and slightly simplifies other functions. v2: - Move the forcewake acquisition slightly higher in devcoredump_snapshot() so that we maintain an easy-to-understand LIFO cleanup order. (Gustavo) Cc: Gustavo Sousa <gustavo.sousa@intel.com> Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patch.msgid.link/20251118164338.3572146-41-matthew.d.roper@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2025-11-19drm/xe/device: Use scope-based cleanupMatt Roper1-22/+11
Convert device code to use scope-based forcewake and runtime PM. Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patch.msgid.link/20251118164338.3572146-40-matthew.d.roper@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2025-11-19drm/xe/gsc: Use scope-based cleanupMatt Roper2-25/+13
Use scope-based cleanup for forcewake and runtime PM to eliminate some goto-based error handling and simplify other functions. Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patch.msgid.link/20251118164338.3572146-39-matthew.d.roper@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2025-11-19drm/xe/pxp: Use scope-based cleanupMatt Roper1-37/+18
Use scope-based cleanup for forcewake and runtime pm. This allows us to eliminate some goto-based error handling and simplify other functions. Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patch.msgid.link/20251118164338.3572146-38-matthew.d.roper@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2025-11-19drm/xe/pat: Use scope-based forcewakeMatt Roper1-24/+12
Use scope-based cleanup for forcewake in the PAT code to slightly simplify the code. Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patch.msgid.link/20251118164338.3572146-37-matthew.d.roper@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2025-11-19drm/xe/mocs: Use scope-based cleanupMatt Roper2-23/+12
Using scope-based cleanup for runtime PM and forcewake in the MOCS code allows us to eliminate some goto-based error handling and simplify some other functions. Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patch.msgid.link/20251118164338.3572146-36-matthew.d.roper@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2025-11-19drm/xe/guc_pc: Use scope-based cleanupMatt Roper1-45/+17
Use scope-based cleanup for forcewake and runtime PM in the GuC PC code. This allows us to eliminate to goto-based cleanup and simplifies some other functions. Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patch.msgid.link/20251118164338.3572146-35-matthew.d.roper@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2025-11-19drm/xe/guc: Use scope-based cleanupMatt Roper4-26/+12
Use scope-based cleanup for forcewake and runtime PM. Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patch.msgid.link/20251118164338.3572146-34-matthew.d.roper@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2025-11-19drm/xe/gt_idle: Use scope-based cleanupMatt Roper1-29/+12
Use scope-based cleanup for runtime PM and forcewake in the GT idle code. v2: - Use scoped_guard() over guard() in idle_status_show() and idle_residency_ms_show(). (Gustavo) - Eliminate unnecessary 'ret' local variable in name_show(). Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patch.msgid.link/20251118164338.3572146-33-matthew.d.roper@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2025-11-19drm/xe/gt: Use scope-based cleanupMatt Roper1-89/+41
Using scope-based cleanup for forcewake and runtime PM allows us to reduce or eliminate some of the goto-based error handling and simplify several functions. v2: - Drop changes to do_gt_restart(). This function still has goto-based logic, making scope-based cleanup unsafe for now. (Gustavo) Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patch.msgid.link/20251118164338.3572146-32-matthew.d.roper@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2025-11-19drm/xe/pm: Add scope-based cleanup helper for runtime PMMatt Roper2-0/+38
Add a scope-based helpers for runtime PM that may be used to simplify cleanup logic and potentially avoid goto-based cleanup. For example, using guard(xe_pm_runtime)(xe); will get runtime PM and cause a corresponding put to occur automatically when the current scope is exited. 'xe_pm_runtime_noresume' can be used as a guard replacement for the corresponding 'noresume' variant. There's also an xe_pm_runtime_ioctl conditional guard that can be used as a replacement for xe_runtime_ioctl(): ACQUIRE(xe_pm_runtime_ioctl, pm)(xe); if ((ret = ACQUIRE_ERR(xe_pm_runtime_ioctl, &pm)) < 0) /* failed */ In a few rare cases (such as gt_reset_worker()) we need to ensure that runtime PM is dropped when the function is exited by any means (including error paths), but the function does not need to acquire runtime PM because that has already been done earlier by a different function. For these special cases, an 'xe_pm_runtime_release_only' guard can be used to handle the release without doing an acquisition. These guards will be used in future patches to eliminate some of our goto-based cleanup. v2: - Specify success condition for xe_pm runtime_ioctl as _RET >= 0 so that positive values will be properly identified as success and trigger destructor cleanup properly. v3: - Add comments to the kerneldoc for the existing 'get' functions indicating that scope-based handling should be preferred where possible. (Gustavo) Cc: Gustavo Sousa <gustavo.sousa@intel.com> Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patch.msgid.link/20251118164338.3572146-31-matthew.d.roper@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2025-11-19drm/xe/forcewake: Add scope-based cleanup for forcewakeMatt Roper2-0/+47
Since forcewake uses a reference counting get/put model, there are many places where we need to be careful to drop the forcewake reference when bailing out of a function early on an error path. Add scope-based cleanup options that can be used in place of explicit get/put to help prevent mistakes in this area. Examples: CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FW_GT); Obtain forcewake on the XE_FW_GT domain and hold it until the end of the current block. The wakeref will be dropped automatically when the current scope is exited by any means (return, break, reaching the end of the block, etc.). xe_with_force_wake(fw_ref, gt_to_fw(ss->gt), XE_FORCEWAKE_ALL) { ... } Hold all forcewake domains for the following block. As with the CLASS usage, forcewake will be dropped automatically when the block is exited by any means. Use of these cleanup helpers should allow us to remove some ugly goto-based error handling and help avoid mistakes in functions with lots of early error exits. An 'xe_force_wake_release_only' class is also added for cases where a forcewake reference is passed in from another function and the current function is responsible for releasing it in every flow and error path. v2: - Create a separate constructor that just wraps xe_force_wake_get for use in the class. This eliminates the need to update the signature of xe_force_wake_get(). (Michal) v3: - Wrap xe_with_force_wake's 'done' marker in __UNIQUE_ID. (Gustavo) - Add a note to xe_force_wake_get()'s kerneldoc explaining that scope-based cleanup is preferred when possible. (Gustavo) - Add an xe_force_wake_release_only class. (Gustavo) v4: - Add NULL check on fw in release_only variant. (Gustavo) Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Gustavo Sousa <gustavo.sousa@intel.com> Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patch.msgid.link/20251118164338.3572146-30-matthew.d.roper@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2025-11-19drm/plane: Fix create_in_format_blob() return valueVille Syrjälä1-2/+2
create_in_format_blob() is either supposed to return a valid pointer or an error, but never NULL. The caller will dereference the blob when it is not an error, and thus will oops if NULL returned. Return proper error values in the failure cases. Cc: stable@vger.kernel.org Cc: Arun R Murthy <arun.r.murthy@intel.com> Fixes: 0d6dcd741c26 ("drm/plane: modify create_in_formats to acommodate async") Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/20251112233030.24117-2-ville.syrjala@linux.intel.com Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
2025-11-19drm/xe/rps: build RPS as part of xeJani Nikula2-21/+1
Reduce the conditional compilation in i915 by building intel_display_rps.c as part of the xe module. This doesn't actually enable RPS on xe, because there's no parent interface implementation on xe side, but it's a step in the right direction. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/93df0bb727fce14aa9a542dbd2c0826a0fa0a16f.1763370931.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-11-19drm/i915: add .fence_priority_display to parent interfaceJani Nikula5-16/+17
Add .fence_priority_display() to display parent interface, removing a display dependency on gem/i915_gem_object.h. This allows us to remove the xe compat gem/i915_gem_object.h. v2: Don't mix this with the rps interface (Ville) v3: Rebase Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/c7782862956e3aa59eaeb6dcf80906c1fc063ae1.1763370931.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-11-19drm/i915/rps: postpone i915 fence check to boostJani Nikula2-5/+6
Make the RPS boost code independent of i915 request code by moving the dma_fence_is_i915() check to the RPS boost call. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/2653395523ee04c9ca3216f197f08c25a9f7716d.1763370931.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-11-19drm/i915/rps: call RPS functions via the parent interfaceJani Nikula6-11/+78
Add struct intel_display_rps_interface to the display parent interface, and call the RPS functions through it. The RPS interface is optional. v2: s/boost/boost_if_not_started/ and keep comment in caller (Ville) Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/6a6c4420d9f2d9a545ee6df4cad5fdc32a86636b.1763370931.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-11-19drm/i915/rps: store struct dma_fence in struct wait_rps_boostJani Nikula1-4/+4
Prefer the more generic pointer rather than i915 specific data type. Also use dma_fence_put() for symmetry with the dma_fence_get() Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/950948ae6d3d5fbc4af3401ea77e609945b73a77.1763370931.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-11-19drm/i915: add .has_fenced_regions to parent interfaceJani Nikula5-17/+15
Add .has_fenced_regions() to display parent interface, removing more dependencies on struct drm_i915_private, i915_drv.h, and gt/intel_gt_types.h. This allows us to remove the xe compat gt/intel_gt_types.h. v2: s/fence_support_legacy/has_fenced_regions/ (Ville) Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/309f61a8742c3bf731c820b2f9e1024143db8598.1763370931.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-11-19drm/i915: add .vgpu_active to parent interfaceJani Nikula6-25/+17
Add .vgpu_active() to display parent interface, removing more dependencies on struct drm_i915_private, i915_drv.h, and i915_vgpu.h. This also allows us to remove the xe compat i915_vgpu.h. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/a2d4043ebaaf8f69bb738d5d1332afd2847550ad.1763370931.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-11-19drm/{i915,xe}/display: move irq calls to parent interfaceJani Nikula17-79/+111
Add an irq parent driver interface for the .enabled and .synchronize calls. This lets us drop the dependency on i915_drv.h and i915_irq.h in multiple places, and subsequently remove the compat i915_irq.h and i915_irq.c files along with the display/ext directory from xe altogether. Introduce new intel_parent.[ch] as the wrapper layer to chase the function pointers and convert between generic and more specific display types. v2: Keep static wrappers in intel_display_irq.c (Ville) v3: Full blown wrappers in intel_parent.[ch] (Ville) Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/dd62dd52ef10d9ecf77da3bdf6a70f71193d141c.1763370931.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-11-19drm/i915/display: convert the display irq interfaces to struct intel_displayJani Nikula1-116/+68
Convert the irq/error init/reset interfaces from struct intel_uncore to struct intel_display, and drop the dependency on intel_uncore.h. Since the intel_de_*() calls handle the DMC wakelock internally, we can drop the wrappers handling wakelocks completely. v2: Drop the wakelock wrappers (Ville) Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/710e03906da91244208839b357fe9171e37441ba.1763370931.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-11-19drm/{i915, xe}/display: duplicate gen2 irq/error init/reset in display irqJani Nikula2-76/+73
Duplicate gen2_irq_reset(), gen2_assert_iir_is_zero(), gen2_irq_init(), gen2_error_reset(), and gen2_error_init() in intel_display_irq.c. This allows us to drop the duplicates from xe, and prepares for future cleanups. Although duplication is undesirable in general, in this case the local duplicates lead to a cleaner end result. There's a slight wrinkle in gen2_assert_iir_is_zero(). We need to use non-device based logging until we pass in struct intel_display in a separate change. v2: - Keep xe compat stuff due to series reorder and rebase - Keep the WARN as regular WARN - Rename the functions in the same go Suggested-by: Ville Syrjala <ville.syrjala@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/296d74731cce57ab7534c57969d3146294adda57.1763370931.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>