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path: root/drivers/gpu
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2018-10-31drm/i915/icl: Program HS_TX_TIMEOUT/LP_RX_TIMEOUT/TA_TIMEOUT registersMadhav Chauhan3-0/+54
Program the timeout values (in escape clock) for HS TX, LP RX and TA timeout. HX TX: Ensure that host does not continuously transmit in the HS state. If this timer expires, then host will gracefully end its HS transmission and allow the link to enter into LP state. LP RX: Monitor the length of LP receptions from Peripheral. If timeout happens then host will drive the stop state onto all data lanes (only Data Lane 0 should be receiving anything from the Peripheral). This effectively takes back ownership of the bus transmit in the HS state. TA timeout: Timeout valuefor monitoring Bus Turn-Around (BTA) sequence. BTA sequence should complete within a bounded amount of time, with peripheral acknowledging BTA by driving the stop state. v2 by Jani: - Rebase - Use intel_dsi_bitrate() and intel_dsi_tlpx_ns(intel_dsi) - Squash HX TX, LP RX and TA timeout into one patch - Fix bspec mode set sequence reference - Add FIXME about two timeouts Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/60e610ccffe5f8c09dee1c65828f28f25227efce.1540900289.git.jani.nikula@intel.com
2018-10-31drm/i915/icl: Define DSI timeout registersMadhav Chauhan1-0/+43
This patch defines DSI_HTX_TO, DSI_LRX_H_TO, DSI_PWAIT_TO and DSI_TA_TO registers for DSI transcoders '0' and '1'. They are used for contention recovery on DPHY. v2: Define SHIFT for bitfields. v3 by Jani: - Fix timeout bit definitions Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/0b943c028a05edfd61c511d712c65c7e8bf70211.1540900289.git.jani.nikula@intel.com
2018-10-31drm/i915/icl: Disable DSI IO powerMadhav Chauhan1-0/+23
This patch configures mode of combo phy as DDI and disable IO power for DDI ports used by DSI. Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/b68d767717a3b86c26042d0b16abb3943756fcc4.1540900289.git.jani.nikula@intel.com
2018-10-31drm/i915/icl: Disable DSI portsMadhav Chauhan1-0/+23
This patch disables both DSI ports by writing to DDI_BUF_CTL registers as part of DSI encoder disable sequence. Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/be9a7dc1ed89ad38679c67ff1c1552f0b4604494.1540900289.git.jani.nikula@intel.com
2018-10-31drm/i915/icl: Disable portsync modeMadhav Chauhan1-0/+10
This patch disables portsync mode if DSI link is operating in dual link mode by writing to TRANS_DDI_FUNC_CTL2 registers. Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/3e608420b58930b6da478801bff018c6e964eb94.1540900289.git.jani.nikula@intel.com
2018-10-31drm/i915/icl: Disable DDI functionMadhav Chauhan1-0/+8
This patch disables DDI function by writing to TRANS_DDI_FUNC_CTL registers of DSI ports as part of DSI disable sequence. Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/b0088d643247135ba96943fa14625f5a43f43633.1540900289.git.jani.nikula@intel.com
2018-10-31drm/i915/icl: Put DSI link in ULPSMadhav Chauhan1-0/+26
As part of DSI disabling sequence, DSI link need to enter in ULPS by writing into DSI_LP_MSG register. This patch does the same using a wrapper function. Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/50812f4bd37f95c053bef7eef4a95e5da029546f.1540900289.git.jani.nikula@intel.com
2018-10-31drm/i915/icl: Power down DSI panelMadhav Chauhan1-0/+15
This patch sends command and executes display off, assert reset, power off VBT seqeuences to power down DSI panel. Patch also adds high level function to wrap all the panel sepcific programming during DSI disabling. Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/efdafbf6b4d31123738b87b2d8264a9b5553eb32.1540900289.git.jani.nikula@intel.com
2018-10-31drm/i915/icl: Disable DSI transcodersMadhav Chauhan1-0/+26
This patch disables transcoders by writing to TRANS_CONF registers for each DSI ports. v2 by Jani: - Wait for pipeconf active to go low Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/c76035309fa721322cf9c1ca7fc42b822937c2f3.1540900289.git.jani.nikula@intel.com
2018-10-31drm/i915/icl: Turn OFF panel backlightMadhav Chauhan1-0/+12
This patch disbles backlight of DSI panel by using VBT BACKLIGHT_OFF sequence and panel specific disable functions. Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/93cfbb198104deef4a281bbdef721385e4b6d954.1540900289.git.jani.nikula@intel.com
2018-10-31drm/i915/icl: Turn ON panel backlightMadhav Chauhan1-0/+6
This patch enables backlight of DSI panel by using VBT BACKLIGHT_ON sequence and panel specific functions. Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/05987eea297689af0b9defcf745a921f76f9011d.1540900289.git.jani.nikula@intel.com
2018-10-31drm/i915/icl: Wait for header/payload credits releaseMadhav Chauhan1-0/+74
Driver needs payload/header credits for sending any command and data over DSI link. These credits are released once command or data sent to link. This patch adds functions to wait for releasing of payload and header credits. As per BSPEC, driver needs to ensure that all of commands/data has been dispatched to panel before the transcoder is enabled. This patch implement those steps i.e. sending NOP DCS command, wait for header/payload credit to be released etc. v2 by Jani: - squash the credit wait helpers patch with the first user - pass dev_priv to the credit wait helpers - bikeshed credit helper names - wait for *at least* the current maximum number of credits - indentation fix - add helpers for credits available Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/84bc509beabf2a2d1324a9f2a67ab4ebe05b10a6.1540900289.git.jani.nikula@intel.com
2018-10-31drm/i915/ringbuffer: change header SPDX identifier to MITJonathan Gray1-1/+1
Commit b24413180f56 ("License cleanup: add SPDX GPL-2.0 license identifier to files with no license") added "SPDX-License-Identifier: GPL-2.0" to files which previously had no license, change this to MIT for intel_ringbuffer.h matching the license text of intel_ringbuffer.c. Signed-off-by: Jonathan Gray <jsg@jsg.id.au> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181031005331.20775-1-jsg@jsg.id.au
2018-10-31drm/i915/icl: Power on DSI panelMadhav Chauhan1-0/+7
This patch execute poweron, deassert reset, display on VBT sequences and send TURN_ON DSI command to panel for powering it up. Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/8acb06fa634fe9637fdc09a3f5d2588b9138224f.1540900289.git.jani.nikula@intel.com
2018-10-31drm/i915/icl: Set max return packet size for DSI panelMadhav Chauhan1-0/+33
This patch programs maximum size of the payload transmitted from peripheral back to the host processor using short packet as a part of panel programming. v2: Rebase v3 by Jani: - Add FIXME note. Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/ed9df910326adf32eb2bc1cd1a5097d0dda94da8.1540900289.git.jani.nikula@intel.com
2018-10-31drm/i915/dsi: move connector mode functions to common fileMadhav Chauhan3-48/+50
Move DSI connector functions to intel_dsi.c and make them available to both legacy and ICL DSI. v2 by Jani: - Move the functions to intel_dsi.c - Don't reuse intel_dsi_connector_destroy() Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/99244c6edf4a26ef2e279c7160d22dbbb5cd95f2.1540900289.git.jani.nikula@intel.com
2018-10-31drm/i915/icl: Move dsi host init code to common fileMadhav Chauhan3-34/+39
This patch moves intl_dsi_host_init() code to intel_dsi.c so that legacy and gen11 DSI code can share this code. v2 by Jani: - Move the shared stuff to intel_dsi.c Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1ee42b2d3c639e3f3c14a2c1595b8778901574d4.1540900289.git.jani.nikula@intel.com
2018-10-31drm/i915/gvt: Handle values of EDP_PSR_IMR and EDP_PSR_IIRLonghe Zheng1-4/+4
GVT-g only simulates DP port for guest and leaves EDP_PSR_IMR and EDP_PSR_IIR registers as default MMIO read/write. So guest won't get expected initial values of these registers when initializing the gpu driver, which results in following warning and logs. -------- Interrupt register 0x64838 is not zero: 0xffffffff WARNING: CPU: 1 PID: 157 at drivers/gpu/drm/i915/i915_irq.c:177 gen3_assert_iir_is_zero+0x38/0xa0 Call Trace: gen8_de_irq_postinstall+0xa7/0x400 gen8_irq_postinstall+0x27/0x80 drm_irq_install+0xbc/0x140 i915_driver_load+0xa9d/0xd50 -------- Because GVT-g does not handle EDP(embedded DP) simulation for guests, always set EDP_PSR_IMR and EDP_PSR_IIR to value 0. Signed-off-by: Longhe Zheng <longhe.zheng@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2018-10-31drm/i915/gvt: correct mask setting for CSFE_CHICKEN1Xinyun Liu1-1/+1
CSFE_CHICKEN1(0x20d4) needs access with mask. This is caught in AcrnGT conformance check test: [drm:intel_gvt_vgpu_conformance_check] *ERROR* gvt: vgpu1 unconformance mmio 0x20d4:0x40004,0x4 Signed-off-by: Xinyun Liu <xinyun.liu@intel.com> Signed-off-by: Zhi Wang <zhi.a.wang@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2018-10-31drm/i915/gvt: support inconsecutive partial gtt entry writeHang Yuan2-56/+60
Previously we assumed two 4-byte writes to the same PTE coming in sequence. But recently we observed inconsecutive partial write happening as well. So this patch enhances the previous solution. It now uses a list to save more partial writes. If one partial write can be combined with another one in the list to construct a full PTE, update its shadow entry. Otherwise, save the partial write in the list. v2: invalidate old entry and flush ggtt (Zhenyu) v3: split old ggtt page unmap to another patch (Zhenyu) v4: refine codes (Zhenyu) Signed-off-by: Hang Yuan <hang.yuan@linux.intel.com> Cc: Yan Zhao <yan.y.zhao@intel.com> Cc: Xiaolin Zhang <xiaolin.zhang@intel.com> Cc: Zhenyu Wang <zhenyu.z.wang@intel.com> Reviewed-by: Xiaolin Zhang <xiaolin.zhang@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2018-10-31drm/i915/selftest: test aligned offsets for 64KMatthew Auld1-4/+18
When using softpin it's not enough to just pad the vma size, we also need to ensure the vma offset is at the start of the pt boundary, if we plan to utilize 64K pages. Therefore to improve test coverage we should use both aligned and unaligned gtt offsets in igt_write_huge. Suggested-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20181029203734.21936-1-matthew.auld@intel.com
2018-10-31drm/i915/gtt: Revert "Disable read-only support under GVT"Hang Yuan1-6/+2
This reverts commit c9e666880de5a1fed04dc412b046916d542b72dd. Checked GVT codes that guest PPGTT PTE flag bits are propagated to shadow PTE. Read/write bit is not changed. Further tested by i915 self-test case "igt_ctx_readonly". No error or GPU hang was detected. So enable read-only support under GVT. Signed-off-by: Hang Yuan <hang.yuan@linux.intel.com> Acked-by: Zhenyu Wang <zhenyuw@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1540883281-11359-1-git-send-email-hang.yuan@linux.intel.com Acked-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2018-10-31drm/tinydrm: Fix setting of the column/page end addresses.Eric Anholt1-2/+2
If the clipped dirty region's x/y happened to align to 256, we would have set the top 8 bits wrong. Noticed by inspection, not by reproducing a bug. Signed-off-by: Eric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/20181024184313.2967-4-eric@anholt.net Reviewed-by: Noralf Trønnes <noralf@tronnes.org>
2018-10-31drm: Add an hx8367d tinydrm driver.Eric Anholt3-0/+282
I want to sort out support for tinydrm in vc4, so I needed to get a tinydrm-appropriate panel working and this is what I had on hand. This is derived from a combination of ili9341.c from tinydrm and fb_hx8357d.c from staging's fbtft. v2: Write my own register defs from the spec to not need the header from fbtft. Fix spi device string to enable module autoloading. (Suggestions by Noralf) Signed-off-by: Eric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/20181024184313.2967-3-eric@anholt.net Reviewed-by: Noralf Trønnes <noralf@tronnes.org> (v1)
2018-10-31drm/amd/powerplay: revise Vega20 pptable version checkEvan Quan1-2/+8
Tell the version numbers when the pptable versions do not match. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-31drm/amd/display: set backlight level limit to 1Guttula, Suresh1-0/+7
This patch will work as workaround for silicon limitation related to PWM dutycycle when the backlight level goes to 0. Actually PWM value is 16 bit value and valid range from 1-65535. when ever user requested to set this PWM value to 0 which is not fall in the range, in VBIOS taken care this by limiting to 1. This patch here will do the same. Either driver or VBIOS can not pass 0 value as it is not a valid range for PWM and it will give a high PWM pulse which is not the intended behaviour as per HW constraints. Signed-off-by: suresh guttula <suresh.guttula@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-30drm/tinydrm: Advertise that we can do only DRM_FORMAT_MOD_LINEAR.Eric Anholt3-1/+14
Without this, the xserver relies on what the 3D driver exposes and assumes that the display can handle it, and then the DRM driver happily tries to scan out a tiled format. Signed-off-by: Eric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/20181025162635.6689-1-eric@anholt.net Acked-by: Noralf Trønnes <noralf@tronnes.org>
2018-10-30drm/i915/icl: Enable DC9 as lowest possible state during screen-offAnimesh Manna3-14/+41
ICL supports DC5, DC6, and DC9. Enable DC9 during screen-off, and enable DC5/6 when appropriate. v2: (James Ausmus) - Also handle ICL as GEN9_LP in i915_drm_suspend_late and i915_drm_suspend_early - Add DC9 to gen9_dc_mask for ICL - Re-order GEN checks for newest platform first - Use INTEL_GEN instead of INTEL_INFO->gen - Use INTEL_GEN >= 11 instead of IS_ICELAKE - Consolidate GEN checks v3: (James Ausmus) - Also allow DC6 for ICL (Imre, Art) - Simplify !(GEN >= 11) to GEN < 11 (Imre) v4: (James Ausmus) - Don't call intel_power_sequencer_reset after DC9 for Gen11+, as the PPS regs are Always On - Rebase against upstream changes v5: (Anusha Srivatsa) - rebased against the latest upstream changes. v6: (Anusha Srivatsa) - rebased.Use INTEL_GEN consistently. - Simplify the code (Rodrigo) v7: rebased. Change order according to platforms(Jyoti) v8: rebased. Change the check from platform specific to HAS_PCH_SPLIT(). Add comment in code to be more clear.(Rodrigo) Cc: Imre Deak <imre.deak@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Animesh Manna <animesh.manna@intel.com> Signed-off-by: James Ausmus <james.ausmus@intel.com> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Tested-by: Jyoti Yadav <jyoti.r.yadav@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181029221410.4423-1-anusha.srivatsa@intel.com
2018-10-30drm/bochs: add edid support.Gerd Hoffmann3-3/+49
Recent qemu (latest master branch, upcoming 3.1 release) got support for EDID data. This patch adds guest driver support. EDID support in qemu is not (yet) enabled by default, so please use 'qemu -device VGA,edid=on' for testing. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20181029205048.13200-1-kraxel@redhat.com
2018-10-30drm/rockchip: dsi: add dual mipi supportHeiko Stuebner5-0/+146
Add the Rockchip-sepcific dual-dsi setup and hook it into the VOP as well. As described in the general dual-dsi devicetree binding, the panel should define two input ports and point each of them to one of the used dsi- controllers, as well as declare one of them as clock-master. This is used to determine the dual-dsi state and get access to both controller instances. v6: handle master+slave component in dsi-attach v5: use driver-internal mechanism to find dual dsi slave v4: add component directly in probe when adding empty dsi slave controller Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181001123845.11818-8-heiko@sntech.de
2018-10-30drm/bridge/synopsys: dsi: add dual-dsi supportNickey Yang1-6/+74
Allow to also drive a slave dw-mipi-dsi controller in a dual-dsi setup. This will require additional implementation-specific code to look up the slave instance and do specific setup. Also will probably need code in the specific crtcs as dual-dsi does not equal two separate dsi outputs. To activate, the implementation-specific code should set the slave using dw_mipi_dsi_set_slave() before calling __dw_mipi_dsi_bind(). v2: - expect real interface number of lanes - keep links to both master and slave v3: - remove unneeded separate variables - remove unneeded second slave settings - disable slave before master - lane-sum calculation comments Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Philippe Cornu <philippe.cornu@st.com> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181001123845.11818-7-heiko@sntech.de
2018-10-30drm/rockchip: dsi: migrate to use dw-mipi-dsi bridge driverNickey Yang6-1353/+943
Add the ROCKCHIP DSI controller driver that uses the Synopsys DesignWare MIPI DSI host controller bridge and remove the old separate one. changes: v2: add err_pllref, remove unnecessary encoder.enable & disable correct spelling mistakes v3: call dw_mipi_dsi_unbind() in dw_mipi_dsi_rockchip_unbind() fix typo, use of_device_get_match_data(), change some bind() logic into probe() add 'dev_set_drvdata()' v4: return -EINVAL when can not get best_freq add a clarifying comment when get vco add review tag v5: keep our power domain enabled while touching GRF v6: change func name dw_mipi_encoder_disable to dw_mipi_dsi_encoder_disable v7: none v8: Heiko add Archit's Review tag adapt to recent changes in the original rockchip-dsi driver beautify grf-handling split hw-setup (resources, dsi-host) from bind into probe v2-new: Heiko add SPDX header instead of license blurb drop old versioning to not confuse people v3-new: Heiko include ordering moved hwaccess from mode_set to enable callback move pllref_clk enablement to bind (needed by bridge mode_set->lane_mbps) v4-new: Heiko rebase against recent rockchip-dsi changes move to call component_add in the new glue host-attach Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com> Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Sean Paul <seanpaul@chromium.org> Reviewed-by: Archit Taneja <architt@codeaurora.org> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181001123845.11818-6-heiko@sntech.de
2018-10-30drm/bridge/synopsys: dsi: add ability to have glue-specific attach and detachHeiko Stuebner1-0/+15
With the regular means of adding the dsi-component in probe it creates a race condition with the panel probing, as the panel device only gets created after the dsi-bus got created. When the panel-driver is build as a module it currently fails hard as the panel cannot be probed directly: dw_mipi_dsi_bind() __dw_mipi_dsi_probe() creates dsi bus creates panel device triggers panel module load panel not probed (module not loaded or panel probe slow) drm_bridge_attach fails with -EINVAL due to empty panel_bridge Additionally the panel probing can run concurrently with dsi bringup making it possible that the panel can already be found but dsi-attach hasn't finished running. To solve that cleanly we may want to only create the component after the panel has finished probing, by calling component_add from the host-attach dsi callback. As that is specific to glue drivers, add a new struct for host_ops so that glue drivers can tell the bridge to call specific functions after the common host-attach and before the common host-detach run. Suggested-by: Andrzej Hajda <a.hajda@samsung.com> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181001123845.11818-4-heiko@sntech.de
2018-10-30drm/bridge/synopsys: dsi: don't call __dw_mipi_dsi_probe from dw_mipi_dsi_bindHeiko Stuebner1-12/+3
__dw_mipi_dsi_probe() does all the grabbing of resources and does it using devm-helpers. So this is happening on each try of master bringup possibly slowing down things a lot. Drivers using the component framework may instead want to call dw_mipi_dsi_probe separately in their probe function to setup resources early. That way the dsi bus also gets created earlier and also not recreated on each bind-try, so that attached panels can load their modules and be probed way before the bridge-attach in the bind call. So drop the call to __dw_mipi_dsi_probe and modify the function to take a struct dw_mipi_dsi instead of the platform-device. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181001123845.11818-3-heiko@sntech.de
2018-10-30drm/bridge/synopsys: dsi: move mipi_dsi_host_unregister to __dw_mipi_dsi_removeHeiko Stuebner1-2/+2
Right now the host is only unregistered when the driver is used via the bridge api and not via the component api, leading to the host staying registered in cases like probe deferral. So move the host unregister to the general remove function, so that it gets cleaned up in all cases. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> Reviewed-by: Philippe Cornu <philippe.cornu@st.com> Tested-by: Philippe Cornu <philippe.cornu@st.com> Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181001123845.11818-2-heiko@sntech.de
2018-10-30drm/i915: Stop calling intel_opregion unregister/register in suspend/resumeChris Wilson3-71/+111
If we reduce the suspend function for intel_opregion to do the minimum required, the resume function can also do the simple task of notifier the ACPI bios that we are back. This avoid some nasty restrictions on the likes of register_acpi_notifier() that are not allowed during the early phase of resume. v2: Keep the order of acpi notify vs turning off ardy/drdy the same. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Imre Deak <imre.deak@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Acked-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181030110554.4111-1-chris@chris-wilson.co.uk
2018-10-30drm/i915/gtt: Reuse the read-only 64KiB scratch page and directoriesChris Wilson1-4/+26
If we can prevent stray writes from landing in the scratch page, we can reuse the same page and same scratch PT for all contexts without fear of information leaks and side-channels. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Matthew Auld <matthew.auld@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181029182721.29568-2-chris@chris-wilson.co.uk
2018-10-30drm/i915/gtt: Record the scratch pteChris Wilson2-46/+50
Record the scratch PTE encoding upon creation rather than recomputing the bits everytime. This is important for the next patch where we forgo having a valid scratch page with which we may compute the bits and so require keeping the PTE value instead. v2: Fix up scrub_64K to use scratch_pte as well. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Matthew Auld <matthew.auld@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181029182721.29568-1-chris@chris-wilson.co.uk
2018-10-30drm/qxl: Use 'unsigned int' instead of 'bool'Shayenne da Luz Moura1-5/+5
Use 'unsigned int' with bitfield instead of 'bool' to avoid alignment issues and remove checkpatch.pl check: CHECK: Avoid using bool structure members because of possible alignment issues Signed-off-by: Shayenne da Luz Moura <shayenneluzmoura@gmail.com> Link: http://patchwork.freedesktop.org/patch/msgid/fcd9d7ea7eec1ac6a3ad9ad16e0fc9ef13c089fd.1540579956.git.shayenneluzmoura@gmail.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2018-10-30drm/qxl: Add space before open parenthesesShayenne da Luz Moura1-2/+2
Add space to remove checkpath.pl error: ERROR: space required before the open parenthesis '(' Signed-off-by: Shayenne da Luz Moura <shayenneluzmoura@gmail.com> Link: http://patchwork.freedesktop.org/patch/msgid/1ab3ba05c140aae01bde66f73ff1f3b78bf7dfb3.1540579956.git.shayenneluzmoura@gmail.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2018-10-30drm/qxl: Use 'unsigned int' instead of 'usigned'Shayenne da Luz Moura9-31/+31
Use 'usigned int' instead of 'usigned' to remove the checkpath.pl warning: WARNING: Prefer 'unsigned int' to bare use of 'unsigned' Signed-off-by: Shayenne da Luz Moura <shayenneluzmoura@gmail.com> Link: http://patchwork.freedesktop.org/patch/msgid/52604806eb18bc25e7e429f5b229fe8c1d271b5c.1540579956.git.shayenneluzmoura@gmail.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2018-10-30drm/qxl: Remove exceding whitelineShayenne da Luz Moura11-15/+0
Remove extra whiteline to clean the checkpatch.pl check: CHECK: Please don't use multiple blank lines Signed-off-by: Shayenne da Luz Moura <shayenneluzmoura@gmail.com> Link: http://patchwork.freedesktop.org/patch/msgid/5b95e1d4d515d02d01b829ddc5b3ca80af29e2e2.1540579956.git.shayenneluzmoura@gmail.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2018-10-30drm/qxl: Add line after variable declarationsShayenne da Luz Moura9-0/+17
Add whiteline after variable declarations to remove the checkpath.pl warning: WARNING: Missing a blank line after declarations Signed-off-by: Shayenne da Luz Moura <shayenneluzmoura@gmail.com> Link: http://patchwork.freedesktop.org/patch/msgid/a1d44c4a30f9b52d0aa7113e4e5093e843f9913b.1540579956.git.shayenneluzmoura@gmail.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2018-10-30drm/qxl: Remove trailing whitespaceShayenne da Luz Moura1-1/+1
Remove extra tab and space to clean the checkpath.pl error. ERROR: trailing whitespace Signed-off-by: Shayenne da Luz Moura <shayenneluzmoura@gmail.com> Link: http://patchwork.freedesktop.org/patch/msgid/fb0e2237bc505c855a0a842c081a39d524c571dc.1540579956.git.shayenneluzmoura@gmail.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2018-10-30gpu/drm/virtio/virtgpu_vq.c: Use kmem_cache_zallocSabyasachi Gupta1-2/+1
Replaced kmem_cache_alloc + memset with kmem_cache_zalloc Signed-off-by: Sabyasachi Gupta <sabyasachi.linux@gmail.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/5bc9ff7e.1c69fb81.105c2.1fef@mx.google.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2018-10-30drm/virtio: Handle context ID allocation errorsMatthew Wilcox1-18/+11
It is possible to run out of memory while allocating IDs. The current code would create a context with an invalid ID; change it to return -ENOMEM to userspace. Signed-off-by: Matthew Wilcox <willy@infradead.org> Link: http://patchwork.freedesktop.org/patch/msgid/20180926160031.15721-3-willy@infradead.org Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2018-10-30drm/virtio: Replace IDRs with IDAsMatthew Wilcox3-28/+8
These IDRs were only being used to allocate unique numbers, not to look up pointers, so they can use the more space-efficient IDA instead. Signed-off-by: Matthew Wilcox <willy@infradead.org> Link: http://patchwork.freedesktop.org/patch/msgid/20180926160031.15721-2-willy@infradead.org [ kraxel: resolve conflict ] Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2018-10-30drm/virtio: fix resource id handlingGerd Hoffmann6-26/+23
Move virtio_gpu_resource_id_{get,put} to virtgpu_object.c and make them static. Allocate and free the id on creation and destroy, drop all other calls. That way objects have a valid handle for the whole lifetime of the object. Also fixes ids leaking. Worst offender are dumb buffers, and I think some error paths too. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Link: http://patchwork.freedesktop.org/patch/msgid/20181019061847.18958-7-kraxel@redhat.com
2018-10-30drm/virtio: drop resource_id argument.Gerd Hoffmann6-16/+10
We pass the obj anyway, so obj->hw_res_handle can be used instead in virtio_gpu_object_attach() and virtio_gpu_cmd_create_resource(). Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Link: http://patchwork.freedesktop.org/patch/msgid/20181019061847.18958-6-kraxel@redhat.com
2018-10-30drm/virtio: use virtio_gpu_object->hw_res_handle in ↵Gerd Hoffmann1-16/+8
virtio_gpu_resource_create_ioctl() Drop pointless res_id variable in virtio_gpu_resource_create_ioctl(), just use the hw_res_handle field in virtio_gpu_object directly. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Link: http://patchwork.freedesktop.org/patch/msgid/20181019061847.18958-5-kraxel@redhat.com
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-29 13:36:00 +0300