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path: root/drivers/gpu
AgeCommit message (Expand)AuthorFilesLines
2020-04-01drm/radeon: remove unneeded header include pathMasahiro Yamada1-2/+0
2020-04-01drm/amdgpu: Ignore the not supported error from pspEmily Deng1-1/+5
2020-04-01drm/amdgpu: Add 4k resolution for virtual displayEmily Deng1-3/+7
2020-04-01drm/amdgpu: Virtual display need to support multiple ctrcsEmily Deng1-1/+2
2020-04-01drm/amdgpu: disable ras query and iject during gpu resetJohn Clements3-3/+28
2020-04-01drm/amdgpu: added xgmi ras error reset sequenceJohn Clements2-0/+31
2020-04-01drm/amdgpu: cleanup all virtualization detection routineMonk Liu16-105/+48
2020-04-01drm/amdgpu: amends feature bits for MM bandwidth mgrMonk Liu1-0/+2
2020-04-01drm/amdgpu: purge ip_discovery headersMonk Liu1-2/+0
2020-04-01drm/amdgpu: Fix FRU data checkingKent Russell1-0/+21
2020-04-01drm/amdgpu: Expose TA FW version in fw_version fileKent Russell1-2/+2
2020-04-01drm/amdgpu: disabled fru eeprom accessJohn Clements1-0/+10
2020-04-01drm/amd/amdgpu: Add GFX9.1 PWR_MISC_CNTL_STATUS register to headersTom St Denis2-0/+7
2020-04-01drm/amdgpu: Enable reading FRU chip via I2C v3Kent Russell5-1/+268
2020-04-01drm/amdkfd: kfree the wrong pointerJack Zhang1-2/+2
2020-04-01drm/i915/gt: fix spelling mistake "undeflow" -> "underflow"Chen Zhou1-1/+1
2020-04-01drm/i915/gt: Align engine dump active/pendingChris Wilson1-1/+1
2020-04-01drm/core: Calculate bpp in afbc helperAndrzej Pietrasiewicz1-7/+32
2020-04-01drm/core: Use proper debugging macroAndrzej Pietrasiewicz1-3/+3
2020-04-01drm/amdgpu: improve amdgpu_gem_info debugfs fileChristian König1-1/+3
2020-04-01drm/amdgpu: add support for exporting VRAM using DMA-buf v3Christian König3-14/+153
2020-04-01drm/amdgpu: add checks if DMA-buf P2P is supportedChristian König1-0/+4
2020-04-01drm/amdgpu: note that we can handle peer2peer DMA-bufChristian König1-0/+1
2020-04-01drm/ttm: lock resv object during destructionChristian König1-1/+3
2020-04-01drm/i915/gem: Ignore readonly failures when updating relocsChris Wilson1-4/+2
2020-04-01drm/dp_mst: make build_clear_payload_id_table return voidMaya Rashish1-2/+1
2020-03-31drm/i915/gt: Fill all the unused space in the GGTTChris Wilson1-10/+27
2020-03-31drm/i915: Report all failed registers for ctx isolationMika Kuoppala1-12/+13
2020-03-31drm/i915/gt: Include the execlists CCID of each port in the engine dumpChris Wilson1-49/+56
2020-03-31drm/i915/execlists: Pause CS flow before resetChris Wilson1-0/+1
2020-03-31drm/i915/selftests: Tidy up an error message for live_error_interruptChris Wilson1-4/+5
2020-03-31drm/i915/gt: Include a few tracek for timeslicingChris Wilson2-3/+23
2020-03-31drm/i915: Defer kicking the tasklet until all rescheduling is completeChris Wilson1-0/+4
2020-03-31drm/i915/tc/icl: Update TC vswing tablesJosé Roberto de Souza1-20/+73
2020-03-31drm/i915/dp/ehl: Update vswing table for HBR and RBRJosé Roberto de Souza1-5/+4
2020-03-31drm/i915/dp: Return the right vswing tablesJosé Roberto de Souza1-2/+3
2020-03-31drm/i915/icl+: Don't enable DDI IO power on a TypeC port in TBT modeImre Deak1-1/+5
2020-03-31drm/amd/display: increase HDCP authentication delayBhawanpreet Lakha1-1/+1
2020-03-31drm/amd/display: Correctly cancel future watchdog and callback eventsBhawanpreet Lakha1-1/+3
2020-03-31drm/amd/display: Don't try hdcp1.4 when content_type is set to type1Bhawanpreet Lakha1-2/+6
2020-03-31drm/amd/powerplay: move the ASIC specific nbio operation out of smu_v11_0.cEvan Quan4-13/+44
2020-03-31drm/amd/powerplay: drop redundant BIF doorbell interrupt operationsEvan Quan1-14/+0
2020-03-31drm/amd/display: Fix dcn21 num_statesDmytro Laktyushkin4-30/+18
2020-03-31drm/amd/display: Enable BT2020 in COLOR_ENCODING propertyStylon Wang1-2/+5
2020-03-31drm/amd/display: LFC not working on 2.0x range monitors (v2)Aric Cyr1-15/+19
2020-03-31drm/amd/display: Support plane level CTMStylon Wang3-1/+18
2020-03-31drm/amd/display: Revert change to HDCP display statesIsabel Zhang6-28/+49
2020-03-31drm/amd/display: Not doing optimize bandwidth if flip pending.Yongqiang Sun1-0/+23
2020-03-31drm/amd/display: Use double buffered DRR timing update by defaultNicholas Kazlauskas2-0/+21
2020-03-31drm/amd/display: Support P010 pixel formatStylon Wang4-3/+11
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