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2017-10-23drm: Add CRTC_GET_SEQUENCE and CRTC_QUEUE_SEQUENCE ioctls [v3]Keith Packard3-0/+176
These provide crtc-id based functions instead of pipe-number, while also offering higher resolution time (ns) and wider frame count (64) as required by the Vulkan API. v2: * Check for DRIVER_MODESET in new crtc-based vblank ioctls Failing to check this will oops the driver. * Ensure vblank interupt is running in crtc_get_sequence ioctl The sequence and timing values are not correct while the interrupt is off, so make sure it's running before asking for them. * Short-circuit get_sequence if the counter is enabled and accurate Steal the idea from the code in wait_vblank to avoid the expense of drm_vblank_get/put * Return active state of crtc in crtc_get_sequence ioctl Might be useful for applications that aren't in charge of modesetting? * Use drm_crtc_vblank_get/put in new crtc-based vblank sequence ioctls Daniel Vetter prefers these over the old drm_vblank_put/get APIs. * Return s64 ns instead of u64 in new sequence event Suggested-by: Daniel Vetter <daniel@ffwll.ch> Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com> v3: * Removed FIRST_PIXEL_OUT_FLAG * Document that the timestamp in the query and event are that of the first pixel leaving the display engine for the display (using the same wording as the Vulkan spec). Suggested-by: Michel Dänzer <michel@daenzer.net> Acked-by: Dave Airlie <airlied@redhat.com> [airlied: left->leaves (Michel)] Signed-off-by: Keith Packard <keithp@keithp.com> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-10-21drm: Reorganize drm_pending_event to support future event types [v2]Keith Packard5-25/+33
Place drm_event_vblank in a new union that includes that and a bare drm_event structure. This will allow new members of that union to be added in the future without changing code related to the existing vbl event type. Assignments to the crtc_id field are now done when the event is allocated, rather than when delievered. This way, delivery doesn't need to have the crtc ID available. v2: * Remove 'dev' argument from create_vblank_event It wasn't being used anyways, and if we need it in the future, we can always get it from crtc->dev. * Check for MODESETTING before looking for crtc in queue_vblank_event UMS drivers will oops if we try to get a crtc, so make sure we're modesetting before we try to find a crtc_id to fill into the event. Signed-off-by: Keith Packard <keithp@keithp.com> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Dave Airlie <airlied@redhat.com> (cherry picked from commit dc695b85fde88eca3ef3b03fcd82f15b6bc6e462)
2017-10-21drm: Widen vblank count to 64-bits [v3]Keith Packard1-33/+71
This modifies the datatypes used by the vblank code to provide 64 bits of vblank count. The driver interfaces have been left using 32 bits of vblank count; all of the code necessary to widen that value for the user API was already included to handle devices returning fewer than 32-bits. This will provide the necessary datatypes for the Vulkan API. v2: * Re-write wait_vblank ioctl to ABSOLUTE sequence When an application uses the WAIT_VBLANK ioctl with RELATIVE or NEXTONMISS bits set, the target vblank interval is updated within the kernel. We need to write that target back to the ioctl buffer and update the flags bits so that if the wait is interrupted by a signal, when it is re-started, it will target precisely the same vblank count as before. * Leave driver API with 32-bit vblank count v3: * Rebase on top of Arnd Bergmann's patch which had the switch to ktime_t parts. [airlied: fix conflict with Ville vblank change]. Suggested-by: Michel Dänzer <michel@daenzer.net> Suggested-by: Daniel Vetter <daniel@ffwll.ch> Signed-off-by: Keith Packard <keithp@keithp.com> Signed-off-by: Dave Airlie <airlied@redhat.com> (cherry picked from commit 2affbc16983e4fc90960bc7f70e7615f4228199b)
2017-10-20Merge tag 'drm-amdkfd-next-2017-10-18' of ↵Dave Airlie11-338/+562
git://people.freedesktop.org/~gabbayo/linux into drm-next This is the amdkfd pull request for 4.15 merge window. The patches here are relevant only for Kaveri and Carrizo. Still no dGPU patches. The main goal is to continue alignment with the internal AMD development tree. The following is a summary of the changes: - Improvements and fixes to suspend/resume code - Improvements and fixes to process termination code - Cleanups in the queue unmapping functionality - Reuse code from amdgpu * tag 'drm-amdkfd-next-2017-10-18' of git://people.freedesktop.org/~gabbayo/linux: drm/amdkfd: Improve multiple SDMA queues support per process drm/amdkfd: Limit queue number per process and device to 127 drm/amdkfd: Clean up process queue management drm/amdkfd: Compress unnecessary function parameters drm/amdkfd: Improve process termination handling drm/amdkfd: Avoid submitting an unnecessary packet to HWS drm/amdkfd: Fix MQD updates drm/amdkfd: Pass filter params to unmap_queues_cpsch drm/amdkfd: move locking outside of unmap_queues_cpsch drm/amdkfd: Avoid name confusion involved in queue unmapping drm/amdkfd: Drop _nocpsch suffix from shared functions drm/amdkfd: Reuse CHIP_* from amdgpu v2 drm/amdkfd: Use VMID bitmap from KGD v2 drm/amdkfd: Adjust dequeue latencies and timeouts drm/amdkfd: Rectify the jiffies calculation error with milliseconds v2 drm/amdkfd: Fix suspend/resume issue on Carrizo v2 drm/amdkfd: Reorganize kfd resume code
2017-10-20Merge tag 'drm-intel-next-2017-10-12' of ↵Dave Airlie85-2212/+5520
git://anongit.freedesktop.org/drm/drm-intel into drm-next Last batch of drm/i915 features for v4.15: - transparent huge pages support (Matthew) - uapi: I915_PARAM_HAS_SCHEDULER into a capability bitmask (Chris) - execlists: preemption (Chris) - scheduler: user defined priorities (Chris) - execlists optimization (Michał) - plenty of display fixes (Imre) - has_ipc fix (Rodrigo) - platform features definition refactoring (Rodrigo) - legacy cursor update fix (Maarten) - fix vblank waits for cursor updates (Maarten) - reprogram dmc firmware on resume, dmc state fix (Imre) - remove use_mmio_flip module parameter (Maarten) - wa fixes (Oscar) - huc/guc firmware refacoring (Sagar, Michal) - push encoder specific code to encoder hooks (Jani) - DP MST fixes (Dhinakaran) - eDP power sequencing fixes (Manasi) - selftest updates (Chris, Matthew) - mmu notifier cpu hotplug deadlock fix (Daniel) - more VBT parser refactoring (Jani) - max pipe refactoring (Mika Kahola) - rc6/rps refactoring and separation (Sagar) - userptr lockdep fix (Chris) - tracepoint fixes and defunct tracepoint removal (Chris) - use rcu instead of abusing stop_machine (Daniel) - plenty of other fixes all around (Everyone) * tag 'drm-intel-next-2017-10-12' of git://anongit.freedesktop.org/drm/drm-intel: (145 commits) drm/i915: Update DRIVER_DATE to 20171012 drm/i915: Simplify intel_sanitize_enable_ppgtt drm/i915/userptr: Drop struct_mutex before cleanup drm/i915/dp: limit sink rates based on rate drm/i915/dp: centralize max source rate conditions more drm/i915: Allow PCH platforms fall back to BIOS LVDS mode drm/i915: Reuse normal state readout for LVDS/DVO fixed mode drm/i915: Use rcu instead of stop_machine in set_wedged drm/i915: Introduce separate status variable for RC6 and LLC ring frequency setup drm/i915: Create generic functions to control RC6, RPS drm/i915: Create generic function to setup LLC ring frequency table drm/i915: Rename intel_enable_rc6 to intel_rc6_enabled drm/i915: Name structure in dev_priv that contains RPS/RC6 state as "gt_pm" drm/i915: Move rps.hw_lock to dev_priv and s/hw_lock/pcu_lock drm/i915: Name i915_runtime_pm structure in dev_priv as "runtime_pm" drm/i915: Separate RPS and RC6 handling for CHV drm/i915: Separate RPS and RC6 handling for VLV drm/i915: Separate RPS and RC6 handling for BDW drm/i915: Remove superfluous IS_BDW checks and non-BDW changes from gen8_enable_rps drm/i915: Separate RPS and RC6 handling for gen6+ ...
2017-10-20Merge branch 'drm-next-4.15' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie64-13395/+12006
into drm-next Last set of features for 4.15. Highlights: - Add a bo flag to allow buffers to opt out of implicit sync - Add ctx priority setting interface - Lots more powerplay cleanups - Start to plumb through vram lost infrastructure for gpu reset - ttm support for huge pages - misc cleanups and bug fixes * 'drm-next-4.15' of git://people.freedesktop.org/~agd5f/linux: (73 commits) drm/amd/powerplay: Place the constant on the right side of the test drm/amd/powerplay: Remove useless variable drm/amd/powerplay: Don't cast kzalloc() return value drm/amdgpu: allow GTT overcommit during bind drm/amdgpu: linear validate first then bind to GART drm/amd/pp: Fix overflow when setup decf/pix/disp dpm table. drm/amd/pp: thermal control not enabled on vega10. drm/amdgpu: busywait KIQ register accessing (v4) drm/amdgpu: report more amdgpu_fence_info drm/amdgpu:don't check soft_reset for sriov drm/amdgpu:fix duplicated setting job's vram_lost drm/amdgpu:reduce wb to 512 slot drm/amdgpu: fix regresstion on SR-IOV gpu reset failed drm/amd/powerplay: Tidy up cz_dpm_powerup_vce() drm/amd/powerplay: Tidy up cz_dpm_powerdown_vce() drm/amd/powerplay: Tidy up cz_dpm_update_vce_dpm() drm/amd/powerplay: Tidy up cz_dpm_update_uvd_dpm() drm/amd/powerplay: Tidy up cz_dpm_powerup_uvd() drm/amd/powerplay: Tidy up cz_dpm_powerdown_uvd() drm/amd/powerplay: Tidy up cz_start_dpm() ...
2017-10-19drm/amd/powerplay: Place the constant on the right side of the testGeorgiana Chelu1-4/+4
Move the constant on the right side of the comparison in order to make the code easier to read. Issue found by checkpatch script: * WARNING: Comparisons should place the constant on the right side of the test Signed-off-by: Georgiana Chelu <georgiana.chelu93@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amd/powerplay: Remove useless variableGeorgiana Chelu1-2/+1
The result variable is initialized at the beginning of the function, but its value does not change during the function execution. Thus, remove the variable and return the SUCCESS value, which is 0. Issue found by coccinelle script: * Unneeded variable: "result". Return "0" Path to the cocci script: scripts/coccinelle/misc/returnvar.cocci Signed-off-by: Georgiana Chelu <georgiana.chelu93@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amd/powerplay: Don't cast kzalloc() return valueGeorgiana Chelu1-16/+8
The kzalloc function returns a void pointer and the assignment operator converts it to the type of pointer it is assigned to. Therefore, there is no need to cast. Issue found by alloc_cast.cocci: * WARNING: casting value returned by memory allocation function to <struct type> is useless. Path to the cocci script: scripts/coccinelle/api/alloc/alloc_cast.cocci Signed-off-by: Georgiana Chelu <georgiana.chelu93@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: allow GTT overcommit during bindChristian König1-3/+5
While binding BOs to GART we need to allow a bit overcommit in the GTT domain. Otherwise we can never use the full GART space when GART size=GTT size. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: linear validate first then bind to GARTChristian König1-9/+9
For VM emulation for old UVD/VCE we need to validate the BO with linear VRAM flag set first and then eventually bind it to GART. Validating with linear VRAM flag set can move the BO to GART making UVD/VCE read/write from an unbound GART BO. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> CC: stable@vger.kernel.org Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amd/pp: Fix overflow when setup decf/pix/disp dpm table.Rex Zhu1-4/+2
Clear the count in the single table setup function to avoid missing any tables. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amd/pp: thermal control not enabled on vega10.Rex Zhu2-1/+3
regression issue. caused by "f12f9f5e5d455edebc01" forget to set start_thermal_controller function point. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: busywait KIQ register accessing (v4)pding6-25/+71
Register accessing is performed when IRQ is disabled. Never sleep in this function. Known issue: dead sleep in many use cases of index/data registers. v2: - wrap polling fence functions. - don't trigger IRQ for polling in case of wrongly fence signal. v3: - handle wrap round gracefully. - add comments for polling function v4: - don't return negative timeout confused with error code Signed-off-by: pding <Pixel.Ding@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: report more amdgpu_fence_infopding1-0/+13
Only for GFX ring. This can help checking MCBP feature. The fence at the end of the frame will indicate the completion status. If the frame completed normally, the fence is written to the address given in the EVENT_WRITE_EOP packet. If preemption occurred in the previous IB the address is adjusted by 2 DWs. If work submitted in the frame was reset before completion, the fence address is adjusted by four DWs. In the case that preemption occurred, and before preemption completed a reset was initiated, the address will be adjusted with six DWs Signed-off-by: pding <Pixel.Ding@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu:don't check soft_reset for sriovMonk Liu1-0/+3
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Ack-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu:fix duplicated setting job's vram_lostMonk Liu2-2/+1
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu:reduce wb to 512 slotMonk Liu1-1/+1
with current WB usage we only use 57 slots, so 512 is extreamly sufficient, and reduce to 512 can make WB fit into one page. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: fix regresstion on SR-IOV gpu reset failedRex Zhu3-8/+14
fw ucode is corrupted after vf flr by PSP so ucode_init() is a must in psp_hw_init othewise KIQ/KCQ enabling will fail Revert "drm/amdgpu: refine code delete duplicated error handling" This reverts commit e57b87ff828f95efe992468e6d18c2c059b27aa9. Revert "drm/amdgpu: move amdgpu_ucode_init_bo to amdgpu_device.c" This reverts commit 815b8f8595148d06a64d2ce4282e8e80dfcb02f1. Reviewed-by: Monk Liu <monk.liu@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amd/powerplay: Tidy up cz_dpm_powerup_vce()Tom St Denis1-2/+1
Use PP_CAP macro. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amd/powerplay: Tidy up cz_dpm_powerdown_vce()Tom St Denis1-2/+1
Use PP_CAP macro. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amd/powerplay: Tidy up cz_dpm_update_vce_dpm()Tom St Denis1-11/+10
Use PP_CAP and tidy up indentation. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amd/powerplay: Tidy up cz_dpm_update_uvd_dpm()Tom St Denis1-7/+6
Use PP_CAP and tidy up indentation. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amd/powerplay: Tidy up cz_dpm_powerup_uvd()Tom St Denis1-12/+5
Use PP_CAP and simplify enable/disable logic. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amd/powerplay: Tidy up cz_dpm_powerdown_uvd()Tom St Denis1-4/+2
Use PP_CAP and tidy up indentation. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amd/powerplay: Tidy up cz_start_dpm()Tom St Denis1-7/+2
Remove unused variables. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: use ARRAY_SIZEJérémy Lefaure2-8/+10
Using the ARRAY_SIZE macro improves the readability of the code. Found with Coccinelle with the following semantic patch: @r depends on (org || report)@ type T; T[] E; position p; @@ ( (sizeof(E)@p /sizeof(*E)) | (sizeof(E)@p /sizeof(E[...])) | (sizeof(E)@p /sizeof(T)) ) Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Jérémy Lefaure <jeremy.lefaure@lse.epita.fr> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: reserve root PD while releasing itChristian König1-2/+11
Otherwise somebody could try to evict it at the same time and try to use half torn down structures. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/ttm: fix the fix for huge compound pagesChristian König1-5/+16
We don't use compound pages at the moment. Take this into account when freeing them. Signed-off-by: Christian König <christian.koenig@amd.comd> Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: bump version for vram lost counter query (v2)Alex Deucher1-1/+2
v2: vram -> VRAM in comment Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: minor CS optimizationChristian König1-18/+19
We only need to loop over all IBs for old UVD/VCE command stream patching. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amd/sched: fix job tear down order v2Christian König1-3/+2
Move the trace before we signal the scheduler fence and drop the scheduler fence reference directly before we free the job. v2: keep extra s_fence reference Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Liu, Monk <Monk.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: Add amdgpu_find_mm_node()Harish Kasiviswanathan1-22/+27
Replace some commonly repeated code with a function. v2: Use amdgpu_find_mm_node() in amdgpu_ttm_io_mem_pfn() Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: Refactor amdgpu_move_blitHarish Kasiviswanathan2-49/+132
Add more generic function amdgpu_copy_ttm_mem_to_mem() that supports arbitrary copy size, offsets and two BOs (source & dest.). This is useful for KFD Cross Memory Attach feature where data needs to be copied from BOs from different processes v2: Add struct amdgpu_copy_mem and changed amdgpu_copy_ttm_mem_to_mem() function parameters to use the struct v3: Minor function name change Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: Fix extra call to amdgpu_ctx_put.Andrey Grodzovsky1-4/+2
In amdgpu_cs_parser_init() in case of error handling amdgpu_ctx_put() is called without setting p->ctx to NULL after that, later amdgpu_cs_parser_fini() also calls amdgpu_ctx_put() again and mess up the reference count. Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/ttm: Fix unused variables with huge page supportTom St Denis1-1/+8
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: add VRAM lost queryChristian König1-0/+3
Allows userspace to figure out if VRAM was lost. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: set -ECANCELED when dropping jobsChristian König2-1/+7
And return from the wait functions the fence error code. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: move the VRAM lost counter per contextChristian König4-24/+8
Instead of per device track the VRAM lost per context and return ECANCELED instead of ENODEV. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: keep copy of VRAM lost counter in jobChristian König3-6/+10
Instead of reading the current counter from fpriv. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: partial revert VRAM lost handling v2Christian König3-20/+10
Keep blocking the CS, but revert everything else. Mapping BOs and info IOCTL are harmless and can still happen even when VRAM content ist lost. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/ttm: add transparent huge page support for wc or uc allocations v2Christian König1-27/+109
Add a new huge page pool and try to allocate from it when it makes sense. v2: avoid compound pages for now Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/ttm: move more logic into ttm_page_pool_get_pagesChristian König1-46/+52
Make it easier to add huge page pool. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/ttm: add transparent huge page support for cached allocations v2Christian König1-8/+42
Try to allocate huge pages when it makes sense. v2: avoid compound pages for now Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/ttm: don't use compound pages for nowChristian König1-0/+1
We need to figure out first how to correctly map them into the CPU page tables. bug: https://bugs.freedesktop.org/show_bug.cgi?id=103138 Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: correct reference clock value on vega10Ken Wang1-4/+1
Old value from bringup was wrong. Cc: stable@vger.kernel.org Signed-off-by: Ken Wang <Ken.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: SR-IOV data exchange between PF&VFHorace Chen4-0/+262
SR-IOV need to exchange some data between PF&VF through shared VRAM PF will copy some necessary firmware and information to the shared VRAM. It also requires some information from VF. PF will send a key through mailbox2 to help guest calculate checksum so that it can verify whether the data is correct. So check the data on the specified offset of the shared VRAM, if the checksum is right, read values from it and write some VF information next to the data from PF. Signed-off-by: Horace Chen <horace.chen@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: Move old fence waiting before reservation lock is aquired v2Andrey Grodzovsky3-10/+34
Helps avoiding deadlock during GPU reset. Added mutex to amdgpu_ctx to preserve order of fences on a ring. v2: Put waiting logic in a function in a seperate function in amdgpu_ctx.c Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: Refactor amdgpu_cs_ib_vm_chunk and amdgpu_cs_ib_fill.Andrey Grodzovsky1-51/+61
This enables old fence waiting before reservation lock is aquired which in turn is part of a bigger solution to deadlock happening when gpu reset with VRAM recovery accures during intensive rendering. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: make function uvd_v6_0_enc_get_destroy_msg staticColin Ian King1-2/+3
The function uvd_v6_0_enc_get_destroy_msg is local to the source and does not need to be in global scope, so make it static. Cleans up sparse warning: symbol 'uvd_v6_0_enc_get_destroy_msg' was not declared. Should it be static? Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-01-08 22:53:02 +0300