summaryrefslogtreecommitdiff
path: root/drivers/gpu
AgeCommit message (Collapse)AuthorFilesLines
2018-11-05gpu: ipu-v3: image-convert: store tile top/left positionPhilipp Zabel1-12/+15
Store tile top/left position in pixels in the tile structure. This will allow overlapping tiles with different sizes later. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Steve Longerbeam <slongerbeam@gmail.com> Tested-by: Steve Longerbeam <slongerbeam@gmail.com>
2018-11-05gpu: ipu-v3: image-convert: reconfigure IC per tilePhilipp Zabel1-21/+44
For differently sized tiles or if the resizing coefficients change, we have to stop, reconfigure, and restart the IC between tiles. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Steve Longerbeam <slongerbeam@gmail.com> Tested-by: Steve Longerbeam <slongerbeam@gmail.com>
2018-11-05gpu: ipu-v3: image-convert: calculate per-tile resize coefficientsPhilipp Zabel1-2/+234
Slightly modifying resize coefficients per-tile allows to completely hide the seams between tiles and to sample the correct input pixels at the bottom and right edges of the image. Tiling requires a bilinear interpolator reset at each tile start, which causes the image to be slightly shifted if the starting pixel should not have been sampled from an integer pixel position in the source image according to the full image resizing ratio. To work around this hardware limitation, calculate per-tile resizing coefficients that make sure that the correct input pixels are sampled at the tile end. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Steve Longerbeam <slongerbeam@gmail.com> Tested-by: Steve Longerbeam <slongerbeam@gmail.com>
2018-11-05gpu: ipu-v3: image-convert: prepare for per-tile configurationPhilipp Zabel1-25/+35
Let convert_start start from a given tile index, allocate intermediate tile with maximum tile size. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Steve Longerbeam <slongerbeam@gmail.com> Tested-by: Steve Longerbeam <slongerbeam@gmail.com>
2018-11-05gpu: ipu-v3: image-convert: Catch unaligned tile offsetsSteve Longerbeam1-24/+37
Catch calculated tile offsets that are not 8-byte aligned as required by the IDMAC engine and return error in calc_tile_offsets(). Signed-off-by: Steve Longerbeam <slongerbeam@gmail.com> Tested-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2018-11-05gpu: ipu-v3: image-convert: Remove need_abort flagSteve Longerbeam1-4/+1
The need_abort flag is not really needed anymore in __ipu_image_convert_abort(), remove it. No functional changes. Signed-off-by: Steve Longerbeam <slongerbeam@gmail.com> Tested-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2018-11-05gpu: ipu-v3: image-convert: Allow reentrancy into abortSteve Longerbeam1-3/+4
Allow reentrancy into ipu_image_convert_abort(), by moving re-init of ctx->aborted completion under the spin lock, and only if there is an active run, and complete all waiters do_bh(). Note: ipu_image_convert_unprepare() is still _not_ reentrant, and can't be made reentrant. Signed-off-by: Steve Longerbeam <slongerbeam@gmail.com> Tested-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2018-11-05gpu: ipu-v3: image-convert: Only wait for abort completion if active runSteve Longerbeam1-2/+7
Only wait for the ctx->aborted completion if there is an active run in progress, otherwise the wait will just timeout after 10 seconds. If there is no active run in progress, the done queue just needs to be emptied. Signed-off-by: Steve Longerbeam <slongerbeam@gmail.com> Tested-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2018-11-05gpu: ipu-v3: image-convert: Prevent race between run and unprepareSteve Longerbeam1-3/+7
Prevent possible race by parallel threads between ipu_image_convert_run() and ipu_image_convert_unprepare(). This involves setting ctx->aborting to true unconditionally so that no new job runs can be queued during unprepare, and holding the ctx->aborting flag until the context is freed. Note that the "normal" ipu_image_convert_abort() case (e.g. not during context unprepare) should clear the ctx->aborting flag after aborting any active run and clearing the context's pending queue. This is because it should be possible to continue to use the conversion context and queue more runs after an abort. Signed-off-by: Steve Longerbeam <slongerbeam@gmail.com> Tested-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2018-11-05gpu: ipu-v3: ipu-ic: allow to manually set resize coefficientsPhilipp Zabel1-19/+33
For tiled scaling, we want to compute the scaling coefficients externally in such a way that the interpolation overshoots tile boundaries and samples up to the first pixel of the next tile. Prepare to override the resizing coefficients from the image conversion code. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Steve Longerbeam <slongerbeam@gmail.com> Tested-by: Steve Longerbeam <slongerbeam@gmail.com>
2018-11-05gpu: ipu-v3: Add chroma plane offset overrides to ipu_cpmem_set_image()Steve Longerbeam2-24/+32
Allow the caller of ipu_cpmem_set_image() to override the latters calculation of the chroma plane offsets, by adding override U/V plane offsets to 'struct ipu_image'. Signed-off-by: Steve Longerbeam <slongerbeam@gmail.com> Tested-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2018-11-05gpu: ipu-cpmem: add WARN_ON_ONCE() for unaligned dma buffersSteve Longerbeam1-0/+6
Add a WARN_ON_ONCE() if either the Y/packed buffer, or the U/V offsets, are not aligned on 8-byte boundaries. This will catch alignment bugs in DRM, V4L2. Signed-off-by: Steve Longerbeam <slongerbeam@gmail.com> Tested-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2018-11-05drm/imx: imx-tve: constify clk_ops structureJulia Lawall1-1/+1
The clk_ops structure is only stored in the ops field of a clk_init_data structure. This field is const, so the clk_ops structure can be const as well. Identified and transformed using Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2018-11-05drm/imx: Switch to SPDX identifierFabio Estevam7-59/+7
Adopt the SPDX license identifier headers to ease license compliance management. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2018-11-05drm/vgem: create a render node for vgemEmil Velikov1-1/+2
VGEM doesn't do anything modeset specific, so in a way exposing a primary node is 'wrong'. At the same time, we extensively use if for creating dumb buffers, fences, prime fd <> handle imports/exports. To the point that we explicitly annotate the vgem fence ioctls as DRM_RENDER_ALLOW and have an IGT test which opens the render node. close(drm_open_driver_render(DRIVER_VGEM)) Better late than never, let's flip the switch. Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20181026120647.7528-1-emil.l.velikov@gmail.com
2018-11-05drm: sun4i: add support for H6 TCON TOPIcenowy Zheng1-0/+8
The TCON TOP on Allwinner H6 SoC is a cut down version of the R40 TCON TOP, which dropped TCON_TV1 and DSI (which do not exist on H6). Add support for it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181104182705.18047-27-jernej.skrabec@siol.net
2018-11-05drm: sun4i: add quirks for TCON TOPIcenowy Zheng1-9/+28
Some SoCs, such as H6, doesn't have a full-featured TCON TOP. Add quirks support for TCON TOP. Currently the presence of TCON_TV1 and DSI is controlled via the quirks structure. Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [Fixed code style and removed unnecessary initialization] Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181104182705.18047-25-jernej.skrabec@siol.net
2018-11-05drm/sun4i: Initialize registers in tcon-top driverJernej Skrabec1-0/+7
It turns out that TCON TOP registers in H6 SoC have non-zero reset value. This may cause issues if bits are not changed during configuration. To prevent that, initialize registers to 0. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181104182705.18047-24-jernej.skrabec@siol.net
2018-11-05drm/sun4i: Add support for H6 HDMI PHYJernej Skrabec1-0/+137
H6 has Synopsys DWC HDMI 2.0 TX PHY. There is no freely available documentation for it, only code found in BSP kernel. However, judging by the code, PHY is very similar to older Synopsys HDMI PHY described in i.MX6 documentation. Most registers seem to be the same. According to i.MX6 documentation, mpll settings are based on pixel clock and are not specific to each SoC. Because of that, mpll table in this commit is based on that documentation and not on BSP code. Other PHY settings were derived from BSP PHY driver code. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181104182705.18047-23-jernej.skrabec@siol.net
2018-11-05drm/sun4i: Add support for Synopsys HDMI PHYJernej Skrabec3-6/+24
Currently sun8i-hdmi-phy driver supports only custom PHYs connected to DW HDMI controller. Since newest Allwinner SoCs have unmodified Synopsys PHY, driver has to be reorganized to support them. Variant structure is expanded to allow differentiation between custom and Sysnopsys PHYs and to hold Synopsys PHY settings. Since DW HDMI bridge platform data has different fields for custom and Sysnopsys PHY, function sun8i_hdmi_phy_get_ops() is replaced with sun8i_hdmi_phy_set_ops(). Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181104182705.18047-22-jernej.skrabec@siol.net
2018-11-05drm/sun4i: dw-hdmi-phy: Reorder quirks by familyJernej Skrabec1-11/+11
Currently, quirks and compatibles are sorted alphabetically. However, they should be sorted by family release date and then alphabetically. Fix that by moving A64 quirks and compatible to bottom. No functional change is made. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181104182705.18047-21-jernej.skrabec@siol.net
2018-11-05drm/sun4i: Add support for H6 DW HDMI controllerJernej Skrabec1-0/+19
H6 has DW HDMI 2.0b controller v2.12a. It supports 4K at 60 Hz and HDCP 2.2. Reviewed-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181104182705.18047-20-jernej.skrabec@siol.net
2018-11-05drm/sun4i: dw-hdmi: Add quirk for setting TMDS clockJernej Skrabec2-1/+4
It turns out that H6 HDMI BSP kernel driver doesn't change TMDS rate at all. At this point it is not clear whether it is just not necessary or it would cause some kind of issues. Add a quirk for it. Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181104182705.18047-18-jernej.skrabec@siol.net
2018-11-05drm/sun4i: dw-hdmi: Make mode_valid function configurableJernej Skrabec2-4/+20
Since it is not possible to access sun8i-dw-hdmi driver private data inside mode_valid function, make it configurable. That way different versions of HDMI controllers can set different function, depending on it's limitations. Reviewed-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181104182705.18047-17-jernej.skrabec@siol.net
2018-11-05drm/sun4i: Not all DW HDMI controllers has scrambled addressesJernej Skrabec1-8/+15
Currently supported Allwinner SoCs with DW HDMI controller have scrambled addresses and read lock. However, that is not true in general. For example, A80 and H6 have normal addresses and normal read access. Move code for unscrambling addresses and unlocking read access to it's own function and call it from init function. Reviewed-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181104182705.18047-16-jernej.skrabec@siol.net
2018-11-05drm/bridge/synopsys: dw-hdmi: Enable workaround for v2.12aJernej Skrabec1-0/+1
It turns out that even new DW HDMI controllers exhibits same magenta line issues as older versions. Enable workaround for v2.12a. Reviewed-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181104182705.18047-15-jernej.skrabec@siol.net
2018-11-05drm/sun4i: Add support for H6 DE3 mixer 0Jernej Skrabec1-0/+13
Mixer 0 has 1 VI and 3 UI planes, scaler on all planes and can output 4K image @60Hz. It also support 10 bit colors, which are not yet implemented. Reviewed-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181104182705.18047-14-jernej.skrabec@siol.net
2018-11-05drm/sun4i: Add basic support for DE3Jernej Skrabec9-17/+202
Display Engine 3 is an upgrade of DE2 with new features like support for 10 bit color formats and support for AFBC. Most of DE2 code works with DE3, except some small details. Implement basic support for DE3. Support for 10 bit colort formats and AFBC, among others missing features, will be added later. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/260238/
2018-11-05drm/sun4i: Disable unused DE2 sub-enginesJernej Skrabec2-2/+11
Some sub-engines are unused. Disable them explicitly. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181104182705.18047-12-jernej.skrabec@siol.net
2018-11-05drm/sun4i: Fix DE2 mixer sizeJernej Skrabec2-1/+3
DE2 mixer is always 0x6000 bytes in size on all known SoCs. While at it, introduce a macro for that. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181104182705.18047-11-jernej.skrabec@siol.net
2018-11-05drm/sun4i: Rework DE2 register definesJernej Skrabec10-159/+219
Most, if not all, registers found in DE2 still exists in DE3. However, units are on different base addresses. To prepare for addition of DE3 support, registers macros are reworked so they take base address as parameter. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> [rebased] Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181104182705.18047-10-jernej.skrabec@siol.net
2018-11-05drm/exynos/fbdev: do not skip fbdev init if there are no connectorsAndrzej Hajda1-1/+1
Since connectors can be created dynamically, fbdev should be initialized even if there are no connectors at the moment. Otherwise fbdev will not be created even after connector's appearance. The patch fixes lack of fbdev on rinato and trats boards. Fixes: 6afb7721e2a0 ("drm/exynos: move connector creation to attach callback") Reported-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2018-11-05drm/exynos/dsi: register connector if it is created after drm bindAndrzej Hajda1-2/+8
DSI device can be attached after DRM device is registered. In such case newly created connector must be registered by exynos_dsi. The patch fixes exynos_drm on rinato and trats boards. Fixes: 6afb7721e2a0 ("drm/exynos: move connector creation to attach callback") Reported-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2018-11-05Revert "drm/exynos/decon5433: implement frame counter"Inki Dae3-21/+0
This reverts commit 0586feba322e1de05075700eb4b835c8b683e62b This patch makes it to need get_vblank_counter callback in crtc to get frame counter from decon driver. However, drm_dev->max_vblank_count is a member unique to vendor's DRM driver but in case of ARM DRM, some CRTC devices don't provide the frame counter value. As a result, this patch made extension and clone mode not working. Instead of this patch, we may need separated max_vblank_count which belongs to each CRTC device, or need to implement frame counter emulation for them who don't support HW frame counter. Signed-off-by: Inki Dae <inki.dae@samsung.com>
2018-11-05drm/exynos: checking for NULL instead of IS_ERR()Dan Carpenter1-1/+3
The of_drm_find_panel() function returns error pointers and never NULL but we the driver assumes that ->panel is NULL when it's not present. Fixes: 6afb7721e2a0 ("drm/exynos: move connector creation to attach callback") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2018-11-03i915/dp/fec: Cache the FEC_CAPABLE DPCD registerAnusha Srivatsa2-0/+13
Similar to DSC DPCD registers, let us cache FEC_CAPABLE register to avoid using stale values. With this we can avoid aux reads everytime and instead read the cached values. v2: Avoid using memset and array for a single field. (Manasi,Jani) v3: Print FEC CAPABILITY value. (Manasi) Suggested-by: Jani Nikula <jani.nikula@linux.intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Ville Syrjala <ville.syrjala@linux.intel.com> Cc: Manasi Navare <manasi.d.navare@intel.com> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Reviewed-by: Manasi Navare <manasi.d.navare@intel.com> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181102041455.15818-1-anusha.srivatsa@intel.com
2018-11-02drm/lease: drop EXPORT_SYMBOLDaniel Vetter1-4/+0
Leases are entirely implemented within drm.ko, no need to even tempt drivers into doing nasty things. And if there's really a need, we can always re-export these again. Cc: Keith Packard <keithp@keithp.com> Cc: Dave Airlie <airlied@gmail.com> Acked-by: Keith Packard <keithp@keithp.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181102143107.25722-1-daniel.vetter@ffwll.ch
2018-11-02drm/i915: Mark pin flags as u64Chris Wilson1-14/+14
Since the flags are being used to operate on a u64 variable, they too need to be marked as such so that the inverses are full width (and not zero extended on 32b kernels and bdw+). Reported-by: Sergii Romantsov <sergii.romantsov@globallogic.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: stable@vger.kernel.org Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181102161232.17742-2-chris@chris-wilson.co.uk
2018-11-02Merge tag 'drm-next-2018-11-02' of git://anongit.freedesktop.org/drm/drmLinus Torvalds29-170/+287
Pull drm fixes from Dave Airlie: "Pretty much a normal fixes pull pre-rc1, mostly amdgpu fixes, one i915 link training regression fix, and a couple of minor panel/bridge fixes and a panel quirk" * tag 'drm-next-2018-11-02' of git://anongit.freedesktop.org/drm/drm: (37 commits) drm/amdgpu: revert "enable gfxoff in non-sriov and stutter mode by default" drm/amd/pp: Print warning if od_sclk/mclk out of range drm/amd/pp: Fix pp_sclk/mclk_od not work on Vega10 drm/amd/pp: Fix pp_sclk/mclk_od not work on smu7 drm/amd/powerplay: no MGPU fan boost enablement on DPM disabled drm/amdgpu: Fix skipping hangged job reset during gpu recover. drm/amd/powerplay: revise Vega20 pptable version check drm/amd/display: set backlight level limit to 1 drm/panel: simple: Innolux TV123WAM is actually P120ZDG-BF1 dt-bindings: drm/panel: simple: Innolux TV123WAM is actually P120ZDG-BF1 drm/bridge: ti-sn65dsi86: Remove the mystery delay drm/panel: simple: Add "no-hpd" delay for Innolux TV123WAM drm/panel: simple: Support panels with HPD where HPD isn't connected dt-bindings: drm/panel: simple: Add no-hpd property drm/edid: Add 6 bpc quirk for BOE panel. drm/amdgpu: fix reporting of failed msg sent to SMU (v2) drm/amdgpu: Fix compute ring 1.0.0 failure after reset drm/amdgpu: fix VM leaf walking drm/amdgpu: fix amdgpu_vm_fini drm/amd/powerplay: commonize the API for retrieving current clocks ...
2018-11-02drm/i915/fia: FIA registers offset implementation.Anusha Srivatsa1-4/+6
The registers DPCSSS,DPSP,DPMLE1 and DPPMS are all at an offset from the base - which is the FLexi IO Adaptor. Lets follow the offset calculation while accessing these registers. v2: - Follow spec for numbering - s/0/1(Lucas) - s/FIA_1/FIA1_BASE (Anusha) v3: - Remove register offset defines. (Jani) - Update comment. (Anusha) v4: rebase. Remove comment.(Lucas) Cc: Jani Nikula <jani.nikula@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181101185557.29585-1-anusha.srivatsa@intel.com
2018-11-02drm/i915: Allow "max bpc" property to limit pipe_bppRadhakrishna Sripada3-21/+38
Use the newly added "max bpc" connector property to limit pipe bpp. V3: Use drm_connector_state to access the "max bpc" property V4: Initialize the drm property, add suuport to DP(Ville) V5: Use the property in the connector and fix CI failure(Ville) V6: Use the core function to attach max_bpc property, remove the redundant clamping of pipe bpp based on connector info V7: Fix Checkpatch warnings V9: Cleanup connected_sink_max_bpp and fix initial value in DP(Ville) V12: Fix debug message(Ville) V13: Remove the redundant check and simplify the check logic(Stan) V14: Fix the check in connected_sink_max_bpp(Stan) v15 (From Manasi): Add missing break (Stan) Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Kishore Kadiyala <kishore.kadiyala@intel.com> Cc: Manasi Navare <manasi.d.navare@intel.com> Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181023014400.16055-1-manasi.d.navare@intel.com
2018-11-02drm: Add connector property to limit max bpcRadhakrishna Sripada4-0/+54
At times 12bpc HDMI cannot be driven due to faulty cables, dongles level shifters etc. To workaround them we may need to drive the output at a lower bpc. Currently the user space does not have a way to limit the bpc. The default bpc to be programmed is decided by the driver and is run against connector limitations. Creating a new connector property "max bpc" in order to limit the bpc. xrandr can make use of this connector property to make sure that bpc does not exceed the configured value. This property can be used by userspace to set the bpc. V2: Initialize max_bpc to satisfy kms_properties V3: Move the property to drm_connector V4: Split drm and i915 components(Ville) V5: Make the property per connector(Ville) V6: Compare the requested bpc to connector bpc(Daniel) Move the attach_property function to core(Ville) V7: Fix checkpatch warnings V8: Simplify the connector check code(Ville) V9: Const display_info(Ville) V10,V11: Fix CI issues. V12: Add the Kernel documentation(Daniel) V14: Crossreference the function name in the doc(Daniel) Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Kishore Kadiyala <kishore.kadiyala@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Manasi Navare <manasi.d.navare@intel.com> Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Cc: Sunpeng Li <sunpeng.li@amd.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181012184233.29250-1-radhakrishna.sripada@intel.com
2018-11-02drm/selftests: Fix build warning -Wframe-larger-thanAlexandru-Cosmin Gheorghe1-14/+16
It seems for some random configuration drm_device is bigger than 2048 bytes. The fix is to make the mock objects static variables. Bug reported by 0-DAY Kernel test infrastructure here: https://lists.01.org/pipermail/kbuild-all/2018-November/054431.html Fixes: 6ff3d9ffdcbb ("drm/selftests: Add tests for drm_internal_framebuffer_create") Signed-off-by: Alexandru-Cosmin Gheorghe <alexandru-cosmin.gheorghe@arm.com> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181102130103.7753-1-alexandru-cosmin.gheorghe@arm.com
2018-11-02drm/i915: Update DRIVER_DATE to 20181102Jani Nikula1-2/+2
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2018-11-02drm/selftests: Add tests for drm_internal_framebuffer_createAlexandru Gheorghe4-1/+347
Add tests that verify that drm_internal_framebuffer_create creates buffers correctly by creating a dummy drm_device with a mock function for the fb_create callback. To decide if a buffer has been created or not it just checks if fb_create callback has been called for the particular drm_mode_fb_cmd2 that's being tested. Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Alexandru Gheorghe <alexandru-cosmin.gheorghe@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181101151051.1509-8-alexandru-cosmin.gheorghe@arm.com
2018-11-02drm: Add macro to export functions only when CONFIG_DRM_DEBUG_SELFTEST is ↵Alexandru Gheorghe1-0/+1
enabled If we want to be able to write drmselftests for non-static core functions that are not intended to be used by drivers we need this functions to be exported. This adds a macro that is tied of CONFIG_DRM_DEBUG_SELFTEST, and uses that to export drm_internal_framebuffer_create, in order for subsequent patches to be able to test it. Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Alexandru Gheorghe <alexandru-cosmin.gheorghe@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181101151051.1509-7-alexandru-cosmin.gheorghe@arm.com
2018-11-02drm/selftests: Add tests for drm_format_info* helpersAlexandru Gheorghe4-1/+288
Add selftests for the following newly added functions: - drm_format_info_block_width - drm_format_info_block_height - drm_format_info_min_pitch Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Alexandru Gheorghe <alexandru-cosmin.gheorghe@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181101151051.1509-6-alexandru-cosmin.gheorghe@arm.com
2018-11-02drm: Extend framebuffer_check to handle formats with cpp/char_per_block 0Alexandru Gheorghe1-1/+7
For formats that are supported only with non-linear modifiers it doesn't make to much sense to define cpp or char_per_block, so that will be set to 0. This patch adds a restriction to force having a modifier attached when cpp/char_per_block is 0, and to bypass checking the pitch restriction. This had been discussed here. [1] https://people.freedesktop.org/~cbrill/dri-log/?channel=dri-devel&highlight_names=&date=2018-09-13&show_html=true Reviewed-by: Brian Starkey <brian.starkey@arm.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Alexandru Gheorghe <alexandru-cosmin.gheorghe@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181101151051.1509-5-alexandru-cosmin.gheorghe@arm.com
2018-11-02drm: mali-dp: Enable Mali-DP tiled buffer formatsAlexandru Gheorghe2-6/+36
Enable the following formats - DRM_FORMAT_X0L0: DP650 - DRM_FORMAT_X0L2: DP550, DP650 Reviewed-by: Brian Starkey <brian.starkey@arm.com> Signed-off-by: Alexandru Gheorghe <alexandru-cosmin.gheorghe@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181101151051.1509-4-alexandru-cosmin.gheorghe@arm.com
2018-11-02drm/fourcc: Add fourcc for Mali linear tiled formatsAlexandru Gheorghe1-0/+12
Mali-DP implements a number of tiled yuv formats which are not currently described in drm_fourcc.h. This adds those definitions and describes their memory layout by using the newly added char_per_block, block_w, block_h. Reviewed-by: Brian Starkey <brian.starkey@arm.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Alexandru Gheorghe <alexandru-cosmin.gheorghe@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181101151051.1509-3-alexandru-cosmin.gheorghe@arm.com
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-30 15:07:25 +0300