kernel/linux.git - Linux kernel stable tree (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2014-01-30	drm/nouveau: fix lock unbalance in nouveau_crtc_page_flip	Maarten Lankhorst	1	-1/+1
2014-01-30	drm/nouveau: implement hooks for needed for drm vblank timestamping support	Ben Skeggs	3	-0/+86
2014-01-30	drm/nouveau/disp: add a method to fetch info needed by drm vblank timestamping	Ben Skeggs	10	-7/+146
2014-01-30	drm/nv50: fill in crtc mode struct members from crtc_mode_fixup	Ben Skeggs	1	-0/+1
2014-01-23	drm/nouveau: call drm_vblank_cleanup() earlier	Ben Skeggs	1	-2/+2
2014-01-23	drm/nouveau: create base display from common code	Ben Skeggs	6	-31/+31
2014-01-23	drm/nv50/gr: print mpc trap name when it's not an mp trap	Ilia Mirkin	1	-0/+20
2014-01-23	drm/nv50/gr: update list of mp errors, make it a bitfield	Ilia Mirkin	1	-8/+10
2014-01-23	drm/nv50/gr: add more trap names to print on error	Ilia Mirkin	1	-58/+70
2014-01-23	drm/nouveau/devinit: lock/unlock crtc regs for all devices, not just pre-nv50	Ilia Mirkin	4	-10/+35
2014-01-23	drm/nouveau: hold mutex while syncing to kernel channel	Maarten Lankhorst	1	-7/+8
2014-01-23	drm/nv50-/devinit: prevent use of engines marked as disabled by hw/vbios	Ilia Mirkin	17	-35/+287
2014-01-23	drm/nouveau/device: provide a way for devinit to mark engines as disabled	Ilia Mirkin	2	-5/+19
2014-01-23	drm/nouveau/devinit: tidy up the subdev class definition	Ben Skeggs	22	-283/+209
2014-01-23	drm/nouveau/bar: tidy up the subdev and object class definitions	Ben Skeggs	7	-25/+38
2014-01-23	drm/nouveau/instmem: tidy up the object class definition	Ben Skeggs	7	-114/+127
2014-01-23	drm/nouveau/instmem: tidy up the subdev class definition	Ben Skeggs	15	-208/+223
2014-01-23	drm/nouveau/pwr: implement a simple i2c stack	Ben Skeggs	11	-279/+2066
2014-01-23	drm/nouveau/pwr: have rd/wr32 routines clobber data instead of addr	Ben Skeggs	5	-65/+67
2014-01-23	drm/nve0/fb: turn off some bits in 10f584 at init	Ben Skeggs	1	-0/+1
2014-01-23	drm/nve0/fb/gddr5: merge a fix from ddr3 for one of the timing settings	Ben Skeggs	1	-2/+5
2014-01-23	drm/nve0/fb/gddr5: yet another random 10f200 bit	Ben Skeggs	3	-0/+10
2014-01-23	drm/nvc0-/fb: hook up skeleton interrupt handler	Ben Skeggs	2	-0/+18
2014-01-23	drm/nve0/fb/gddr5: more 10f200 stuff	Ben Skeggs	1	-3/+5
2014-01-23	drm/nve0/clk: report ddr memory frequency	Ben Skeggs	1	-1/+1
2014-01-23	drm/nouveau/fb/gddr5: make sure we update mr7 when we're supposed to	Ben Skeggs	1	-4/+13
2014-01-23	drm/nve0/fb/gddr5: 10f698/69c	Ben Skeggs	1	-1/+5
2014-01-23	drm/nve0/fb: it's now safe to obey the memory voltage setting properly	Ben Skeggs	1	-2/+2
2014-01-23	drm/nve0/fb: multi-stage reclock is required for certain transitions	Ben Skeggs	2	-16/+70
2014-01-23	drm/nouveau/clk: allow fb to signal it needs to do a multi-stage reclock	Ben Skeggs	1	-3/+6
2014-01-23	drm/nve0/fb/gddr5: parse bios data into struct rather than using directly	Ben Skeggs	10	-218/+412
2014-01-23	drm/nve0/fb/gddr5: found LP3 setting	Ben Skeggs	2	-7/+8
2014-01-23	drm/nve0/fb: note the memory voltage toggle, not using it yet	Ben Skeggs	2	-4/+4
2014-01-23	drm/nve0/fb/gddr5: somewhat better attempt at 100770/10f604/610/614	Ben Skeggs	1	-14/+47
2014-01-23	drm/nve0/fb/gddr5: fixup delays a bit	Ben Skeggs	1	-2/+1
2014-01-23	drm/nouveau/bios: timing 2.0 entries can have subentries	Ben Skeggs	6	-23/+34
2014-01-23	drm/nve0/fb/gddr5: note another semi-unknown	Ben Skeggs	1	-14/+17
2014-01-23	drm/nouveau/fb/gddr5: modify mr8 with high bits of CL/WR	Ben Skeggs	1	-0/+4
2014-01-23	drm/nve0/fb/gddr5: fix calculation of RDQS setting	Ben Skeggs	1	-0/+1
2014-01-23	drm/nve0/fb/gddr5: switch off some other random bit at some point	Ben Skeggs	1	-1/+1
2014-01-23	drm/nve0/fb/gddr5: punt all 10f910/914 accesses through ram_train	Ben Skeggs	1	-12/+9
2014-01-23	drm/nve0/fb/gddr5: not all memory partitions are created equal	Ben Skeggs	4	-15/+76
2014-01-23	drm/nve0/fb: typo in register name	Ben Skeggs	1	-4/+4
2014-01-23	drm/nouveau/bios: make common code to handle ramcfg strap etc	Ben Skeggs	8	-91/+86
2014-01-23	drm/nve0/fb/gddr5: fix an assumption of sane memory controller layout	Ben Skeggs	1	-7/+10
2014-01-23	drm/nve0/fb/gddr5: fix behaviour of lp3 setting	Ben Skeggs	2	-2/+5
2014-01-23	drm/nve0/fifo: recover from mmu faults on bar1/bar3	Ben Skeggs	2	-12/+22
2014-01-23	drm/nve0/fifo: keep mmu fault interrupts enabled at all times	Ben Skeggs	1	-1/+16
2014-01-23	drm/nve0/fifo: update human-readable mmu fault descriptions	Ben Skeggs	1	-11/+87
2014-01-23	drm/nve0/fifo: document more intr status bits	Ben Skeggs	1	-5/+72