summaryrefslogtreecommitdiff
path: root/drivers/gpu
AgeCommit message (Collapse)AuthorFilesLines
2012-05-24drm/nvc0/pm: very initial mclk freq changeBen Skeggs1-1/+23
Loads of magic missing, this will probably blow up if you try it. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-05-24drm/nvd9/pm: oops, fix timing calcBen Skeggs1-0/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-05-24drm/nvc0/pm: enable mpll src pll, and calc mpll coefficientsBen Skeggs1-0/+51
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-05-24drm/nvc0/pm: start filling in memory reclocking stubsBen Skeggs1-0/+116
2012-05-24drm/nva3/pm: another few magic regs, and slightly better 0x004018 handlingBen Skeggs1-4/+15
Not entirely convinced 0x004018 transitions are correct yet, but, it's an improvement. The 750MHz value comes from fiddling with the binary driver + coolbits on two different DDR3 NVA8 chipsets (T510 NVS3100M, and NVS300), not a clue where this number comes from. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-05-24drm/nva3/pm: initial attempt at handling 111100/111104Ben Skeggs1-0/+21
Probably not quite right, but this is enough now to make NVS300 reclock between all 3 of its perflvls correctly. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-05-24drm/nva3/pm: make pll->pll mode workBen Skeggs1-6/+21
This probably wants a cleanup, but I'm holding off until I know for sure how the rest of the things that need doing fit together. Tested on NVS300 by hacking up perflvl 1 to require PLL mode, and switching between perflvl 3 and 1. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-05-24drm/nva3/pm: attempt to bash a few 0x100200 bits correctlyBen Skeggs1-20/+46
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-05-24drm/nva3/pm: begin to restructure memory clock changes + another magicBen Skeggs1-8/+40
The binary driver appears to do various bits and pieces of the memory clock frequency change at different times, depending on the particular transition that's occuring. I've attempted to replicate this here for div->pll, pll->div and div->div transitions. With some additional (patches upcoming) magic regs being bashed, this allows me to correctly transition between all 3 perflvls on NVS300. pll->pll transitions will *not* work correctly at the moment, pending me tricking the binary driver into doing one and seeing how to correctly handle it. This patch also handles (hopefully) 0x1110e0, which appears to need changing depending on whether in PLL or divider mode.. Maybe. We'll see. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-05-24drm/nva3/pm: more random unknown PFB regsBen Skeggs1-1/+23
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-05-24drm/nva3/pm: initial attempt at more magic PFB regsBen Skeggs3-3/+28
The reg calculation may get moved elsewhere at some point, but lets figure out what exactly we need to do first. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-05-24drm/nva3/pm: hook up to ram reclocking helperBen Skeggs1-12/+110
This gets us a start on memory timings. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-05-24drm/nva3/pm: introduce more paranoiaBen Skeggs1-5/+10
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-05-23drm/nouveau/radeon: add static const to the dma-buf ops.Dave Airlie2-2/+2
Reported-by: wfg@linux.intel.com Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-23drm/i915: make some dmabuf things staticDave Airlie1-4/+4
these functions and the table can all be static/static const. Reported-by: wfg@linux.intel.com Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-23drm: update ast/cirrus/mgag200 for change in TTM apiDave Airlie3-3/+3
New drivers merged after changes were done in prime TTM code. Fix build. Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-23drm/radeon: add PRIME support (v2)Alex Deucher17-25/+232
This adds prime->fd and fd->prime support to radeon. It passes the sg object to ttm and then populates the gart entries using it. Compile tested only. v2: stub kmap + use new helpers + add reimporting Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-23i915: add dmabuf/prime buffer sharing support.Daniel Vetter6-6/+239
This adds handle->fd and fd->handle support to i915, this is to allow for offloading of rendering in one direction and outputs in the other. v2 from Daniel Vetter: - fixup conflicts with the prepare/finish gtt prep work. - implement ppgtt binding support. Note that we have squat i-g-t testcoverage for any of the lifetime and access rules dma_buf/prime support brings along. And there are quite a few intricate situations here. Also note that the integration with the existing code is a bit hackish, especially around get_gtt_pages and put_gtt_pages. It imo would be easier with the prep code from Chris Wilson's unbound series, but that is for 3.6. Also note that I didn't bother to put the new prepare/finish gtt hooks to good use by moving the dma_buf_map/unmap_attachment calls in there (like we've originally planned for). Last but not least this patch is only compile-tested, but I've changed very little compared to Dave Airlie's version. So there's a decent chance v2 on drm-next works as well as v1 on 3.4-rc. v3: Right when I've hit sent I've noticed that I've screwed up one obj->sg_list (for dmar support) and obj->sg_table (for prime support) disdinction. We should be able to merge these 2 paths, but that's material for another patch. v4: fix the error reporting bugs pointed out by ickle. v5: fix another error, and stop non-gtt mmaps on shared objects stop pread/pwrite on imported objects, add fake kmap Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-05-23nouveau: add PRIME supportDave Airlie16-25/+296
This adds prime->fd and fd->prime support to nouveau, it passes the SG object to TTM, and then populates the GART entries using it. v2: add stubbed kmap + use new function to fill out pages array for faulting + add reimport test. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-23ttm: add prime sharing support to TTM (v2)Dave Airlie4-5/+18
This adds the ability for ttm common code to take an SG table and use it as the backing for a slave TTM object. The drivers can then populate their GTT tables using the SG object. v2: make sure to setup VM for sg bos as well. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-23udl: add prime fd->handle support.Dave Airlie4-1/+92
udl can only be used as an output offload so doesn't need to support handle->fd direction. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-23drm/prime: add exported buffers to current fprivs imported buffer list (v2)Dave Airlie2-6/+27
If userspace attempts to import a buffer it exported on the same device, we need to return the same GEM handle for it, not a new handle pointing at the same GEM object. v2: move removals into a single fn, no need to set to NULL. (Chris Wilson) Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-23drm/prime: introduce sg->pages/addr arrays helperDave Airlie1-0/+36
the ttm drivers need this currently, in order to get fault handling working and efficient. It also allows addrs to be NULL for devices like udl. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-22drm: add plane propertiesRob Clark1-0/+19
The omapdrm driver uses this for setting per-overlay rotation. It is likely also useful for setting YUV->RGB colorspace conversion matrix, etc. Signed-off-by: Rob Clark <rob@ti.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-22drm: add bitmask property typeRob Clark1-3/+44
A bitmask property is similar to an enum. The enum value is a bit position (0-63), and valid property values consist of a mask of zero or more of (1 << enum_val[n]). [airlied: 1LL -> 1ULL] Signed-off-by: Rob Clark <rob@ti.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-22Merge branch 'exynos-drm-next' of ↵Dave Airlie19-431/+1975
git://git.infradead.org/users/kmpark/linux-samsung into drm-core-next * 'exynos-drm-next' of git://git.infradead.org/users/kmpark/linux-samsung: drm/exynos: add G2D driver drm/exynos: added vp scaling feature for hdmi drm/exynos: added source size to overlay structure drm/exynos: add additional display mode for hdmi drm/exynos: enable dvi mode for dvi monitor drm/exynos: fixed wrong pageflip finish event for interlace mode drm/exynos: add PM functions for hdmi and mixer drm/exynos: add dpms for hdmi drm/exynos: use threaded irq for hdmi hotplug drm/exynos: use platform_get_irq_byname for hdmi drm/exynos: cleanup for hdmi platform data drm/exynos: added a feature to get gem buffer information. drm/exynos: added drm prime feature. drm/exynos: added cache attribute support for gem. vgaarb: Provide dummy default device functions
2012-05-22drm: Make the CRTC gamma_set operation optionalLaurent Pinchart2-0/+8
Drivers for hardware without gamma support should not be forced to implement a no-op gamma set operation. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Rob Clark <rob.clark@linaro.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-22drm: Constify drm_mode_config_funcs pointerLaurent Pinchart7-7/+7
The DRM mode config functions structure declared by drivers and pointed to by the drm_mode_config funcs field is never modified. Make it a const pointer. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Inki Dae <inki.dae@samsung.com> Cc: Alan Cox <alan@linux.intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Ben Skeggs <bskeggs@redhat.com> Cc: Thomas Hellstrom <thellstrom@vmware.com> Cc: Rob Clark <rob.clark@linaro.org> Reviwed-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-22drm: Constify gem_vm_ops pointerLaurent Pinchart5-5/+5
The GEM vm operations structure is passed to the VM core that stores it in a const field. There vm operations structures can thus be const in DRM as well. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Inki Dae <inki.dae@samsung.com> Cc: Alan Cox <alan@linux.intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Rob Clark <rob.clark@linaro.org> Reviewed-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-22drm: Miscellaneous typo fixes and documentation updatesLaurent Pinchart2-5/+5
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-22drm: Don't initialize local ret variable when not neededLaurent Pinchart9-32/+24
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-22drm: Delete the vblank timer synchronously at cleanup timeLaurent Pinchart1-1/+1
A race condition exists in drm_vblank_cleanup() if the vblank disable timer callback runs after freeing the memory that its callback function tries to access. Fix this by deleting the timer synchronously. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-22drm/backlight: initialize struct backlight_properties properlyCorentin Chary2-0/+2
The power field was never correctly initialized. [airlied: just took the two drm specific bits] Signed-off-by: Corentin Chary <corentin.chary@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-22drm/nouveau/dp: Probe branch/sink OUIs (v2)Adam Jackson1-0/+21
(airlied: v2: fix missing struct - fixes compile) Signed-off-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-22drm/radeon/dp: Probe branch/sink OUIsAdam Jackson1-0/+20
Signed-off-by: Adam Jackson <ajax@redhat.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-22drm/i915/dp: Probe branch/sink OUIsAdam Jackson1-0/+19
Signed-off-by: Adam Jackson <ajax@redhat.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-22gma500: Fix Poulsbo suspend/resume crash on devices with SDVO portsAlan Cox1-2/+4
Reported-by: Guillaume Clément <guillaume@baobob.org> Signed-off-by: Alan Cox <alan@linux.intel.com> Cc: stable@vger.kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-22gma500: handle poulsbo cursor restrictionPatrik Jakobsson7-12/+61
Poulsbo needs a physical address in the cursor base register. We allocate a stolen memory buffer and copy the cursor image provided by userspace into it. When/If we get our own userspace driver we can map this stolen memory directly. The patch also adds a mark in chip ops so we can identify devices that has this requirement. Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-22gma500: Prevent endless loop in panel power up sequenceAlan Cox1-3/+9
Some devices don't have a panel connected to LVDS and thus will never power up. This patch checks the power sequence progress bits in PP_STATUS to prevent an endless loop on such devices. Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com> Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-22drm/radeon/hdmi: compile audio status in 1 functionRafał Miłecki4-104/+73
This optmizes calls, registers reads and assignments. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-22nouveau: nouveau_set_bo_placement takes TTM flagsDave Airlie1-1/+1
This seems to be wrong to me, spotted while thinking about dma-buf. Reviewed-by: Ben Skeggs <bskeggs@redhat.com> Cc: stable@vger.kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-21Merge tag 'drm-intel-next-2012-05-20' of ↵Dave Airlie20-290/+1621
git://people.freedesktop.org/~danvet/drm-intel into drm-core-next Daniel wrote: The last pull I'd like to squeeze into 3.5, safe for the hsw stuff mostly bugfixes: - last few patches for basic hsw enabling (Eugeni, infoframe support by Paulo) - Fix up infoframe support, we've hopefully squashed all the cargo-culting in there (Paulo). Among all the issues, this finally fixes some of the infoframe regressions seen on g4x and snb systems. - Fixup sdvo infoframe support, this fixes a regression from 2.6.37. - Correctly enable semaphores on snb, we've enabled it already for 3.5, but the dmar check was slightly wrong. - gen6 irq fixlets from Chris. - disable gmbus on i830, the hw seems to be simply broken. - fix up the pch pll fallout (Chris & me). - for_each_ring macro from Chris - I've figured I'll merge this now to avoid backport pain. - complain when the rps state isn't what we expect (Chris). Note that this is shockingly easy to hit and hence pretty much will cause a regression report. But it only tells us that the gpu turbo state got out of whack, a problem we know off since a long time (it cause the gpu to get stuck a a fixed frequency, usually the lowest one). Chris is working on a fix, but we haven't yet found a magic formula that works perfectly (only patches that massively reduce the frequency of this happening). - MAINTAINERS patch, I'm now officially the guy to beat up." * tag 'drm-intel-next-2012-05-20' of git://people.freedesktop.org/~danvet/drm-intel: (57 commits) drm/i915: IBX has a fixed pch pll to pch pipe mapping drm/i915: implement hsw_write_infoframe drm/i915: small hdmi coding style cleanups drm/i915: fixup infoframe support for sdvo drm/i915: Enable the PCH PLL for all generations after link training drm/i915: Convert BUG_ON(!pll->active) and friends to a WARN drm/i915: don't clobber the pipe param in sanitize_modesetting drm/i915: disable gmbus on i830 drm/i915: Replace the feature tests for BLT/BSD with ring init checks drm/i915: Check whether the ring is initialised prior to dispatch drm/i915: Introduce for_each_ring() macro drm/i915: Assert that the transcoder is indeed off before modifying it drm/i915: hook Haswell devices in place drm/i915: prepare HDMI link for Haswell drm/i915: move HDMI structs to shared location drm/i915: add WR PLL programming table drm/i915: add support for DDI-controlled digital outputs drm/i915: detect digital outputs on Haswell drm/i915: program iCLKIP on Lynx Point drm/i915: program WM_LINETIME on Haswell ...
2012-05-20drm/i915: IBX has a fixed pch pll to pch pipe mappingDaniel Vetter1-0/+11
This should fix breakage introduced in commit ee7b9f93fd96a72e5d09e2b44024c11880873c6b Author: Jesse Barnes <jbarnes@virtuousgeek.org> Date: Fri Apr 20 17:11:53 2012 +0100 drm/i915: manage PCH PLLs separately from pipes v2: Add a DRM_DEBUG_KMS message to explain why a given pll was selected, suggested by Chris Wilson. v3: Actually run git add. Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=49712 Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-05-20drm/i915: implement hsw_write_infoframePaulo Zanoni2-5/+52
Both the control and data registers are completely different now. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-05-20drm/i915: small hdmi coding style cleanupsPaulo Zanoni1-31/+13
- Changed the coding style of auxiliary infoframe functions to make them smaller - Fixed the column alignment of some function definitions - Remove definition of "struct drm_crtc" in some places as they're used only to retrieve "struct intel_crtc" Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-05-20drm/i915: fixup infoframe support for sdvoDaniel Vetter2-4/+11
At least the worst offenders: - SDVO specifies that the encoder should compute the ecc. Testing also shows that we must not send the ecc field, so copy the dip_infoframe struct to a temporay place and avoid the ecc field. This way the avi infoframe is exactly 17 bytes long, which agrees with what the spec mandates as a minimal storage capacity (with the ecc field it would be 18 bytes). - Only 17 when sending the avi infoframe. The SDVO spec explicitly says that sending more data than what the device announces results in undefined behaviour. - Add __attribute__((packed)) to the avi and spd infoframes, for otherwise they're wrongly aligned. Noticed because the avi infoframe ended up being 18 bytes large instead of 17. We haven't noticed this yet because we don't use the uint16_t fields yet (which are the only ones that would be wrongly aligned). This regression has been introduce by 3c17fe4b8f40a112a85758a9ab2aebf772bdd647 is the first bad commit commit 3c17fe4b8f40a112a85758a9ab2aebf772bdd647 Author: David Härdeman <david@hardeman.nu> Date: Fri Sep 24 21:44:32 2010 +0200 i915: enable AVI infoframe for intel_hdmi.c [v4] Patch tested on my g33 with a sdvo hdmi adaptor. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=25732 Tested-by: Peter Ross <pross@xvid.org> (G35 SDVO-HDMI) Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-05-20drm/kms: fix Kconfig for new drivers.Dave Airlie3-3/+6
Reported-by: Jiri Slaby <jslaby@suse.cz> Reported-by: Jonathan Nieder <jrnieder@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-20drm/i915: Enable the PCH PLL for all generations after link trainingChris Wilson1-2/+2
Hidden away within one chipset specific path was the necessary logic to turn on the PLL. This needs to be done everywhere in order for us to drive any display! As such as soon as we tested on a non-CougarPoint chipset, we failed to bring up any DisplayPorts and generated a nice set of assertion failures in the process. At least one part of our logic is working, the part that assumes that we have no idea what we are doing. Reported-by: guang.a.yang@intel.com References: https://bugs.freedesktop.org/show_bug.cgi?id=49712 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-05-20drm/i915: Convert BUG_ON(!pll->active) and friends to a WARNChris Wilson1-6/+15
Turn a fatal lockup into a merely blank display with lots of shouty messages. v2: Whilst in the area, convert the other BUG_ON into less fatal errors. In particular, note that we may be called on a PCH platform not using PLLs, such as Haswell, and so we do not always want to BUG_ON(!pll) Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-05-20drm/i915: don't clobber the pipe param in sanitize_modesettingDaniel Vetter1-2/+3
... we need it later on in the function to clean up pipe <-> plane associations. This regression has been introduced in commit f47166d2b0001fcb752b40c5a2d4db986dfbea68 Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Thu Mar 22 15:00:50 2012 +0000 drm/i915: Sanitize BIOS debugging bits from PIPECONF Spotted by staring at debug output of an (as it turns out) totally unrelated bug. v2: I've totally failed to do the s/pipe/i/ correctly, spotted by Chris Wilson. Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Cc: stable@kernel.org (the regression was Cc: stable, too) Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>