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path: root/drivers/gpu
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2010-12-17Merge remote branch 'airlied/drm-core-next' into drm-intel-nextChris Wilson105-5084/+10693
2010-12-16drm/radeon/kms: properly print ontario chip idAlex Deucher1-0/+1
2010-12-16drm/radeon/kms: fix vram start calculation on ontario (v2)Alex Deucher4-13/+8
2010-12-16Merge remote branch 'nouveau/drm-nouveau-next' of ../drm-nouveau-next into dr...Dave Airlie62-4014/+6599
2010-12-16drm/ttm: delay freeing of old node during move_memcpy until after iounmapBen Skeggs1-1/+1
2010-12-16drm/radeon: add initial tracepoint support.Dave Airlie5-1/+101
2010-12-16drm/nv50: fix a couple of vm init issuesFrancisco Jerez1-6/+7
2010-12-15drm/i915: Add frame buffer compression on SandybridgeYuanhan Liu4-3/+20
2010-12-15drm/i915: Add self-refresh support on SandybridgeYuanhan Liu3-18/+334
2010-12-15drm/i915: Wait for vblank before unpinning old fbChris Wilson1-1/+3
2010-12-15Revert "drm/i915: Avoid using PIPE_CONTROL on Ironlake"Chris Wilson2-3/+162
2010-12-14drm/i915: Pass clock limits down to PLL matcherChris Wilson1-18/+16
2010-12-14drm/i915: Poll for seqno completion if IRQ is disabledChris Wilson1-2/+4
2010-12-14drm/i915/ringbuffer: Make IRQ refcnting atomicChris Wilson4-46/+56
2010-12-09Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson10-69/+79
2010-12-09drm/i915/sdvo: Only use the SDVO pin if it is in the valid rangeChris Wilson1-3/+6
2010-12-09drm/i915: Enable RC6 autodownclocking on SandybridgeChris Wilson2-0/+148
2010-12-09drm/i915: Terminate the FORCE WAKE after we have finished readingChris Wilson3-9/+35
2010-12-09drm/i915/gtt: Clear the cachelines upon resumeChris Wilson1-1/+2
2010-12-09drm/i915: Restore GTT mapping first upon resumeChris Wilson1-1/+6
2010-12-09drm/i915: driver.suspend and .resume are always setChris Wilson1-5/+0
2010-12-09drm/i915: Mark the user reloc error paths as unlikelyChris Wilson1-9/+8
2010-12-09drm/i915: Eliminate drm_gem_object_lookup during relocationChris Wilson2-27/+129
2010-12-09drm/i915: Re-arm the idle timers if the device is still busyChris Wilson1-2/+16
2010-12-09drm/i915/ringbuffer: Handle wrapping of the autoreported HEADChris Wilson2-13/+11
2010-12-08drm/i915/dp: Fix I2C/EDID handling with active DisplayPort to DVI converterDavid Flynn1-7/+30
2010-12-08drm/nv04-nv40: Fix up PCI(E) GART DMA object bus address calculation.Francisco Jerez3-18/+10
2010-12-08drm/i915: i915 cannot provide switcher services.Dave Airlie1-34/+0
2010-12-08drm/nouveau: kick vram functions out into an "engine"Ben Skeggs7-51/+74
2010-12-08drm/nouveau: allow gpuobj vinst to be a virtual address when necessaryBen Skeggs2-2/+24
2010-12-08drm/nv50: tidy up PCIEGART implementationBen Skeggs5-95/+79
2010-12-08drm/nv50: enable non-contig vram allocations where requestedBen Skeggs1-1/+5
2010-12-08drm/nv50: enable 4KiB pages for small vram allocationsBen Skeggs2-19/+25
2010-12-08drm/nv50: implement global channel address space on new VM codeBen Skeggs13-216/+86
2010-12-08drm/nv50: implement BAR1/BAR3 management on top of new VM codeBen Skeggs4-153/+162
2010-12-08drm/nv50: import new vm codeBen Skeggs11-22/+714
2010-12-08drm/nv50: implement custom vram mmBen Skeggs8-122/+650
2010-12-08drm/nouveau: Avoid potential race between nouveau_fence_update() and context ...Francisco Jerez1-8/+11
2010-12-08drm/nouveau: fix use of drm_mm_node in semaphore objectBen Skeggs1-3/+2
2010-12-08drm/nouveau: wrap calls to ttm_bo_validate()Ben Skeggs3-5/+20
2010-12-08drm/nouveau: no need to zero dma objects, we fill them completely anywayBen Skeggs1-5/+2
2010-12-08drm/nouveau: introduce a util function to wait on reg != valBen Skeggs4-13/+35
2010-12-08drm/nouveau: implicitly insert non-DMA objects into RAMHTBen Skeggs6-80/+43
2010-12-08drm/nouveau: make fifo.create_context() responsible for mapping control regsBen Skeggs5-21/+29
2010-12-08drm/nouveau: Spin for a bit in nouveau_fence_wait() before yielding the CPU.Francisco Jerez1-1/+2
2010-12-08drm/nouveau: Use WC memory on the AGP GART.Francisco Jerez1-2/+3
2010-12-08drm/nouveau: Synchronize with the user channel before GPU object destruction.Francisco Jerez4-28/+28
2010-12-08drm/nv04-nv10: Don't re-enable FIFO access multiple times after IRQ dispatch.Francisco Jerez2-15/+0
2010-12-08drm/nv04-nv40: Give "gpuobj->cinst" the same meaning as on nv50.Francisco Jerez3-13/+3
2010-12-08drm/radeon/kms: fix vram base calculation on rs780/rs880Alex Deucher1-2/+4
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