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path: root/drivers/gpu/drm
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2015-12-22drm/amdgpu/powerplay: mv ppinterrupt.h to inc folder to share with other ↵Rex Zhu2-22/+26
submodule. Redefine interrupt callback function in accordance with cgs. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-22drm/amdgpu/powerplay: add new function point in hwmgr_funcs for thermal controlRex Zhu1-0/+22
Add the interface for fan and thermal control. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-22drm/amd/powerplay: Add CG and PG support for tongaRex Zhu5-15/+440
Implement clock and power gating support for tonga. On Tonga this is handles by the SMU rather than direct register settings in the driver. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-22drm/amd/powerplay: add new function point in hwmgr_func for CG/PG.Rex Zhu1-0/+3
Add callbacks interface for clock and powergating. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-22drm/amdgpu/powerplay: add some definition for other ip block to update cg pg.Rex Zhu1-0/+41
Interface for clock and power gating handling. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-22drm/amdgpu: enable powerplay module by default for fiji.Rex Zhu1-0/+3
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-22drm/amdgpu: enable powerplay module by default for tonga.Rex Zhu1-0/+8
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-22drm/amdgpu/powerplay: program display gap for tonga.Rex Zhu1-0/+91
Implement displaygap programming for tonga. This is required for properly mclk switching. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-22drm/amdgpu/powerplay: implement pem_task for display_configuration_changeRex Zhu4-6/+15
Add support for display configuration changes to the event manager. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-22drm/amdgpu/poweprlay: export program display gap function to eventmgrRex Zhu2-0/+29
This allows the eventmgr to properly update the displaygap on certain power events. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-22drm/amdgpu/powerplay: add function point in hwmgr_funcs for program display gapRex Zhu1-1/+3
Displaygap support is required for proper mclk switching. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-22drm/amd/amdgpu: enable powerplay and smc firmware loading for Fiji.Eric Huang3-1/+7
Switch over to handling in the powerplay module. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-22drm/amdgpu: add amdgpu.powerplay module optionJammy Zhou1-0/+5
This option can be used to enable the new powerplay implementation, and it is disabled by default. Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-22drm/amd/powerplay: add Fiji DPM support.Eric Huang7-1/+5815
This enabled DPM support for Fiji. DPM is dynamic clock and voltage scaling. v2: rename fiji_hwmgr_early_init to fiji_hwmgr_init v3: (agd) fold in endian fix, additional function addition Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-22drm/amd/powerplay: add Fiji SMU support.Eric Huang4-1/+1117
Add support for the SMU manager for Fiji. This handles the firmware loading for other IP blocks (GFX, SDMA, etc.). Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-22drm/amd/powerplay: update atomctrl for fijiEric Huang3-9/+496
Add some new functions to support Fiji. Split out from the previous patch. Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-22drm/amd/powerplay: add/update headers for Fiji SMU and DPMEric Huang7-182/+12926
New headers for Fiji. Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-22drm/amd/powerplay: add Tonga dpm support (v3)yanyang120-12/+9284
This implements DPM for tonga. DPM handles dynamic clock and voltage scaling. v2: merge all the patches related with tonga dpm v3: merge dpm force level fix, cgs display fix, spelling fix Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: yanyang1 <young.yang@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-22drm/amd/powerplay: Add Tonga SMU supportJammy Zhou5-2/+921
The SMU manager handles firmware loading for other IP blocks (GFX, SDMA, etc.). This implements it for Tonga. v3: delete peci sub-module v2: use cgs interface directly Signed-off-by: Young Yang <Young.Yang@amd.com> Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-22drm/amd/powerplay: add header file for tonga smu and dpmyanyang14-198/+1844
These headers provide the SMU interface used by the driver. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: yanyang1 <young.yang@amd.com>
2015-12-22drm/amd/powerplay: Move smu7*.h from amdgpu to powerplay.yanyang13-0/+0
Move smu7.h, smu7_discrete.h and smu7_fusion.h from amdgpu to powerplay. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: yanyang1 <young.yang@amd.com>
2015-12-22drm/amd/powerplay: Add ixSWRST_COMMAND_1 in bif_5_0_d.hyanyang11-0/+1
Add ixSWRST_COMMAND_1 in bif_5_0_d.h. Required by new powerplay code for tonga and fiji. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: yanyang1 <young.yang@amd.com>
2015-12-22drm/amd/powerplay: implement functions of amd_powerplay_funcRex Zhu1-8/+183
This is the common interface for interacting with the powerplay module. v2: squash in fixes Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Acked-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-22drm/amd/powerplay: add event manager sub-componentRex Zhu20-1/+2423
The event manager handles power related driver events. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-22drm/amd/powerplay: add CG and PG support for carrizoRex Zhu10-12/+1058
This adds clock and powergating support for CZ. v2: squash in fixes Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-22drm/amd/powerplay: add Carrizo dpm supportJammy Zhou4-3/+1212
This patch enables basic DPM support for Carrizo. DPM handles dynamic clock and voltage scaling. v3: delete peci sub-module v2: use cgs interface directly correct define SMU_EnabledFeatureScoreboard_SclkDpmOn Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-22drm/amd/powerplay: add Carrizo smu supportJammy Zhou8-2/+963
This implements the SMU firmware manager interface for CZ. Some header files are moved from amdgpu folder to powerplay as well. v3: delete peci sub-module. v2: use cgs interface directly add load_mec_firmware function Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-22drm/amd/powerplay: add hardware manager sub-componentJammy Zhou16-6/+3439
The hwmgr handles all hardware related calls, including clock/power gating control, DPM, read and parse PPTable, etc. v5: squash in fixes v4: implement acpi's atcs function use cgs interface v3: fix code style error and add big-endian mode support. v2: use cgs interface directly in hwmgr sub-module Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-22drm/amd/powerplay: add SMU manager sub-componentJammy Zhou6-0/+560
The SMUMGR is one sub-component of powerplay for SMU firmware support. The SMU handles firmware loading for other IP blocks (GFX, SDMA, etc.) on VI parts. The adds the core powerplay infrastructure to handle that. v3: direct use printk in powerplay module. v2: direct use cgs_read/write_register functions in smu-modules Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-22drm/amdgpu: export amd_powerplay_func to amdgpu and other ip blockRex Zhu2-81/+180
Update amdgpu to deal with the new powerplay module properly. v2: squash in fixes v3: squash in Rex's power state reporting fix Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Acked-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-22drm/amdgpu: disable legacy path of firmware check if powerplay is enabledRex Zhu2-49/+55
Powerplay will use a different interface once it's integrated. These legacy pathes will be removed once powerplay is enabled by default. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-22drm/amd/powerplay: add basic powerplay frameworkAlex Deucher12-9/+718
amdgpu_pp_ip_funcs is introduced to handle the two code paths, the legacy one and the new powerplay implementation. CONFIG_DRM_AMD_POWERPLAY kernel configuration option is introduced for the powerplay component. v4: squash in fixes v3: register debugfs file when powerplay module enable v2: add amdgpu_ucode_init_bo in hw init when amdgpu_powerplay enable. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-22drm/amdgpu: add new cgs interface to get display info (v2)Rex Zhu2-0/+60
Add new CGS interfaces to query display info across modules. This is nedded by the powerplay module for synchronizing with the display module. v2: (agd): fold in refresh rate fix, rebase Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-22drm/amdgpu: implement cgs interface to query system infoRex Zhu2-0/+46
Add a query to get the bus number and function of the device. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-22drm/amdgpu: implement new cgs interface for acpi functionRex Zhu2-3/+262
Add a new driver internal interface for accessing ACPI methods. These will be used by various new components including powerplay. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-22drm/amdgpu: mv amdgpu_acpi.h to amd/include/amd_acpi.hRex Zhu3-4/+4
This will be shared with the new powerplay module. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-22drm/amdgpu: mv some definition from amdgpu_acpi.c to amdgpu_acpi.hRex Zhu2-60/+53
These will be shared with the new powerplay module. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-22drm/amdgpu: share struct amdgpu_pm_state_type with powerplay moduleRex Zhu3-30/+27
rename amdgpu_pm_state_type to amd_pm_state_type Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Acked-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-22drm/radeon: clean up fujitsu quirksAlex Deucher1-9/+3
Combine the two quirks. bug: https://bugzilla.kernel.org/show_bug.cgi?id=109481 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2015-12-22drm/amdgpu: Fix off-by-one errors in amdgpu_vm_bo_mapFelix Kuehling1-5/+5
eaddr is sometimes treated as the last address inside the address range, and sometimes as the first address outside the range. This was resulting in errors when a test filled up the entire address space. Make it consistent to always be the last address within the range. Signed-off-by: Felix.Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org
2015-12-22drm/radeon: Fix off-by-one errors in radeon_vm_bo_set_addrFelix Kuehling1-6/+6
eoffset is sometimes treated as the last address inside the address range, and sometimes as the first address outside the range. This was resulting in errors when a test filled up the entire address space. Make it consistent to always be the last address within the range. Also fixed related errors when checking the VA limit and in radeon_vm_fence_pts. Signed-off-by: Felix.Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org
2015-12-22drm/radeon: fix dp link rate selection (v2)Alex Deucher3-77/+49
Need to properly handle the max link rate in the dpcd. This prevents some cases where 5.4 Ghz is selected when it shouldn't be. v2: simplify logic, add array bounds check Reviewed-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-22drm/amdgpu: fix dp link rate selection (v2)Alex Deucher1-60/+36
Need to properly handle the max link rate in the dpcd. This prevents some cases where 5.4 Ghz is selected when it shouldn't be. v2: simplify logic, add array bounds check Reviewed-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21drm/fb-helper: Use proper plane mask for fb cleanupMatt Roper1-1/+1
pan_display_atomic() calls drm_atomic_clean_old_fb() to sanitize the legacy FB fields (plane->fb and plane->old_fb). However it was building the plane mask to pass to this function incorrectly (the bitwise OR was using plane indices rather than plane masks). The end result was that sometimes the legacy pointers would become out of sync with the atomic pointers. If another operation tried to re-set the same FB onto the plane, we might end up with the pointers back in sync, but improper reference counts, which would eventually lead to system crashes when we accessed a pointer to a prematurely-destroyed FB. The cause here was a very subtle bug introduced in commit: commit 07d3bad6c1210bd21e85d084807ef4ee4ac43a78 Author: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Date: Wed Nov 11 11:29:11 2015 +0100 drm/core: Fix old_fb handling in pan_display_atomic. I found the crashes were most easily reproduced (on i915 at least) by starting X and then VT switching to a VT that wasn't running a console instance...the sequence of vt/fbcon entries that happen in that case trigger a reference count mismatch and crash the system. Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93313 Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-12-19drm/exynos: atomic check only enabled crtc statesAndrzej Hajda1-0/+3
Since atomic check is called also for disabled crtcs it should skip mode checking as it can be uninitialized. The patch fixes it. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch> Tested-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-12-19Merge branch 'linux-4.4' of git://github.com/skeggsb/linux into drm-fixesDave Airlie1-0/+1
single nouveau fix. * 'linux-4.4' of git://github.com/skeggsb/linux: drm/nouveau/bios/fan: hardcode the fan mode to linear
2015-12-19Merge branch 'drm-etnaviv-next' of git://git.pengutronix.de/git/lst/linux ↵Dave Airlie26-0/+7016
into drm-next here is the pull request for the etnaviv DRM driver. It includes the DT bindings and the driver itself, platform devicetree changes will be merged through the respective SoC trees. Otherwise it's just a squashed version of the V2 patches that have been on the list for a while. * 'drm-etnaviv-next' of git://git.pengutronix.de/git/lst/linux: MAINTAINERS: add maintainer and reviewers for the etnaviv DRM driver drm/etnaviv: add initial etnaviv DRM driver drm/etnaviv: add devicetree bindings devicetree: add vendor prefix for Vivante Corporation
2015-12-19Merge tag 'topic/drm-misc-2015-12-18' of ↵Dave Airlie59-203/+188
git://anongit.freedesktop.org/drm-intel into drm-next Seems I lied in my last drm-misc pull request and suddenly there's a big pile of random stuff. Boris dug out Thierry's drm-trivial branch and resubmitted everything since that branch didn't really work out. On top of that Nicolas' changes to drm_dev_set_unique - this might conflict with new driver pulls (I double checked and current drm-next should be fine), so please beware. The -next/-fixes conflict in vmwgfx will change slightly with this here too. * tag 'topic/drm-misc-2015-12-18' of git://anongit.freedesktop.org/drm-intel: (36 commits) drm: use dev_name as default unique name in drm_dev_alloc() drm: make drm_dev_set_unique() not use a format string drm/vmwgfx: Constify function pointer structs drm/udl: Constify function pointer structs drm/tegra: Constify function pointer structs drm/rockchip: Constify function pointer structs drm/nouveau: Constify function pointer structs drm/mgag200: Constify function pointer structs drm/imx: Constify function pointer structs drm/i2c/sil164: Constify function pointer structs drm/i2c/adv7511: Constify function pointer structs drm/exynos: Constify function pointer structs drm/cirrus: Constify function pointer structs drm/i2c/ch7006: Constify function pointer structs drm/bridge/nxp-ptn3460: Constify function pointer structs drm/bridge/dw_hdmi: Constify function pointer structs drm/bochs: Constify function pointer structs drm/atmel-hlcdc: Constify function pointer structs drm/armada: Constify function pointer structs drm: Constify drm_encoder_slave_funcs ...
2015-12-19drm/radeon: only increment sync_seq when a fence is really emittedNicolai Hähnle1-2/+2
In the rare situation where the kmalloc fails we're probably screwed anyway, but let's try to be more robust about it. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Nicolai Hähnle <Nicolai.Haehnle@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-19drm/radeon: fix typo in cik_ring_ib_execute documentation (v2)Nicolai Hähnle1-2/+2
v2: agd: clarify commit message, fix "an" as spotted by Michel. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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