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path: root/drivers/gpu/drm
AgeCommit message (Expand)AuthorFilesLines
2018-10-18drm: add syncobj timeline support v9Chunming Zhou2-42/+266
2018-10-18firmware/dmc/icl: Add missing MODULE_FIRMWARE() for Icelake.Anusha Srivatsa1-0/+1
2018-10-18drm/i915/icl: Fix signal_levelsRodrigo Vivi1-1/+1
2018-10-18drm/i915/icl: Fix DDI/TC port clk_off bitsMahesh Kumar2-3/+21
2018-10-18drm/i915/icl: create function to identify combophy portMahesh Kumar3-7/+20
2018-10-18Merge branch 'drm-next-4.20' of git://people.freedesktop.org/~agd5f/linux int...Dave Airlie22-228/+566
2018-10-18Merge tag 'drm-misc-next-fixes-2018-10-17' of git://anongit.freedesktop.org/d...Dave Airlie1-1/+13
2018-10-18drm/i915/gen9+: Fix initial readout for Y tiled framebuffersImre Deak1-2/+23
2018-10-18drm/i915: Large page offsets for pread/pwriteChris Wilson1-10/+2
2018-10-18drm/i915/selftests: Disable shrinker across mmap-exhaustionChris Wilson1-0/+3
2018-10-18drm/i915/dp: Link train Fallback on eDP only if fallback link BW can fit pane...Manasi Navare2-17/+39
2018-10-18drm/i915: Fix intel_dp_mst_best_encoder()Lyude Paul1-2/+0
2018-10-18drm/i915: Skip vcpi allocation for MSTB ports that are goneLyude Paul1-9/+15
2018-10-18drm/i915: Don't unset intel_connector->mst_portLyude Paul1-11/+6
2018-10-18drm/i915: Only reset seqno if actually idleChris Wilson1-1/+1
2018-10-18drm/i915: Use the correct crtc when sanitizing plane mappingVille Syrjälä1-32/+46
2018-10-18drm/i915: Restore vblank interrupts earlierVille Syrjälä1-10/+13
2018-10-18drm/i915: Check fb stride against plane max strideVille Syrjälä3-0/+37
2018-10-18drm/amdgpu/vcn:Fix uninitialized symbol errorJames Zhu1-2/+2
2018-10-17drm: panel-orientation-quirks: Add quirk for Acer One 10 (S1003)Hans de Goede1-1/+13
2018-10-17drm/selftest: Refactor drm mode setting selftestsDeepak Rawat5-22/+54
2018-10-17drm/bufs: Fix Spectre v1 vulnerabilityGustavo A. R. Silva1-0/+3
2018-10-17drm: fix missing doc v2Chunming Zhou1-0/+1
2018-10-16drm/amd/amdgpu: Fix debugfs error handlingDan Carpenter1-10/+2
2018-10-16drm/amdgpu: Update gc_9_0 golden settings.Feifei Xu1-0/+1
2018-10-16drm/amd/powerplay: update PPtable with DC BTC and Tvr SocLimit fieldsEvan Quan2-9/+14
2018-10-16drm/amd/powerplay: added I2C controller configurationEvan Quan3-63/+227
2018-10-16drm/amdgpu: update Vega20 SDMA golden settingEvan Quan1-0/+2
2018-10-16drm/amdgpu: Fix typo in amdgpu_vmid_mgr_initRex Zhu1-1/+1
2018-10-16drm/rockchip: psr: do not dereference encoder before it is null checked.Enric Balletbo i Serra1-1/+3
2018-10-16drm: add flags to drm_syncobj_find_fenceChunming Zhou4-6/+6
2018-10-16drm: Shift * to be adjacent to pointer nameMamta Shukla1-5/+5
2018-10-16drm/amd/display: fix bug of accessing invalid memorySu Sung Chung1-2/+6
2018-10-16drm/radeon: change SPDX identifier to MITJonathan Gray6-6/+6
2018-10-16drm/amdgpu: correct SPDX identifier in amdgpu_trace_points.cJonathan Gray1-1/+1
2018-10-15drm/v3d: Skip debugfs dumping GCA on platforms without GCA.Eric Anholt1-4/+7
2018-10-15drm/v3d: Add a little debugfs entry for measuring the core clock.Eric Anholt2-0/+65
2018-10-15drm/v3d: Fix a use-after-free race accessing the scheduler's fences.Eric Anholt2-2/+11
2018-10-12drm/amdgpu/vcn:Update SPG mode UVD status clearJames Zhu1-3/+3
2018-10-12drm/amdgpu/vcn:Set VCPU busy after gate power during vcn SPG startJames Zhu1-0/+4
2018-10-12drm/amdgpu/vcn:Apply new UMC enable for VNC DPG modeJames Zhu1-3/+8
2018-10-12drm/amdgpu/vcn:Remove SPG mode unused steps during vcn startJames Zhu1-28/+2
2018-10-12drm/amdgpu/vcn:Add SPG mode Register XX checkJames Zhu1-0/+4
2018-10-12drm/amdgpu/vcn:Move SPG mode mc resume after MPC controlJames Zhu1-2/+2
2018-10-12drm/amdgpu/vcn:Update SPG mode VCN global tilingJames Zhu1-0/+18
2018-10-12drm/amdgpu/vcn:Update SPG mode VCN memory controlJames Zhu1-7/+6
2018-10-12drm/amdgpu/vcn:Apply new UMC enable for VNC DPG mode startJames Zhu1-4/+5
2018-10-12drm/amdgpu/vcn:Remove DPG mode unused steps during vcn startJames Zhu1-27/+1
2018-10-12drm/amdgpu/vcn:Add DPG mode Register XX checkJames Zhu1-0/+8
2018-10-12drm/amdgpu/vcn:Update DPG mode VCN global tiling registersJames Zhu1-4/+15
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