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path: root/drivers/gpu/drm
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2022-07-09drm/amd/pm: ac/dc change for smu_v13_0Kenneth Feng4-3/+37
fixed the issue: gpu runs in dc mode but it is expected to be in ac mode. this causes the lower performance on smu_v13_0 Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-09drm/amd/display: Enable ODM combine default policyAurabindo Pillai2-2/+6
[Why&How] Output Data Mapping is a power saving feature that allows us to run at reduced DPP and DISP clocks compared to what could be achieved with a single pipe. Set the default policy for single display use case to use 2 to 1 ODM combine. The options are queried by DC and appropriate register programming sequence is initiated to enable this feature. Fixes: 235c67634230 ("drm/amd/display: add DCN32/321 specific files for Display Core") Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-09drm/amd/display: Add callback to set dig modeAurabindo Pillai1-0/+12
[Why&How] Add a missing callback to set DIG FIFO output pixel mode. This is used when ODM combine is activated. Fixes: 235c67634230 ("drm/amd/display: add DCN32/321 specific files for Display Core") Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-08drm/i915/mtl: Add MeteorLake PCI IDsRadhakrishna Sripada4-0/+23
Add Meteorlake PCI IDs. Split into M, and P subplatforms. v2: Update PCI id's v3: Move id 7d60 under MTL_M(MattR) Bspec: 55420 Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220708000335.2869311-3-radhakrishna.sripada@intel.com
2022-07-08drm/i915/mtl: Add MeteorLake platform infoRadhakrishna Sripada4-0/+28
MTL has Xe_LPD+ display IP (version = 14), MTL graphics IP (version = 12.70), and Xe_LPM+ media IP (version = 13). Bspec: 55413 Bspec: 55416 Bspec: 55417 Bspec: 55418 Bspec: 55726 Bspec: 45544 Bspec: 65380 v2: rearrange the fields in pci_info(MattR) Cc: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> [mattrope: Moved IS_METEORLAKE() higher in header] Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220708000335.2869311-2-radhakrishna.sripada@intel.com
2022-07-08drm/i915/gt: Add general DSS steering iterator to intel_gt_mcrMatt Roper6-75/+75
Although all DSS belong to a single pool on Xe_HP platforms (i.e., they're not organized into slices from a topology point of view), we do still need to pass 'group' and 'instance' targets when steering register accesses to a specific instance of a per-DSS multicast register. The rules for how to determine group and instance IDs (which previously used legacy terms "slice" and "subslice") varies by platform. Some platforms determine steering by gslice membership, some platforms by cslice membership, and future platforms may have other rules. Since looping over each DSS and performing steered unicast register accesses is a relatively common pattern, let's add a dedicated iteration macro to handle this (and replace the platform-specific "instdone" loop we were using previously. This will avoid the calling code needing to figure out the details about how to obtain steering IDs for a specific DSS. Most of the places where we use this new loop are in the GPU errorstate code at the moment, but we do have some additional features coming in the future that will also need to loop over each DSS and steer some register accesses accordingly. Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220701232006.1016135-1-matthew.d.roper@intel.com
2022-07-08drm/amd/display: fix 32 bit compilation errors in dc_dmub_srv.cAlex Deucher2-59/+34
There are several things wrong here. First, none of these numbers are FP, so there is no need to cast to double. Next make sure to use proper 64 bit division helpers. Fixes: 85f4bc0c333c ("drm/amd/display: Add SubVP required code") Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-08drm/tegra: vic: Use devm_platform_ioremap_resource()Lv Ruyi1-8/+1
Use the devm_platform_ioremap_resource() helper instead of calling platform_get_resource() and devm_ioremap_resource() separately. Make the code simpler without functional changes. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Lv Ruyi <lv.ruyi@zte.com.cn> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-07-08i915/perf: Disable OA sseu config param for gfx12.50+Umesh Nerlige Ramappa1-0/+7
The global sseu config is applicable only to gen11 platforms where concurrent media, render and OA use cases may cause some subslices to be turned off and hence lose NOA configuration. Ideally we want to return ENODEV for non-gen11 platforms, however, this has shipped with gfx12, so disable only for gfx12.50+. v2: gfx12 is already shipped with this, disable for gfx12.50+ (Lionel) v3: (Matt) - Update commit message and replace "12.5" with "12.50" - Replace DRM_DEBUG() with driver specific drm_dbg() Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220707193002.2859653-2-umesh.nerlige.ramappa@intel.com
2022-07-08i915/perf: Replace DRM_DEBUG with driver specific drm_dbg callUmesh Nerlige Ramappa1-51/+100
DRM_DEBUG is not the right debug call to use in i915 OA, replace it with driver specific drm_dbg() call (Matt). Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220707193002.2859653-1-umesh.nerlige.ramappa@intel.com
2022-07-08drm/msm/dpu: Fix for non-visible planesRob Clark1-0/+6
Fixes `kms_cursor_crc --run-subtest cursor-offscreen`.. when the cursor moves offscreen the plane becomes non-visible, so we need to skip over it in crtc atomic test and mixer setup. Signed-off-by: Rob Clark <robdclark@chromium.org> Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support") Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/492819/ Link: https://lore.kernel.org/r/20220707212003.1710163-1-robdclark@gmail.com
2022-07-08drm/tegra: Include DMA API header where usedRobin Murphy4-0/+4
Even though the IOVA API never actually needed it, iova.h is still carrying an include of dma-mapping.h, now solely for the sake of not breaking tegra-drm. Fix that properly. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-07-08drm/tegra: Fix vmapping of prime buffersDmitry Osipenko1-1/+10
The code assumes that Tegra GEM is permanently vmapped, which is not true for the scattered buffers. After converting Tegra video decoder driver to V4L API, we're now getting a BUG_ON from dma-buf core on playing video using libvdpau-tegra on T30+ because tegra_gem_prime_vmap() sets vaddr to NULL. Older pre-V4L video decoder driver wasn't vmapping dma-bufs. Fix it by actually vmapping the exported GEMs. Cc: stable@vger.kernel.org Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-07-08drm/tegra: vic: Fix build warning when CONFIG_PM=nYueHaibing1-2/+2
drivers/gpu/drm/tegra/vic.c:326:12: error: ‘vic_runtime_suspend’ defined but not used [-Werror=unused-function] static int vic_runtime_suspend(struct device *dev) ^~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/tegra/vic.c:292:12: error: ‘vic_runtime_resume’ defined but not used [-Werror=unused-function] static int vic_runtime_resume(struct device *dev) ^~~~~~~~~~~~~~~~~~ Mark it as __maybe_unused. Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-07-08drm/tegra: vic: Add Tegra234 supportMikko Perttunen2-0/+13
Add Tegra234 support for VIC. It is backwards compatible with Tegra194. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-07-08drm/tegra: Implement stream ID related callbacks on enginesMikko Perttunen3-8/+76
Implement the get_streamid_offset and can_use_memory_ctx callbacks required for supporting context isolation. Since old firmware on VIC cannot support context isolation without hacks that we don't want to implement, check the firmware binary to see if context isolation should be enabled. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-07-08drm/tegra: Support context isolationMikko Perttunen3-3/+91
For engines that support context isolation, allocate a context when opening a channel, and set up stream ID offset and context fields when submitting a job. As of this commit, the stream ID offset and fallback stream ID are not used when context isolation is disabled. However, with upcoming patches that enable a full featured job opcode sequence, these will be necessary. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-07-08drm/tegra: nvdec: Fix TRANSCFG register offsetMikko Perttunen1-1/+3
NVDEC's TRANSCFG register is at a different offset than VIC. This becomes a problem now when context isolation is enabled and the reset value of the register is no longer sufficient. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-07-08drm/tegra: falcon: Set DMACTX field on DMA transactionsMikko Perttunen2-0/+9
The DMACTX field determines which context, as specified in the TRANSCFG register, is used. While during boot it doesn't matter which is used, later on it matters and this value is reused by the firmware. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-07-08Revert "drm/amdgpu: add drm buddy support to amdgpu"Arunpravin Paneer Selvam5-380/+176
This reverts commit c9cad937c0c58618fe5b0310fd539a854dc1ae95. This is part of a revert of the following commits: commit 708d19d9f362 ("drm/amdgpu: move internal vram_mgr function into the C file") commit 5e3f1e7729ec ("drm/amdgpu: fix start calculation in amdgpu_vram_mgr_new") commit c9cad937c0c5 ("drm/amdgpu: add drm buddy support to amdgpu") [WHY] Few users reported garbaged graphics as soon as x starts, reverting until this can be resolved. Signed-off-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220708093047.492662-3-Arunpravin.PaneerSelvam@amd.com Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
2022-07-08drm/lima: Migrate to dev_pm_opp_set_config()Viresh Kumar1-5/+6
The OPP core now provides a unified API for setting all configuration types, i.e. dev_pm_opp_set_config(). Lets start using it. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2022-07-08OPP: Make dev_pm_opp_set_regulators() accept NULL terminated listViresh Kumar3-8/+13
Make dev_pm_opp_set_regulators() accept a NULL terminated list of names instead of making the callers keep the two parameters in sync, which creates an opportunity for bugs to get in. Suggested-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Steven Price <steven.price@arm.com> # panfrost Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2022-07-07drm/amd/display: clean up some inconsistent indentingYang Li1-8/+8
Eliminate the follow smatch warnings: drivers/gpu/drm/amd/amdgpu/../display/dc/bios/bios_parser2.c:405 get_bios_object_from_path_v3() warn: inconsistent indenting drivers/gpu/drm/amd/amdgpu/../display/dc/bios/bios_parser2.c:611 bios_parser_get_hpd_info() warn: inconsistent indenting drivers/gpu/drm/amd/amdgpu/../display/dc/bios/bios_parser2.c:818 bios_parser_get_device_tag() warn: inconsistent indenting drivers/gpu/drm/amd/amdgpu/../display/dc/bios/bios_parser2.c:1599 bios_parser_is_device_id_supported() warn: inconsistent indenting Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-07drm/amd/display: fix non-x86/PPC64 compilationAlex Deucher2-1/+2
Need to protect FP DMCUB code with CONFIG_DRM_AMD_DC_DCN. Fixes build failures like the following on arm64: ERROR: modpost: "__floatunsidf" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! ERROR: modpost: "__divdf3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! ERROR: modpost: "fma" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! ERROR: modpost: "__adddf3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! ERROR: modpost: "__fixdfsi" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! ERROR: modpost: "__muldf3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! ERROR: modpost: "__floatsidf" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! ERROR: modpost: "__fixunsdfsi" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! Fixes: 85f4bc0c333c ("drm/amd/display: Add SubVP required code") Reported-by: Nathan Chancellor <nathan@kernel.org> Tested-by: Nathan Chancellor <nathan@kernel.org> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-07drm/amd/display: Fix new dmub notification enabling in DMStylon Wang1-8/+19
[Why] Changes from "Fix for dmub outbox notification enable" need to land in DM or DMUB outbox notification would be disabled. [How] Enable outbox notification only after interrupt are enabled and IRQ handlers registered. Any pending notification will be sent by DMUB once outbox notification is enabled. Fixes: ed7208706448 ("drm/amd/display: Fix for dmub outbox notification enable") Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Solomon Chiu <solomon.chiu@amd.com> Signed-off-by: Stylon Wang <stylon.wang@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-07drm/amdgpu: Fix one list corruption when create queue failsxinhui pan1-6/+5
Queue would be freed when create_queue_cpsch fails So lets do queue cleanup otherwise various list and memory issues happen. Signed-off-by: xinhui pan <xinhui.pan@amd.com> Reviewed-by: Philip Yang <Philip.Yang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-07drm/radeon: avoid bogus "vram limit (0) must be a power of 2" warningMateusz Jończyk1-1/+1
I was getting the following message on boot on Linux 5.19-rc5: radeon 0000:01:05.0: vram limit (0) must be a power of 2 (I didn't use any radeon.vramlimit commandline parameter). This is caused by commit 8c2d34eb53b9 ("drm/radeon: use kernel is_power_of_2 rather than local version") which removed radeon_check_pot_argument() and converted its users to is_power_of_2(). The two functions differ in its handling of 0, which is the default value of radeon_vram_limit: radeon_check_pot_argument() "incorrectly" considered it a power of 2, while is_power_of_2() does not. An appropriate conditional silences the warning message. It is not necessary to add a similar test to other callers of is_power_of_2() in radeon_device.c. The matching commit in amdgpu: commit 761175078466 ("drm/amdgpu: use kernel is_power_of_2 rather than local version") is unaffected by this bug. Tested on Radeon HD 3200. Not ccing stable, this is not serious enough. Fixes: 8c2d34eb53b9 ("drm/radeon: use kernel is_power_of_2 rather than local version") Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Jonathan Gray <jsg@jsg.id.au> Signed-off-by: Mateusz Jończyk <mat.jonczyk@o2.pl> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-07drm/amd/display: remove repeated includesGuo Zhengkui1-2/+0
Remove a repeated "#include <drm/drm_print.h>" Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Guo Zhengkui <guozhengkui@vivo.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-07drm/amdgpu/display: Remove duplicated argument to ||Zhongjun Tan1-1/+1
Remove duplicated argument to || Signed-off-by: Zhongjun Tan <tanzhongjun@coolpad.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-07drm/amd/display: make get_refresh_rate() staticAlex Deucher1-1/+1
It's not used outside of dcn30_resource.c. Reported-by: kernel test robot <lkp@intel.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-07drm/amd/display: remove set but unused variableAlex Deucher1-2/+1
Fixes the following: drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_hwseq.c:428:33: warning: variable 'old_pipe' set but not used Reported-by: kernel test robot <lkp@intel.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-07drm/amdkfd: optimize svm range evictEric Huang1-1/+9
It is to avoid unnecessary queue eviction when range is not mapped to gpu. Signed-off-by: Eric Huang <jinhuieric.huang@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-07drm/amd/display: correct idle_power_optimizations disablement return valueEvan Quan1-1/+1
[Why] The return value indicates whether the operation(disable/enable) succeeded or not. The existing logic reports wrong result even if the disablement was performed successfully. That will make succeeding reenablement abandoned as dc->idle_optimizations_allowed is always true. [How] Correct the return value to reflect the real result of disablement. Fixes: 235c67634230 ("drm/amd/display: add DCN32/321 specific files for Display Core") Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-07drm/amd/display: remove stale debug settingAurabindo Pillai1-1/+0
[Why&How] The debug option to disable idle power optimization can be dropped Fixes: 235c67634230 ("drm/amd/display: add DCN32/321 specific files for Display Core") Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-07drm/amdkfd: change svm range evictEric Huang1-2/+4
Adding always evict queues when flag is set to KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED as if XNACK off. Signed-off-by: Eric Huang <jinhuieric.huang@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-07drm/msm/mdp5: Fix global state lock backoffRob Clark1-1/+2
We need to grab the lock after the early return for !hwpipe case. Otherwise, we could have hit contention yet still returned 0. Fixes an issue that the new CONFIG_DRM_DEBUG_MODESET_LOCK stuff flagged in CI: WARNING: CPU: 0 PID: 282 at drivers/gpu/drm/drm_modeset_lock.c:296 drm_modeset_lock+0xf8/0x154 Modules linked in: CPU: 0 PID: 282 Comm: kms_cursor_lega Tainted: G W 5.19.0-rc2-15930-g875cc8bc536a #1 Hardware name: Qualcomm Technologies, Inc. DB820c (DT) pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--) pc : drm_modeset_lock+0xf8/0x154 lr : drm_atomic_get_private_obj_state+0x84/0x170 sp : ffff80000cfab6a0 x29: ffff80000cfab6a0 x28: 0000000000000000 x27: ffff000083bc4d00 x26: 0000000000000038 x25: 0000000000000000 x24: ffff80000957ca58 x23: 0000000000000000 x22: ffff000081ace080 x21: 0000000000000001 x20: ffff000081acec18 x19: ffff80000cfabb80 x18: 0000000000000038 x17: 0000000000000000 x16: 0000000000000000 x15: fffffffffffea0d0 x14: 0000000000000000 x13: 284e4f5f4e524157 x12: 5f534b434f4c5f47 x11: ffff80000a386aa8 x10: 0000000000000029 x9 : ffff80000cfab610 x8 : 0000000000000029 x7 : 0000000000000014 x6 : 0000000000000000 x5 : 0000000000000001 x4 : ffff8000081ad904 x3 : 0000000000000029 x2 : ffff0000801db4c0 x1 : ffff80000cfabb80 x0 : ffff000081aceb58 Call trace: drm_modeset_lock+0xf8/0x154 drm_atomic_get_private_obj_state+0x84/0x170 mdp5_get_global_state+0x54/0x6c mdp5_pipe_release+0x2c/0xd4 mdp5_plane_atomic_check+0x2ec/0x414 drm_atomic_helper_check_planes+0xd8/0x210 drm_atomic_helper_check+0x54/0xb0 ... ---[ end trace 0000000000000000 ]--- drm_modeset_lock attempting to lock a contended lock without backoff: drm_modeset_lock+0x148/0x154 mdp5_get_global_state+0x30/0x6c mdp5_pipe_release+0x2c/0xd4 mdp5_plane_atomic_check+0x290/0x414 drm_atomic_helper_check_planes+0xd8/0x210 drm_atomic_helper_check+0x54/0xb0 drm_atomic_check_only+0x4b0/0x8f4 drm_atomic_commit+0x68/0xe0 Fixes: d59be579fa93 ("drm/msm/mdp5: Return error code in mdp5_pipe_release when deadlock is detected") Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/492701/ Link: https://lore.kernel.org/r/20220707162040.1594855-1-robdclark@gmail.com
2022-07-07drm/msm: Make enable_eviction flag staticRob Clark1-1/+1
No need for it to be visible outside of this one src file. Signed-off-by: Rob Clark <robdclark@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/491219/ Link: https://lore.kernel.org/r/20220625225454.81039-3-robdclark@gmail.com
2022-07-07drm/ssd130x: Fix pre-charge period settingEzequiel Garcia1-1/+1
Fix small typo which causes the mask for the 'precharge1' setting to be used with the 'precharge2' value. Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Acked-by: Javier Martinez Canillas <javierm@redhat.com> Signed-off-by: Javier Martinez Canillas <javierm@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220706184133.210888-1-ezequiel@vanguardiasur.com.ar
2022-07-07drm/i915/selftests: Grab the runtime pm in shrink_thpChris Wilson1-1/+6
Since we are not holding a wakeref, shrinking a bound object is not guaranteed. Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6370 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Signed-off-by: Matthew Auld <matthew.auld@intel.com> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220706154738.235204-1-matthew.auld@intel.com
2022-07-07drm/msm/dp: delete vdda regulator related functions from eDP/DP controllerKuogee Hsieh3-115/+2
Vdda regulators are related to both eDP and DP phy so that it should be managed at eDP and DP phy driver instead of controller. This patch removes vdda regulators related functions out of eDP/DP controller. Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/1657038556-2231-4-git-send-email-quic_khsieh@quicinc.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-07-07drm/i915: Fix vm use-after-free in vma destructionThomas Hellström1-4/+8
In vma destruction, the following race may occur: Thread 1: Thread 2: i915_vma_destroy(); ... list_del_init(vma->vm_link); ... mutex_unlock(vma->vm->mutex); __i915_vm_release(); release_references(); And in release_reference() we dereference vma->vm to get to the vm gt pointer, leading to a use-after free. However, __i915_vm_release() grabs the vm->mutex so the vm won't be destroyed before vma->vm->mutex is released, so extract the gt pointer under the vm->mutex to avoid the vma->vm dereference in release_references(). v2: Fix a typo in the commit message (Andi Shyti) Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/5944 Fixes: e1a7ab4fca0c ("drm/i915: Remove the vm open count") Cc: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com> Cc: Matthew Auld <matthew.auld@intel.com> Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> Acked-by: Nirmoy Das <nirmoy.das@intel.con> Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220620123659.381772-1-thomas.hellstrom@linux.intel.com (cherry picked from commit 1926a6b75954fc1a8b44d10bd0c67db957b78cf7) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2022-07-07drm/i915/guc: ADL-N should use the same GuC FW as ADL-SDaniele Ceraolo Spurio1-0/+9
The only difference between the ADL S and P GuC FWs is the HWConfig support. ADL-N does not support HWConfig, so we should use the same binary as ADL-S, otherwise the GuC might attempt to fetch a config table that does not exist. ADL-N is internally identified as an ADL-P, so we need to special-case it in the FW selection code. Fixes: 7e28d0b26759 ("drm/i915/adl-n: Enable ADL-N platform") Cc: John Harrison <John.C.Harrison@Intel.com> Cc: Tejas Upadhyay <tejas.upadhyay@intel.com> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220621233005.3952293-1-daniele.ceraolospurio@intel.com (cherry picked from commit 971e4a9781742aaad1587e25fd5582b2dd595ef8) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2022-07-07drm/i915: fix a possible refcount leak in intel_dp_add_mst_connector()Hangyu Hua1-0/+1
If drm_connector_init fails, intel_connector_free will be called to take care of proper free. So it is necessary to drop the refcount of port before intel_connector_free. Fixes: 091a4f91942a ("drm/i915: Handle drm-layer errors in intel_dp_add_mst_connector") Signed-off-by: Hangyu Hua <hbh25y@gmail.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220624130406.17996-1-jose.souza@intel.com Signed-off-by: José Roberto de Souza <jose.souza@intel.com> (cherry picked from commit cea9ed611e85d36a05db52b6457bf584b7d969e2) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2022-07-07drm: rcar-du: Lift z-pos restriction on primary plane for Gen3Laurent Pinchart1-8/+3
There's no reason to require the primary plane to always be at the bottom of the stack, as the VSP supports arbitrary ordering of planes, and the KMS API doesn't have such a requirement either. Lift the restriction. As the primary plane can now be positioned arbitrarily, enable control of its alpha channel as well. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Tomohito Esaki <etom@igel.co.jp>
2022-07-07drm: rcar-du: Fix Alpha blending issue on Gen3LUU HOAI1-0/+12
As per R-Car-Gen3_Common_OPC_Customer_Notifications_V30.1.pdf, unexpected image output(such as incorrect colors or planes being invisible) can happen on the below conditions, as PnALPHAR register is not initialized by reset. When alpha blending (PpMRm.PpSPIM=0b101) is performed and: •two Planes are enabled on any DUn (n=0,1,2,3) oDSPRn= 0x0000 0031 or 0x0000 0013 •or DU0 and DU1 is used for display at the same time oDSPR0= 0x0000 0001 and DSPR1= 0x0000 0003 oDSPR0= 0x0000 0003 and DSPR1= 0x0000 0001 •or DU2 and DU3(H3 Only) is used for display at the same time oDSPR2= 0x0000 0001 and DSPR3= 0x0000 0003 oDSPR2= 0x0000 0003 and DSPR3= 0x0000 0001 This patch set PnALPHAR register to 0 to avoid this issue. Signed-off-by: LUU HOAI <hoai.luu.ub@renesas.com> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2022-07-07drm: rcar-du: Add num_rpf to struct rcar_du_device_infoBiju Das3-5/+20
Number of RPF's VSP is different on R-Car and RZ/G2L R-Car Gen3 -> 5 RPFs R-Car Gen2 -> 4 RPFs RZ/G2L -> 2 RPFs Add num_rpf to struct rcar_du_device_info to support later SoC without any code changes. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2022-07-07drm: rcar-du: Drop file name from comment header blocksLaurent Pinchart24-24/+24
The comment blocks at the beginning of each file have a one-line summary description of the file that includes the file name. While the description is useful, the file name only creates opportunities for mistakes (as seen in rcar_du_vsp.c) without any added value. Drop it. Reported-by: Biju Das <biju.das.jz@bp.renesas.com> Suggested-by: Geert Uytterhoeven <geert@linux-m68k.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2022-07-07drm: rcar-du: Extend CMM HDSE documentationKieran Bingham1-0/+5
When the CMM is enabled, the HDSE offset is further adjusted to compensate for consumed pixels. Explain this further, with an extra comment at the point the offset is adjusted. Suggested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2022-07-07drm/amdgpu/display: disable prefer_shadow for generic fb helpersAlex Deucher6-6/+12
Seems to break hibernation. Disable for now until we can root cause it. Fixes: 087451f372bf ("drm/amdgpu: use generic fb helpers instead of setting up AMD own's.") Bug: https://bugzilla.kernel.org/show_bug.cgi?id=216119 Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-07drm/amdgpu: keep fbdev buffers pinned during suspendAlex Deucher1-4/+21
Was dropped when we converted to the generic helpers. Fixes: 087451f372bf ("drm/amdgpu: use generic fb helpers instead of setting up AMD own's.") Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-10-02 11:11:00 +0300