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path: root/drivers/gpu/drm
AgeCommit message (Expand)AuthorFilesLines
2015-11-20drm/i915: take a power domain ref only when needed during HDMI detectImre Deak1-3/+4
2015-11-20Merge tag 'drm-intel-fixes-2015-11-19' of git://anongit.freedesktop.org/drm-i...Dave Airlie7-52/+118
2015-11-20Merge tag 'topic/drm-fixes-2015-11-19' of git://anongit.freedesktop.org/drm-i...Dave Airlie3-65/+76
2015-11-19drm/i915: Tear down fbdev if initialization failsLukas Wunner1-3/+7
2015-11-19Revert "drm/i915: Initialize HWS page address after GPU reset"Arun Siluvery1-6/+0
2015-11-19drm/i915: Fix oops caused by fbdev initialization failureLukas Wunner3-15/+25
2015-11-19drm/i915: Fix i915_ggtt_view_equal to handle rotation correctlyDaniel Vetter2-6/+6
2015-11-19drm/i915: Stuff rotation params into view unionDaniel Vetter3-8/+5
2015-11-19drm/i915: Drop return value from intel_fill_fb_ggtt_viewDaniel Vetter1-11/+5
2015-11-19drm/i915 : Fix to remove unnecsessary checks in postclose function.Namrta Salonie1-2/+0
2015-11-19drm/atomic-helper: Check encoder/crtc constraintsDaniel Vetter1-0/+8
2015-11-19Revert "drm/i915: skip modeset if compatible for everyone."Jani Nikula3-1/+8
2015-11-19drm/mgag200: fix kernel hang in cursor code.Wang, Rui Y1-6/+5
2015-11-19Merge branch 'drm-vc4-fixes' of git://github.com/anholt/linux into drm-fixesDave Airlie4-13/+23
2015-11-19Merge branch 'drm-fixes-4.4' of git://people.freedesktop.org/~agd5f/linux int...Dave Airlie24-401/+729
2015-11-18drm/i915: add MISSING_CASE to a few port/aux power domain helpersImre Deak1-3/+3
2015-11-18drm/i915/ddi: fix intel_display_port_aux_power_domain() after HDMI detectImre Deak1-1/+8
2015-11-18drm/amdgpu: reserve/unreserve objects out of map/unmap operationsChunming Zhou2-25/+25
2015-11-18drm/amdgpu: move bo_reserve out of amdgpu_vm_clear_boChunming Zhou1-15/+18
2015-11-18drm/amdgpu: add lock for interval tree in vmChunming Zhou2-2/+15
2015-11-18drm/amdgpu: keep the owner for VMIDsChristian König2-17/+24
2015-11-18drm/amdgpu: move VM manager clean into the VM code againChristian König4-12/+20
2015-11-18drm/amdgpu: cleanup VM coding styleChristian König1-50/+48
2015-11-18drm/amdgpu: remove unused VM manager fieldChristian König1-2/+0
2015-11-18drm/amdgpu: cleanup scheduler command submissionChristian König2-39/+25
2015-11-18drm/i915: Remove platform specific *_dp_detect() functionsAnder Conselvan de Oliveira1-28/+5
2015-11-18drm/i915: Don't do edp panel detection in g4x_dp_detect()Ander Conselvan de Oliveira1-10/+0
2015-11-18drm/i915: Send TP1 TP2/3 even when panel claims no NO_TRAIN_ON_EXIT.Rodrigo Vivi1-4/+0
2015-11-18drm/i915: PSR: Don't Skip aux handshake on DP_PSR_NO_TRAIN_ON_EXIT.Rodrigo Vivi1-1/+0
2015-11-18drm/i915: Reduce PSR re-activation time for VLV/CHV.Rodrigo Vivi1-2/+1
2015-11-18drm/i915: Delay first PSR activation.Rodrigo Vivi1-2/+16
2015-11-18drm/amdgpu: fix typo in firmware nameChristian König1-1/+1
2015-11-18drm/i915: Type safe register read/writeVille Syrjälä35-1573/+1540
2015-11-18drm/i915: Consider SPLL as another shared pll, v2.Maarten Lankhorst4-41/+83
2015-11-18drm/i915: Add missing ')' to SKL_PS_ECC_STAT defineVille Syrjälä1-1/+1
2015-11-18drm/i915: Add 'offset' to uncore funcsVille Syrjälä1-23/+25
2015-11-18drm/i915: Pull the vgpu uncore funcs apart from the rest of gen6+Ville Syrjälä1-26/+54
2015-11-18drm/i915: Turn vgpu pdps into an arrayVille Syrjälä2-15/+8
2015-11-18drm/i915: Wrap context LRI init in a macroVille Syrjälä1-51/+40
2015-11-18drm/i915: Give names to more ring registersVille Syrjälä2-11/+19
2015-11-18drm/i915: Wrap ASSIGN_CTX_{PDP,PM4L} in do {} while(0)Ville Syrjälä1-4/+4
2015-11-18drm/i915: Add wa_ctx_emit_reg()Ville Syrjälä1-4/+6
2015-11-18drm/i915: Add functions to emit register offsets to the ringVille Syrjälä10-23/+33
2015-11-18drm/i915: Make the cmd parser 64bit regs explicitVille Syrjälä2-14/+35
2015-11-18drm/i915: Make the high dword offset more explicit in i915_reg_read_ioctlVille Syrjälä2-12/+16
2015-11-18drm/i915: s/0x50/RING_PSMI_CTL/Ville Syrjälä1-1/+1
2015-11-18drm/i915: Parametrize MOCS registersVille Syrjälä2-31/+40
2015-11-18drm/i915: Parametrize L3 error registersVille Syrjälä3-9/+6
2015-11-18drm/i915: Prefix raw register defines with underscoreVille Syrjälä1-131/+131
2015-11-18drm/i915: Streamline gpio_mmio_base deductionVille Syrjälä1-8/+7
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