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linux-rolling-lts
linux-rolling-stable
master
Linux kernel stable tree (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
drivers
/
gpu
/
drm
/
tegra
Age
Commit message (
Expand
)
Author
Files
Lines
2015-05-08
drm/tegra: Don't use vblank_disable_immediate on incapable driver.
Mario Kleiner
1
-1
/
+0
2015-04-21
dma-buf: cleanup dma_buf_export() to make it easily extensible
Sumit Semwal
1
-2
/
+8
2015-04-08
Merge tag 'drm/tegra/for-4.1-rc1' of git://anongit.freedesktop.org/tegra/linu...
Dave Airlie
7
-66
/
+270
2015-04-02
drm/tegra: sor: Reset during initialization
Tomeu Vizoso
1
-0
/
+18
2015-04-02
drm/tegra: hdmi: Name register fields consistently
Thierry Reding
2
-2
/
+2
2015-04-02
drm/tegra: hdmi: Resets are synchronous
Thierry Reding
1
-1
/
+1
2015-04-02
drm/tegra: dc: Document tegra_dc_state_setup_clock()
Thierry Reding
1
-0
/
+12
2015-04-02
drm/tegra: dc: Remove unused callbacks
Thierry Reding
1
-2
/
+0
2015-04-02
drm/tegra: dc: Remove unused function
Thierry Reding
2
-22
/
+0
2015-04-02
drm/tegra: dc: Use base atomic state helpers
Thierry Reding
1
-13
/
+18
2015-04-02
drm/tegra: dc: Implement hardware VBLANK counter
Thierry Reding
4
-13
/
+35
2015-04-02
drm/tegra: sor: Dump registers via debugfs
Thierry Reding
1
-6
/
+165
2015-04-02
drm/tegra: sor: Registers are 32-bit
Thierry Reding
1
-7
/
+6
2015-04-02
drm/tegra: Provide debugfs file for the IOVA space
Thierry Reding
1
-0
/
+10
2015-04-02
drm/tegra: dc: Check for valid parent clock
Thierry Reding
1
-0
/
+3
2015-03-09
Merge tag 'v4.0-rc3' into drm-next
Dave Airlie
2
-39
/
+48
2015-03-05
drm: Pass in new and old plane state to prepare_fb and cleanup_fb
Tvrtko Ursulin
1
-2
/
+4
2015-02-24
drm/atomic-helper: Rename commmit_post/pre_planes
Daniel Vetter
1
-2
/
+2
2015-02-19
drm/tegra: dc: Move more code into ->init()
Thierry Reding
1
-38
/
+36
2015-02-19
drm/tegra: dc: Wire up CRTC parent of atomic state
Thierry Reding
1
-1
/
+3
2015-02-19
drm/tegra: dc: Reset state's active_changed field
Thierry Reding
1
-0
/
+1
2015-02-19
drm/tegra: hdmi: Explicitly set clock rate
Thierry Reding
1
-0
/
+8
2015-01-27
drm/tegra: Use correct relocation target offsets
David Ung
1
-1
/
+1
2015-01-27
drm/tegra: Add minimal power management
Thierry Reding
1
-0
/
+25
2015-01-27
drm/tegra: dc: Unify enabling the display controller
Thierry Reding
5
-52
/
+16
2015-01-27
drm/tegra: Track tiling and format in plane state
Thierry Reding
2
-30
/
+101
2015-01-27
drm/tegra: Track active planes in CRTC state
Thierry Reding
1
-28
/
+44
2015-01-27
drm/tegra: Remove unused ->mode_fixup() callbacks
Thierry Reding
4
-179
/
+0
2015-01-27
drm/tegra: Atomic conversion, phase 3, step 3
Thierry Reding
3
-119
/
+100
2015-01-27
drm/tegra: Atomic conversion, phase 3, step 2
Thierry Reding
1
-1
/
+1
2015-01-27
drm/tegra: dc: Use atomic clock state in modeset
Thierry Reding
1
-0
/
+37
2015-01-27
drm/tegra: sor: Implement ->atomic_check()
Thierry Reding
1
-0
/
+22
2015-01-27
drm/tegra: hdmi: Implement ->atomic_check()
Thierry Reding
1
-0
/
+22
2015-01-27
drm/tegra: dsi: Implement ->atomic_check()
Thierry Reding
1
-73
/
+196
2015-01-27
drm/tegra: rgb: Implement ->atomic_check()
Thierry Reding
1
-0
/
+42
2015-01-27
drm/tegra: dc: Store clock setup in atomic state
Thierry Reding
2
-3
/
+72
2015-01-27
drm/tegra: Atomic conversion, phase 3, step 1
Thierry Reding
2
-6
/
+10
2015-01-27
drm/tegra: Atomic conversion, phase 2
Thierry Reding
6
-0
/
+22
2015-01-27
drm/tegra: Atomic conversion, phase 1
Thierry Reding
7
-185
/
+223
2015-01-27
drm/tegra: dc: Do not needlessly deassert reset
Thierry Reding
1
-4
/
+0
2015-01-27
drm/tegra: Output cleanup functions cannot fail
Thierry Reding
6
-32
/
+13
2015-01-27
drm/tegra: Remove remnants of the output midlayer
Thierry Reding
7
-212
/
+32
2015-01-27
drm/tegra: debugfs cleanup cannot fail
Thierry Reding
3
-27
/
+9
2015-01-27
drm/tegra: sor: Demidlayer
Thierry Reding
3
-368
/
+410
2015-01-27
drm/tegra: dsi: Demidlayer
Thierry Reding
3
-169
/
+195
2015-01-27
drm/tegra: hdmi: Demidlayer
Thierry Reding
3
-139
/
+147
2015-01-27
drm/tegra: rgb: Demidlayer
Thierry Reding
4
-112
/
+161
2015-01-27
drm/tegra: Add tegra_dc_setup_clock() helper
Thierry Reding
2
-0
/
+22
2015-01-27
drm/tegra: output: Make ->setup_clock() optional
Thierry Reding
2
-11
/
+9
2015-01-27
drm/tegra: Convert output midlayer to helpers
Thierry Reding
2
-12
/
+21
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