summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/tegra/sor.c
AgeCommit message (Expand)AuthorFilesLines
2015-12-17Merge tag 'drm/tegra/for-4.5-rc1' of git://anongit.freedesktop.org/tegra/linu...Dave Airlie1-80/+65
2015-12-14drm/tegra: checking for IS_ERR() instead of NULLDan Carpenter1-3/+3
2015-12-14drm/tegra: sor: Remove unnecessary conditionalThierry Reding1-52/+41
2015-12-14drm/tegra: sor: Operate on struct drm_dp_aux *Thierry Reding1-32/+28
2015-12-11drm: Pass 'name' to drm_encoder_init()Ville Syrjälä1-1/+1
2015-11-10remove abs64()Andrew Morton1-2/+2
2015-08-13drm/tegra: sor: Add HDMI supportThierry Reding1-34/+960
2015-08-13drm/tegra: sor: Add Tegra210 eDP supportThierry Reding1-0/+1
2015-08-13drm/tegra: sor: Restore DPMSThierry Reding1-138/+82
2015-08-13drm/tegra: sor: Use DRM debugfs infrastructure for CRCThierry Reding1-37/+8
2015-08-13drm/tegra: sor: Write correct head state registersThierry Reding1-4/+6
2015-08-13drm/tegra: sor: Constify display modeThierry Reding1-1/+1
2015-08-13drm/tegra: sor: Reset the correct debugfs fieldsThierry Reding1-2/+2
2015-08-13drm/tegra: sor: Set minor after debugfs initializationThierry Reding1-0/+2
2015-08-13drm/tegra: sor: Provide error messages in probeThierry Reding1-6/+23
2015-08-13drm/tegra: sor: Rename registers for consistencyThierry Reding1-186/+185
2015-04-02drm/tegra: sor: Reset during initializationTomeu Vizoso1-0/+18
2015-04-02drm/tegra: sor: Dump registers via debugfsThierry Reding1-6/+165
2015-04-02drm/tegra: sor: Registers are 32-bitThierry Reding1-7/+6
2015-01-27drm/tegra: dc: Unify enabling the display controllerThierry Reding1-22/+3
2015-01-27drm/tegra: Remove unused ->mode_fixup() callbacksThierry Reding1-27/+0
2015-01-27drm/tegra: sor: Implement ->atomic_check()Thierry Reding1-0/+22
2015-01-27drm/tegra: Atomic conversion, phase 2Thierry Reding1-0/+2
2015-01-27drm/tegra: Atomic conversion, phase 1Thierry Reding1-0/+2
2015-01-27drm/tegra: Output cleanup functions cannot failThierry Reding1-5/+3
2015-01-27drm/tegra: Remove remnants of the output midlayerThierry Reding1-6/+6
2015-01-27drm/tegra: debugfs cleanup cannot failThierry Reding1-8/+3
2015-01-27drm/tegra: sor: DemidlayerThierry Reding1-350/+408
2015-01-27drm/tegra: Stop CRTC at CRTC disable timeThierry Reding1-4/+0
2015-01-27drm/tegra: Use tegra_commit_dc() in output driversThierry Reding1-4/+2
2014-08-08Merge tag 'cleanup-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git...Linus Torvalds1-1/+2
2014-08-04drm/tegra: add MODULE_DEVICE_TABLEsStephen Warren1-0/+1
2014-08-04drm/tegra: sor - Configure proper sync polaritiesThierry Reding1-3/+13
2014-08-04drm/tegra: sor - Use bits-per-color from panelStéphane Marchesin1-1/+1
2014-08-04drm/tegra: sor - missing unlock on errorDan Carpenter1-1/+1
2014-07-17ARM: tegra: Convert PMC to a driverThierry Reding1-1/+1
2014-07-17ARM: tegra: Move includes to include/soc/tegraThierry Reding1-1/+2
2014-06-09drm/tegra: sor - Remove obsolete commentThierry Reding1-1/+1
2014-06-09drm/tegra: sor - Enable only the necessary number of lanesThierry Reding1-1/+1
2014-06-09drm/tegra: sor - Power on only the necessary lanesThierry Reding1-3/+17
2014-06-09drm/tegra: sor - Do not program interlaced mode registersThierry Reding1-3/+0
2014-06-09drm/tegra: sor - Do not hardcode link speedThierry Reding1-2/+2
2014-06-09drm/tegra: sor - Do not hardcode number of blank symbolsThierry Reding1-3/+23
2014-06-09drm/tegra: sor - Don't hardcode link parametersThierry Reding1-10/+213
2014-06-09drm/tegra: sor - Change power down orderingStéphane Marchesin1-1/+1
2014-06-09drm/tegra: sor - Fix copy/paste errorStéphane Marchesin1-1/+1
2014-06-09drm/tegra: sor - Remove pixel clock roundingStéphane Marchesin1-3/+0
2014-06-06drm/tegra: sor - Make debugfs setup consistentThierry Reding1-6/+5
2014-06-06drm/tegra: sor - Recursively remove debugfs treeThierry Reding1-1/+1
2014-06-06drm/tegra: Remove host1x drm_bus implementationThierry Reding1-3/+3
generated by cgit v1.2.3 (git 2.39.0) at 2025-01-02 16:41:13 +0300