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path: root/drivers/gpu/drm/rockchip
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2017-08-09drm/rockchip: Fix suspend crash when drm is not boundJeffy Chen1-2/+10
Currently we are allocating drm_device in rockchip_drm_bind, so if the suspend/resume code access it when drm is not bound, we would hit this crash: [ 253.402836] Unable to handle kernel NULL pointer dereference at virtual address 00000028 [ 253.402837] pgd = ffffffc06c9b0000 [ 253.402841] [00000028] *pgd=0000000000000000, *pud=0000000000000000 [ 253.402844] Internal error: Oops: 96000005 [#1] PREEMPT SMP [ 253.402859] Modules linked in: btusb btrtl btbcm btintel bluetooth ath10k_pci ath10k_core ar10k_ath ar10k_mac80211 cfg80211 ip6table_filter asix usbnet mii [ 253.402864] CPU: 4 PID: 1331 Comm: cat Not tainted 4.4.70 #15 [ 253.402865] Hardware name: Google Scarlet (DT) [ 253.402867] task: ffffffc076c0ce00 ti: ffffffc06c2c8000 task.ti: ffffffc06c2c8000 [ 253.402871] PC is at rockchip_drm_sys_suspend+0x20/0x5c Add sanity checks to prevent that. Reported-by: Brian Norris <briannorris@chromium.com> Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.kernel.org/patch/9890297/
2017-08-04drm/rockchip: vop: report error when check resource errorMark yao1-1/+3
The user would be confused while facing a error commit without any error report. Signed-off-by: Mark Yao <mark.yao@rock-chips.com> Reviewed-by: Sandy huang <sandy.huang@rock-chips.com> Link: https://patchwork.freedesktop.org/patch/msgid/1501494596-7090-1-git-send-email-mark.yao@rock-chips.com
2017-08-04drm/rockchip: vop: round_up pitches to word alignMark yao1-2/+2
VOP pitch register is word align, need align to word. VOP_WIN0_VIR: bit[31:16] win0_vir_stride_uv Number of words of Win0 uv Virtual width bit[15:0] win0_vir_width Number of words of Win0 yrgb Virtual width ARGB888 : win0_vir_width RGB888 : (win0_vir_width*3/4) + (win0_vir_width%3) RGB565 : ceil(win0_vir_width/2) YUV : ceil(win0_vir_width/4) Signed-off-by: Mark Yao <mark.yao@rock-chips.com> Reviewed-by: Sandy huang <sandy.huang@rock-chips.com> Link: https://patchwork.freedesktop.org/patch/msgid/1501494591-7034-1-git-send-email-mark.yao@rock-chips.com
2017-08-04drm/rockchip: vop: fix NV12 video display errorMark yao1-0/+3
fixup the scale calculation formula on the case src_height == (dst_height/2). Signed-off-by: Mark Yao <mark.yao@rock-chips.com> Reviewed-by: Sandy huang <sandy.huang@rock-chips.com> Link: https://patchwork.freedesktop.org/patch/msgid/1501494586-6984-1-git-send-email-mark.yao@rock-chips.com
2017-08-04drm/rockchip: vop: fix iommu page fault when resumeMark yao1-18/+15
Iommu would get page fault with following path: vop_disable: 1, disable all windows and set vop config done 2, vop enter to standy, all windows not works, but their registers are not clean, when you read window's enable bit, may found the window is enable. vop_enable: 1, memcpy(vop->regsbak, vop->regs, len) save current vop registers to vop->regsbak, then you can found window is enable on regsbak. 2, VOP_WIN_SET(vop, win, gate, 1); force enable window gate, but gate and enable are on same hardware register, then window enable bit rewrite to vop hardware. 3, vop power on, and vop might try to scan destroyed buffer, then iommu get page fault. Move windows disable after vop regsbak restore, then vop regsbak mechanism would keep tracing the modify, everything would be safe. Signed-off-by: Mark Yao <mark.yao@rock-chips.com> Reviewed-by: Sandy huang <sandy.huang@rock-chips.com> Link: https://patchwork.freedesktop.org/patch/msgid/1501494582-6934-1-git-send-email-mark.yao@rock-chips.com
2017-07-24drm/rockchip: fix Kconfig dependenciesArnd Bergmann1-10/+9
A bug that I had fixed earlier just came back, with CONFIG_EXTCON=m, the rockchip drm driver will fail to link: drivers/gpu/drm/rockchip/cdn-dp-core.o: In function `cdn_dp_get_port_lanes': cdn-dp-core.c:(.text.cdn_dp_get_port_lanes+0x30): undefined reference to `extcon_get_state' cdn-dp-core.c:(.text.cdn_dp_get_port_lanes+0x6c): undefined reference to `extcon_get_property' drivers/gpu/drm/rockchip/cdn-dp-core.o: In function `cdn_dp_check_sink_connection': cdn-dp-core.c:(.text.cdn_dp_check_sink_connection+0x80): undefined reference to `extcon_get_state' drivers/gpu/drm/rockchip/cdn-dp-core.o: In function `cdn_dp_enable': cdn-dp-core.c:(.text.cdn_dp_enable+0x748): undefined reference to `extcon_get_property' The problem is that that the sub-drivers are now all linked into the main rockchip drm module, which breaks all the Kconfig dependencies that are specified in the options for those sub-drivers. This clarifies the dependency to ensure that we can only turn on the DP driver when EXTCON is reachable. As the 'select' statements can now cause additional options to become built-in when they should be loadable modules, I'm moving those into the main driver config option. The dependency on DRM_ROCKCHIP can be reduced into a single 'if' statement here for brevity, but this has no functional effect. Fixes: b6705157b2db ("drm/rockchip: add extcon dependency for DP") Fixes: 8820b68bd378 ("drm/rockchip: Refactor the component match logic.") Link: https://patchwork.kernel.org/patch/9648761/ Acked-by: Guenter Roeck <groeck@chromium.org> Tested-by: Jeffy Chen <jeffy.chen@rock-chips.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Mark Yao <mark.yao@rock-chips.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170721211214.3386387-1-arnd@arndb.de
2017-07-10drm/rockchip: fix NULL check on devm_kzalloc() return valueGustavo A. R. Silva1-1/+1
The right variable to check here is port, not dp. This issue was detected using Coccinelle and the following semantic patch: @@ expression x; identifier fld; @@ * x = devm_kzalloc(...); ... when != x == NULL x->fld Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com> Acked-by: Mark Yao <mark.yao@rock-chips.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/20170706215833.GA25411@embeddedgus
2017-06-20Merge remote-tracking branch 'airlied/drm-next' into drm-misc-next-fixesSean Paul4-30/+20
Backmerging airlied/drm-next
2017-06-19Merge remote-tracking branch 'origin/master' into drm-misc-next-fixesSean Paul5-19/+15
Backmerge 4.12-rc6 into -next-fixes. -next-fixes will contain find patches for 4.13 merge window
2017-06-16BackMerge tag 'v4.12-rc5' into drm-nextDave Airlie5-19/+15
Linux 4.12-rc5 for nouveau fixes
2017-06-05drm/bridge/synopsys: dw-hdmi: Use bridge->mode_valid() callbackJose Abreu1-1/+1
Now that we have a callback to check if bridge supports a given mode we can use it in Synopsys Designware HDMI bridge so that we restrict the number of probbed modes to the ones we can actually display. Also, there is no need to use mode_fixup() callback as mode_valid() will handle the mode validation. NOTE: I also had to change the pdata declaration of mode_valid custom callback so that the passed modes are const. I also changed in the platforms I found. Not even compiled it though. Signed-off-by: Jose Abreu <joabreu@synopsys.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Cc: Carlos Palminha <palminha@synopsys.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Archit Taneja <architt@codeaurora.org> Cc: Andrzej Hajda <a.hajda@samsung.com> Cc: Laurent Pinchart <Laurent.pinchart@ideasonboard.com> Cc: David Airlie <airlied@linux.ie> Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: Carlo Caione <carlo@caione.org> Cc: Kevin Hilman <khilman@baylibre.com> Cc: Mark Yao <mark.yao@rock-chips.com> Cc: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Archit Taneja <architt@codeaurora.org> Link: http://patchwork.freedesktop.org/patch/msgid/3d8d449e4d13d2535fa292c75f5fa931de4a4fa8.1495720737.git.joabreu@synopsys.com
2017-06-01drm/rockchip: gem: add the lacks lock and trivial changesCaesar Wang2-3/+4
As the allocation and free buffer that need to add mutex lock for drm mm, but it lacks the locking on error path in rockchip_gem_iommu_map(). Also, the trivial changes like The comment should be placed in the kerneldoc and unused blank line. Signed-off-by: Caesar Wang <wxt@rock-chips.com> Reviewed-by: Mark Yao <mark.yao@rock-chips.com> Signed-off-by: Mark Yao <mark.yao@rock-chips.com> Link: http://patchwork.freedesktop.org/patch/msgid/1496196863-25738-1-git-send-email-wxt@rock-chips.com
2017-05-31drm/rockchip: Correct vop out_mode configureMark yao5-19/+15
Force vop output mode on encoder driver seem not a good idea, EDP, HDMI, DisplayPort all have 10bit input on rk3399, On non-10bit vop, vop 8bit output bit[0-7] connect to the encoder high 8bit [2-9]. So force RGB10 to RGB888 on vop driver would be better. And another problem, EDP check crtc id on atomic_check, but encoder maybe NULL, so out_mode configure would fail, it cause edp no display. Signed-off-by: Mark Yao <mark.yao@rock-chips.com> Reviewed-by: Jeffy Chen <jeffy.chen@rock-chips.com> Link: http://patchwork.freedesktop.org/patch/msgid/1495885416-22216-1-git-send-email-mark.yao@rock-chips.com
2017-05-26drm/rockchip: use drm_for_each_connector_iter()Gustavo Padovan1-5/+6
Drop legacy drm_for_each_connector() in favor of the race-free drm_for_each_connector_iter() Cc: Mark Yao <mark.yao@rock-chips.com> Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/20170515134330.3275-1-gustavo@padovan.org
2017-05-02drm/rockchip: analogix_dp: Remove unused check and variablesJeffy Chen1-9/+1
Remove unused check and variables after: drm/rockchip: Set line flag config register in vop_crtc_enable Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/1493469547-2121-1-git-send-email-jeffy.chen@rock-chips.com
2017-04-27drm/rockchip: Set line flag config register in vop_crtc_enableJeffy Chen3-15/+12
We need to set vop config done after update line flag config, it's a new requirement for chips newer than rk3368. Since we would only use line flag irq for vact_end, let's move it to vop_crtc_enable. Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Acked-by: Mark Yao <mark.yao@rock-chips.com Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/1493276057-4516-1-git-send-email-jeffy.chen@rock-chips.com
2017-04-07drm/rockchip: Shutdown all crtcs when unbinding drmJeffy Chen1-0/+1
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/1491481885-13775-12-git-send-email-jeffy.chen@rock-chips.com
2017-04-07drm/rockchip: Reorder drm bind/unbind sequenceJeffy Chen1-23/+26
Current drm bind/unbind sequence would cause some memory issues. For example we should not cleanup iommu before cleanup mode config. Reorder bind/unbind sequence, follow exynos drm. Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> [seanpaul fixed spelling typo in commit subject] Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/1491481885-13775-11-git-send-email-jeffy.chen@rock-chips.com
2017-04-07drm/rockchip: analogix_dp: Disable clock when unbindingJeffy Chen1-1/+2
The clock is enabled when binding cdn dp. Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/1491481885-13775-10-git-send-email-jeffy.chen@rock-chips.com
2017-04-07drm/rockchip: vop: Unprepare clocks when unbindingJeffy Chen1-0/+4
The clocks are prepared when binding vop. Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/1491481885-13775-9-git-send-email-jeffy.chen@rock-chips.com
2017-04-07drm/rockchip: vop: Enable pm domain before vop_initialJeffy Chen1-8/+21
We're trying to access vop registers here, so need to make sure the pm domain is on. Normally it should be enabled by the bootloader, but there's no guarantee of it. And if we wanna do unbind/bind, it would also cause the device to hang. And this patch also does these: 1/ move vop_initial to the end of vop_bind for eaiser error handling. 2/ correct the err_put_pm_runtime of vop_enable. Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/1491481885-13775-8-git-send-email-jeffy.chen@rock-chips.com
2017-04-07drm/rockchip: cdn-dp: Don't unregister audio dev when unbindingJeffy Chen1-3/+3
After snd_soc_unregister_codec, the dai link would remain bound to the invalid codec. That would cause crashes after unbind dp driver. Let's unregister audio codec when removing dp driver to prevent that. Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/1491481885-13775-7-git-send-email-jeffy.chen@rock-chips.com
2017-04-07drm/rockchip: cdn-dp: Don't try to release firmware when not loadedJeffy Chen1-1/+3
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/1491481885-13775-6-git-send-email-jeffy.chen@rock-chips.com
2017-04-07drm: convert drivers to use drm_of_find_panel_or_bridgeRob Herring1-22/+4
Similar to the previous commit, convert drivers open coding OF graph parsing to use drm_of_find_panel_or_bridge instead. This changes some error messages to debug messages (in the graph core). Graph connections are often "no connects" depending on the particular board, so we want to avoid spurious messages. Plus the kernel is not a DT validator. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Archit Taneja <architt@codeaurora.org> Tested-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> [seanpaul dropped rockchip changes since they're now obsolete] Signed-off-by: Sean Paul <seanpaul@chromium.org>
2017-03-24drm/rockchip/dsi: correct the grf_switch_reg nameChris Zhong1-2/+2
For the RK3399, the grf_switch_reg name should be RK3399_GRF_SOC_CON20, not RK3399_GRF_SOC_CON19. Signed-off-by: Chris Zhong <zyw@rock-chips.com> Reviewed-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/1490147691-4489-5-git-send-email-zyw@rock-chips.com
2017-03-24drm/rockchip/dsi: enable the grf clk before writing grf registersChris Zhong1-1/+25
For RK3399, the grf clk should be enabled before writing grf registers, otherwise the register value can not be changed. Signed-off-by: Chris Zhong <zyw@rock-chips.com> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/1490147691-4489-4-git-send-email-zyw@rock-chips.com
2017-03-24drm/rockchip/dsi: check phy_cfg_clk only for RK3399Chris Zhong1-6/+8
For RK3399, the phy_cfg_clk is a required clock, if phy_cfg_clk is disabled, MIPI phy can not work. Let's return a error if there is no phy_cfg_clk in dts property, when the pdata match RK3399. Signed-off-by: Chris Zhong <zyw@rock-chips.com> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/1490147691-4489-2-git-send-email-zyw@rock-chips.com
2017-03-24drm/rockchip: Refactor the component match logic.Jeffy Chen10-108/+118
Currently we are adding all components from the dts, if one of their drivers been disabled, we would not be able to bring up others. Refactor component match logic, follow exynos drm. Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> Acked-by: Mark Yao <mark.yao@rock-chips.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/1490152880-21855-1-git-send-email-jeffy.chen@rock-chips.com
2017-03-14Merge tag 'doc-4.11-images' of git://git.lwn.net/linux into drm-misc-nextDaniel Vetter2-1/+4
Pointer for Markus's image conversion work. We need this so we can merge all the pretty drm graphs for 4.12. Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2017-03-13drm/rockchip: cdn-dp: add more log for video configChris Zhong1-0/+4
In order to analyze some video config failed, add some useful printouts. Signed-off-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/1488940077-22297-4-git-send-email-zyw@rock-chips.com
2017-03-13drm/rockchip: cdn-dp: Correct PHY register addressChris Zhong1-6/+5
Correct some DP register address for PHY Configuration according to latest datasheet. Signed-off-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/1488940077-22297-3-git-send-email-zyw@rock-chips.com
2017-03-13drm/rockchip: cdn-dp: return error code when clk_get_rate failedChris Zhong3-4/+5
The clk_get_rate return 0 if something goes wrong, so it can never be less then zero, the ret should be set a error code, otherwise the cdn_dp_clk_enable will return 0 when it failed at clk_get_rate. In addition, clk_get_rate() returns an "unsigned long", so use "unsigned long" instead of "u32" is better. Signed-off-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/1488940077-22297-2-git-send-email-zyw@rock-chips.com
2017-03-10drm: bridge: dw-hdmi: Remove device type from platform dataKieran Bingham1-1/+0
The device type isn't used anymore now that workarounds and PHY-specific operations are performed based on version information read at runtime. Remove it. Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Jose Abreu <joabreu@synopsys.com> Signed-off-by: Archit Taneja <architt@codeaurora.org> Link: http://patchwork.freedesktop.org/patch/msgid/20170303172007.26541-9-laurent.pinchart+renesas@ideasonboard.com
2017-03-07drm/rockchip: Fix link error when CONFIG_DRM_ANALOGIX_DP undefinedSean Paul1-0/+10
Fixes the following link error when CONFIG_DRM_ANALOGIX_DP is not defined: ERROR: "analogix_dp_start_crc" [drivers/gpu/drm/rockchip/rockchipdrm.ko] undefined! ERROR: "analogix_dp_stop_crc" [drivers/gpu/drm/rockchip/rockchipdrm.ko] undefined! Fixes: 3190e58dafaf ("drm/rockchip: Implement CRC debugfs API") Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com> Cc: Mark Yao <mark.yao@rock-chips.com> Cc: Sean Paul <seanpaul@chromium.org> Cc: Heiko Stuebner <heiko@sntech.de> Cc: dri-devel@lists.freedesktop.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-rockchip@lists.infradead.org Cc: Emil Velikov <emil.l.velikov@gmail.com> Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2017-03-06drm/rockchip: Implement CRC debugfs APITomeu Vizoso1-0/+41
Implement the .set_crc_source() callback and call the DP helpers accordingly to start and stop CRC capture. This is only done if this CRTC is currently using the eDP connector. v3: Remove superfluous check on rockchip_crtc_state->output_type v6: Remove superfluous variable Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Acked-by: Mark Yao <mark.yao@rock-chips.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/20170303133936.14964-5-tomeu.vizoso@collabora.com
2017-03-01drm/rockchip/dsi: add dw-mipi power domain supportChris Zhong1-0/+16
Reference the power domain incase dw-mipi power down when in use. Signed-off-by: Chris Zhong <zyw@rock-chips.com> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/1487577744-2855-8-git-send-email-zyw@rock-chips.com
2017-03-01drm/rockchip/dsi: fix insufficient bandwidth of some panelChris Zhong1-2/+2
Set the lanes bps to 1 / 0.9 times of pclk, the margin is not enough for some panel, it will cause the screen display is not normal, so increases the badnwidth to 1 / 0.8. Signed-off-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/1487577744-2855-7-git-send-email-zyw@rock-chips.com
2017-03-01drm/rockchip/dsi: remove mode_valid functionChris Zhong1-39/+0
The MIPI DSI do not need check the validity of resolution, the max resolution should depend VOP. Hence, remove rk3288_mipi_dsi_mode_valid here. Signed-off-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/1487577744-2855-5-git-send-email-zyw@rock-chips.com
2017-03-01drm/rockchip/dsi: dw-mipi: correct the coding styleChris Zhong1-15/+14
correct the coding style, according the checkpatch scripts Signed-off-by: Chris Zhong <zyw@rock-chips.com> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/1487577744-2855-4-git-send-email-zyw@rock-chips.com
2017-03-01drm/rockchip/dsi: dw-mipi: support RK3399 mipi dsiChris Zhong1-10/+62
The vopb/vopl switch register of RK3399 mipi is different from RK3288, the default setting for mipi dsi mode is different too, so add a of_device_id structure to distinguish them, and make sure set the correct mode before mipi phy init. Signed-off-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Mark Yao <mark.yao@rock-chips.com> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/1487577744-2855-3-git-send-email-zyw@rock-chips.com
2017-03-01drm/rockchip: dw-mipi-dsi: add reset controlJohn Keeping1-0/+31
In order to fully reset the state of the MIPI controller we must assert this reset. This is slightly more complicated than it could be in order to maintain compatibility with device trees that do not specify the reset property. Signed-off-by: John Keeping <john@metanate.com> Reviewed-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/20170224125506.21533-24-john@metanate.com
2017-03-01drm/rockchip: dw-mipi-dsi: support non-burst modesJohn Keeping1-8/+13
Signed-off-by: John Keeping <john@metanate.com> Reviewed-by: Chris Zhong <zyw@rock-chips.com> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/20170224125506.21533-23-john@metanate.com
2017-03-01drm/rockchip: dw-mipi-dsi: defer probe if panel is not loadedJohn Keeping1-3/+18
This ensures that the output resolution is known before fbcon loads. mipi_dsi_host_register() is moved above dw_mipi_dsi_register() to simplify error cleanup since the order of these operations does not matter. Signed-off-by: John Keeping <john@metanate.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/20170224125506.21533-22-john@metanate.com
2017-03-01drm/rockchip: vop: test for P{H,V}SYNCJohn Keeping1-4/+4
When connected to the MIPI DSI output, we need to use N{H,V}SYNC for the internal connection but these flags are meaningless for DSI panels. Switch the test so that we do not set the P{H,V}SYNC bits unless the mode requires it. Signed-off-by: John Keeping <john@metanate.com> Reviewed-by: Mark Yao <mark.yao@rock-chips.com> Reviewed-by: Sean Paul <seanpaul@chromium.org> [seanpaul resolved conflict using macros instead of hardcoded values] Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20170224125506.21533-21-john@metanate.com
2017-03-01drm/rockchip: dw-mipi-dsi: use positive check for N{H, V}SYNCJohn Keeping1-2/+2
This matches other drivers. Signed-off-by: John Keeping <john@metanate.com> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/20170224125506.21533-20-john@metanate.com
2017-03-01drm/rockchip: dw-mipi-dsi: use specific poll helperJohn Keeping1-5/+5
As the documentation for readx_poll_timeout says, we want to use the specialized macro for readl rather than using the generic version directly. Signed-off-by: John Keeping <john@metanate.com> Reviewed-by: Chris Zhong <zyw@rock-chips.com> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/20170224125506.21533-19-john@metanate.com
2017-03-01drm/rockchip: dw-mipi-dsi: improve PLL configurationJohn Keeping1-1/+12
The multiplication ratio for the PLL is required to be even due to the use of a "by 2 pre-scaler". Currently we are likely to end up with an odd multiplier even though there is an equivalent set of parameters with an even multiplier. For example, using the 324MHz bit rate with a reference clock of 24MHz we end up with M = 27, N = 2 whereas the example in the PHY databook gives M = 54, N = 4 for this bit rate and reference clock. By walking down through the available multiplier instead of up we are more likely to hit an even multiplier. With the above example we do now get M = 54, N = 4 as given by the databook. While doing this, change the loop limits to encode the actual limits on the divisor, which are: 40MHz >= (pllref / N) >= 5MHz Signed-off-by: John Keeping <john@metanate.com> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/20170224125506.21533-18-john@metanate.com
2017-03-01drm/rockchip: dw-mipi-dsi: properly configure PHY timingJohn Keeping1-4/+31
These values are specified as constant time periods but the PHY configuration is in terms of the current lane byte clock so using constant values guarantees that the timings will be outside the specification with some display configurations. Derive the necessary configuration from the byte clock in order to ensure that the PHY configuration is correct. Signed-off-by: John Keeping <john@metanate.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/20170224125506.21533-17-john@metanate.com
2017-03-01drm/rockchip: dw-mipi-dsi: configure PHY before enablingJohn Keeping1-5/+6
The bias, bandgap and PLL should all be configured before we enable them. Signed-off-by: John Keeping <john@metanate.com> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/20170224125506.21533-16-john@metanate.com
2017-03-01drm/rockchip: dw-mipi-dsi: ensure PHY is resetJohn Keeping1-1/+4
Also don't power up the DSI host at this point since this is not necessary in order to configure the PHY and we do so later when selecting video or command mode. Signed-off-by: John Keeping <john@metanate.com> Reviewed-by: Chris Zhong <zyw@rock-chips.com> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/20170224125506.21533-15-john@metanate.com
generated by cgit v1.2.3 (git 2.39.0) at 2025-01-01 09:00:23 +0300