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path: root/drivers/gpu/drm/rcar-du/rcar_du_lvdsenc.c
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2018-03-07drm: rcar-du: Convert LVDS encoder code to bridge driverLaurent Pinchart1-238/+0
The LVDS encoders used to be described in DT as part of the DU. They now have their own DT node, linked to the DU using the OF graph bindings. This allows moving internal LVDS encoder support to a separate driver modelled as a DRM bridge. Backward compatibility is retained as legacy DT is patched live to move to the new bindings. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
2018-02-15drm: rcar-du: lvds: Refactor LVDS startupSergei Shtylyov1-81/+51
After the recent corrections to the R-Car gen2/3 LVDS startup code, already similar enough at their ends rcar_lvds_enable_gen{2|3}() started asking for a merge and it's becoming actually necessary with the addition of the R-Car V3M (R8A77970) support -- this gen3 SoC has gen2-like LVDPLLCR layout. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> [Set the LVDS mode and input before turning channels on] [Rebased, coding style changes] Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2018-02-14drm: rcar-du: lvds: Fix LVDS startup on R-Car Gen3Sergei Shtylyov1-2/+5
According to the latest revisions of the R-Car Gen3 manual, the LVDS mode must be set before the LVDS I/O pins are enabled, not after -- fix the Gen3 LVDS startup sequence accordingly. Fixes: e947eccbeba4 ("drm: rcar-du: Add support for LVDS mode selection") Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> [Updated comment in rcar_du_lvdsenc_start_gen3()] [Moved Gen2 startup comment update to separate commit] [Fixed =| typo] Tested-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2018-02-14drm: rcar-du: lvds: Fix LVDS startup on R-Car Gen2Sergei Shtylyov1-5/+6
According to the latest revision 2.00 of the R-Car Gen2 manual, the LVDS and the bias circuit must be enabled after the LVDS I/O pins are enabled, not before. Fix the Gen2 LVDS startup sequence accordingly. While at it, also fix the comment preceding the first LVDCR0 write that still talks about hardcoding the LVDS mode 0. Fixes: 90374b5c25c9 ("drm/rcar-du: Add internal LVDS encoder support") Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2018-02-14drm: rcar-du: lvds: Fix LVDS clock frequency rangeLaurent Pinchart1-8/+2
According to the latest versions of both the Gen2 and Gen3 datasheets, the operating range for the LVDS clock is 31 MHz to 148.5 MHz on all SoCs. Update the driver accordingly. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
2018-02-14drm: rcar-du: lvds: Fix LVDCR1 for R-Car gen3Sergei Shtylyov1-6/+4
The LVDCR1 register for the R-Car gen3 SoCs was documented as having the layout different from the gen2 SoCs in the early R-Car gen3 manuals but since v0.52 the LVDCR1 layout is described as being the same as on the gen2 SoCs; the old CHn control values are said to be prohibited now (and there seems to be no valid output signal when they are used). Fixes: 6bc2e15cf21c ("drm: rcar-du: lvds: Add R-Car Gen3 support") Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2017-08-03drm: rcar-du: Fix comments to comply with the kernel coding styleLaurent Pinchart1-4/+8
To avoid mixing comment styles when new comments complying with the kernel coding style are introduced, fix all multiline comments in one go. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
2017-04-04drm: rcar-du: Add support for LVDS mode selectionLaurent Pinchart1-2/+9
Retrieve the LVDS mode from the panel and configure the LVDS encoder accordingly. LVDS mode selection is static as LVDS panels can't be hot-plugged on any of the device supported by the driver. Support for dynamic mode selection can be implemented in the future when needed. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2016-11-15drm: rcar-du: Fix LVDS start sequence on Gen3Koji Matsuoka1-7/+8
According to the latest revision of the datasheet, the LVDS I/O pins must be enabled before starting the PLL. Fix it. Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2016-11-14drm: rcar-du: Remove memory allocation error messageLaurent Pinchart1-3/+1
Memory allocation failures print messages to the kernel log, there's no need to print an extra one. Remove the duplicate message. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
2016-02-23drm: rcar-du: lvds: Add R-Car Gen3 supportKoji Matsuoka1-36/+97
The LVDS encoder differs slightly in Gen3 SoCs in its PLL configuration. Add support for the Gen3 LVDS PLL parameters and startup procedure. Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2016-02-23drm: rcar-du: lvds: Rename PLLEN bit to PLLONLaurent Pinchart1-1/+1
The bit is named PLLON in the datasheet, rename it. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2016-02-23drm: rcar-du: lvds: Fix PLL frequency-related configurationLaurent Pinchart1-3/+3
The frequency checks don't match the datasheet, fix them. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2016-02-23drm: rcar-du: lvds: Avoid duplication of clock clamp codeLaurent Pinchart1-0/+9
Replace the duplicate code by a single central function. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2015-03-03drm: rcar-du: Replace LVDS encoder DPMS by enable/disableLaurent Pinchart1-9/+9
The LVDS encoder doesn't support DPMS states, replace the DPMS operation by enable/disable to avoid propagating DPMS states down to the encoder code. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2014-09-15drm/rcar-du: Update copyright noticeLaurent Pinchart1-1/+1
The "Renesas Corporation" listed in the copyright notice doesn't exist. Replace it with "Renesas Electronics Corporation" and update the copyright years. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-12-02drm/rcar-du: Add LVDS_LANES quirkLaurent Pinchart1-5/+10
LVDS lanes 1 and 3 are switched in ES1 hardware (R8A7790). The problem has been fixed in newer revisions, add a quirk to make the workaround selectable. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-12-02drm/rcar-du: fix return value check in rcar_du_lvdsenc_get_resources()Wei Yongjun1-11/+2
In case of error, the function devm_ioremap_resource() returns ERR_PTR() and never returns NULL. The NULL test in the return value check should be replaced with IS_ERR(). Also remove the dev_err call to avoid redundant error message. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-08-10drm/rcar-du: Add internal LVDS encoder supportLaurent Pinchart1-0/+196
The R8A7790 includes two internal LVDS encoders. Support them in the DU driver. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
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