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path: root/drivers/gpu/drm/radeon/rv770.c
AgeCommit message (Expand)AuthorFilesLines
2016-05-05drm/radeon: Support DRM_MODE_PAGE_FLIP_ASYNCMichel Dänzer1-1/+3
2016-05-02drm/radeon: consolidate rv770 uvd initialization and startup code.Jérome Glisse1-28/+74
2015-05-28drm/radeon: partially revert "fix VM_CONTEXT*_PAGE_TABLE_END_ADDR handling"Christian König1-1/+1
2015-05-12drm/radeon: fix VM_CONTEXT*_PAGE_TABLE_END_ADDR handlingChristian König1-1/+1
2015-01-22radeon/audio: consolidate audio_fini() functionsSlava Grigorev1-1/+1
2015-01-22radeon/audio: consolidate audio_init() functionsSlava Grigorev1-1/+2
2014-10-01drm/radeon: remove unecessary includesAlex Deucher1-1/+0
2014-08-26drm/radeon: handle broken disabled rb mask gracefully (6xx/7xx) (v2)Alex Deucher1-15/+8
2014-08-05drm/radeon: Remove radeon_gart_restore()Michel Dänzer1-1/+0
2014-06-10drm/radeon: add query for number of active CUsAlex Deucher1-0/+3
2014-06-02drm/radeon: split page flip and pending callbackChristian König1-2/+8
2014-03-07drm/radeon: resume old pm lateAlex Deucher1-1/+2
2014-02-27drm/radeon: free uvd ring on unloadJerome Glisse1-1/+1
2014-01-30drm/radeon: clean up active vram sizingAlex Deucher1-1/+2
2014-01-09drm/radeon: implement pci config reset for r6xx/7xx (v3)Alex Deucher1-0/+29
2013-12-25drm/radeon: remove generic rptr/wptr functions (v2)Alex Deucher1-3/+0
2013-12-25drm/radeon/pm: move pm handling into the asic specific codeAlex Deucher1-0/+7
2013-12-25drm/radeon: re-order firmware loading in preparation for dpm reworkAlex Deucher1-8/+8
2013-08-31drm/radeon: fix init ordering for r600+Alex Deucher1-4/+5
2013-08-31drm/radeon: separate DMA codeChristian König1-74/+0
2013-08-31drm/radeon: separate UVD code v3Christian König1-101/+4
2013-08-31drm/radeon: remove special handling for the DMA ringChristian König1-3/+3
2013-08-31drm/radeon: rework UVD writeback & [rw]ptr handlingChristian König1-2/+1
2013-08-31drm/radeon: restructure UVD code to handle UVD PG (v2)Alex Deucher1-1/+1
2013-08-31drm/radeon/kms: remove r6xx+ blit copy routinesAlex Deucher1-7/+0
2013-08-15drm/radeon/r7xx: fix copy paste typo in golden register setupAlex Deucher1-6/+6
2013-08-08drm/radeon: only save UVD bo when we have open handlesChristian König1-1/+1
2013-08-08drm/radeon: always program the MC on startupAlex Deucher1-1/+2
2013-08-08drm/radeon: fix halting UVDChristian König1-0/+2
2013-07-14drm/radeon: never unpin UVD bo v3Christian König1-1/+1
2013-06-03radeon: Fix system hang issue when using KMS with older cardsAdis Hamzić1-4/+6
2013-05-29radeon: use max_bus_speed to activate gen2 speedsKleber Sacilotto de Souza1-7/+2
2013-05-29drm/radeon: UVD block on SUMO2 is the same as on SUMOChristian König1-3/+1
2013-05-02drm/radeon: consolidate UVD clock programmingChristian König1-93/+17
2013-04-24drm/radeon/7xx: add support for golden register initAlex Deucher1-0/+652
2013-04-22drm/radeon: put UVD PLLs in bypass modeChristian König1-7/+13
2013-04-09drm/radeon/kms: replace *REG32_PCIE_P with *REG32_PCIE_PORTAlex Deucher1-16/+16
2013-04-09drm/radeon: add UVD tiling addr config v2Christian König1-0/+5
2013-04-09drm/radeon: add set_uvd_clocks callback for r7xx v3Christian König1-0/+156
2013-04-09drm/radeon: UVD bringup v8Christian König1-0/+132
2013-04-09drm/radeon: clean up vram/gtt location handlingAlex Deucher1-1/+1
2013-02-20drm/radeon: add a asic callback to get the xclkAlex Deucher1-0/+25
2013-01-04drm/radeon: split r6xx and r7xx copy_dma functionsAlex Deucher1-0/+74
2012-12-11drm/radeon/kms: Add initial support for async DMA on r6xx/r7xxAlex Deucher1-2/+29
2012-10-04Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds1-5/+5
2012-10-02UAPI: (Scripted) Convert #include "..." to #include <path/...> in drivers/gpu/David Howells1-2/+2
2012-09-20drm/radeon: Mark all possible functions / structs as staticLauri Kasanen1-5/+5
2012-07-20drm/radeon/kms: auto detect pcie link speed from root portDave Airlie1-0/+11
2012-07-17drm/radeon: record what is next valid wptr for each ring v4Christian König1-1/+3
2012-07-17drm/radeon: move radeon_ib_ring_tests out of chipset codeChristian König1-4/+0
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