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path: root/drivers/gpu/drm/radeon/reg_srcs
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2014-02-06drm/radeon: allow geom rings to be setup on r600/r700 (v2)Dave Airlie1-0/+1
the evergreen CS parser has allowed this for a while, just port the code to the r600 one. This is required before geom shaders can be made work. v2: agd5f: minor cleanup and add additional 7xx reg. Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-12-03drm/radeon: fix VGT_GS_INSTANCE_CNT registerDave Airlie2-2/+2
This register was incorrect for evergreen and cayman. Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-12-03drm/radeon: Fix a typo in Cayman and Evergreen registersAlexandre Demers2-2/+2
According to documentation, 0x00008A60 should be PA_SU_LINE_STIPPLE_VALUE. Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-01-28drm/radeon: add WAIT_UNTIL to the non-VM safe regs list for cayman/TNAlex Deucher1-0/+1
Newer versions of mesa emit this. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2013-01-15drm/radeon: allow FP16 color clear registers on r500Marek Olšák1-0/+2
Probably not a candidate for stable kernels because of conflicts in DRM versioning. Signed-off-by: Marek Olšák <maraeo@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-08-29drm/radeon: add proper checking of RESOLVE_BOX command for r600-r700Marek Olšák1-1/+0
Checking of the second colorbuffer was skipped on r700, because CB_TARGET_MASK was 0xf. With r600, CB_TARGET_MASK is changed to 0xff, so we must set the number of samples of the second colorbuffer to 1 in order to pass the CS checker. The DRM version is bumped, because RESOLVE_BOX is always rejected without this fix on r600. Signed-off-by: Marek Olšák <maraeo@gmail.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-08-20drm/radeon: allow CMASK and FMASK in the CS checker on r600-r700Marek Olšák1-8/+0
MSAA is impossible without them. Signed-off-by: Marek Olšák <maraeo@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2012-03-26drm/radeon/kms: add htile support to the cs checker v3Jerome Glisse3-3/+0
For 6xx+. Required for mesa to use htile support for HiZ/HiS. Userspace will check radeon version 2.14 with is bumped either by tiling patch or stream out patch. This patch only add support for htile relocation which should be enough for any userspace to implement the hyperz (using htile buffer) feature. v2: Jerome: Fix size checking for htile buffer. v3: Jerome: Adapt on top of r600/evergreen cs checker changes, also check htile surface in case only stencil is present. Signed-off-by: Pierre-Eric Pelloux-Prayer <pelloux@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-20drm/radeon/kms: remove some unused variables in evergreen_cs_trackMarek Olšák2-0/+24
and document the other unused ones. Signed-off-by: Marek Olšák <maraeo@gmail.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-20drm/radeon/kms: skip cb/db checking if SX_MISC is 1 on r600+Marek Olšák3-3/+0
Signed-off-by: Marek Olšák <maraeo@gmail.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-02-13drm/radeon: add support for evergreen/ni tiling informations v11Jerome Glisse3-10/+0
evergreen and northern island gpu needs more informations for 2D tiling than previous r6xx/r7xx. Add field to tiling ioctl to allow userspace to provide those. The v8 cs checking change to track color view on r6xx/r7xx doesn't affect old userspace as old userspace always emited 0 for this register. v2 fix r6xx/r7xx 2D tiling computation v3 fix r6xx/r7xx height align for untiled surface & add support for tile split on evergreen and newer v4 improve tiling debugging output v5 fix tile split code for evergreen and newer v6 set proper tile split for crtc register v7 fix tile split limit value v8 add COLOR_VIEW checking to r6xx/r7xx checker, add evergreen cs checking, update safe reg for r600, evergreen and cayman. Evergreen checking need some work around for stencil alignment issues v9 fix tile split value range, fix compressed texture handling and mipmap calculation, allow evergreen check to be silencious in front of current broken userspace (depth/stencil alignment issue) v10 fix eg 3d texture and compressed texture, fix r600 depth array, fix r600 color view computation, add support for evergreen stencil split v11 more verbose debugging in some case Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-02-13drm/radeon/kms: add support for streamout v7Marek Olšák3-0/+31
v2: agd5f: add strmout CS checking, copy_dw register checking v3: agd5f: don't use cs_check_reg() for copy_dw checking as it will incorrectly patch the command stream for certain regs. v4: agd5f: add warning if safe reg check fails for copy_dw v5: agd5f: add stricter checking for 6xx/7xx v6: agd5f: add range checking for copy_dw on eg+, add sx_surface_sync to safe reg list for 7xx. v7: agd5f: add stricter checking for eg+ Signed-off-by: Marek Olšák <maraeo@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-06-21drm/radeon/kms: add initial CS checker support for computeAlex Deucher3-0/+6
- Add some new compute regs - Add new dispatch packets for evergreen/cayman Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-06-08Merge branch 'drm-radeon-fixes' of ↵Linus Torvalds1-1/+0
git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6 * 'drm-radeon-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: drm/radeon/kms/atom: fix PHY init drm/radeon/kms: add missing Evergreen texture formats to the CS parser drm/radeon/kms: viewport height has to be even drm/radeon/kms: remove duplicate reg from r600 safe regs drm/radeon/kms: add support for Llano Fusion APUs drm/radeon/kms: add llano pci ids drm/radeon/kms: fill in asic struct for llano drm/radeon/kms: add family ids for llano APUs drm/radeon: fix oops in ttm reserve when pageflipping (v2) drm/radeon/kms: clean up the radeon kms Kconfig drm/radeon/kms: fix thermal sensor reading on juniper drm/radeon/kms: add missing case for cayman thermal sensor drm/radeon/kms: add blit support for cayman (v2) drm/radeon/kms/blit: workaround some hw issues on evergreen+
2011-06-02drm/radeon/kms: remove duplicate reg from r600 safe regsAlex Deucher1-1/+0
It got added twice by accident. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-05-13drm/radeon/kms: add some evergreen/ni safe regsAlex Deucher2-0/+2
need to programmed from the userspace drivers. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-04-27drm/radeon/kms: add missing safe regs for 6xx/7xxAlex Deucher1-0/+1
needed for HiS in mesa. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-03-14Merge remote branch 'intel/drm-intel-next' of ../drm-next into drm-core-nextDave Airlie4-22/+4
* 'intel/drm-intel-next' of ../drm-next: (755 commits) drm/i915: Only wait on a pending flip if we intend to write to the buffer drm/i915/dp: Sanity check eDP existence drm/i915: Rebind the buffer if its alignment constraints changes with tiling drm/i915: Disable GPU semaphores by default drm/i915: Do not overflow the MMADDR write FIFO Revert "drm/i915: fix corruptions on i8xx due to relaxed fencing" drm/i915: Don't save/restore hardware status page address register drm/i915: don't store the reg value for HWS_PGA drm/i915: fix memory corruption with GM965 and >4GB RAM Linux 2.6.38-rc7 Revert "TPM: Long default timeout fix" drm/i915: Re-enable GPU semaphores for SandyBridge mobile drm/i915: Replace vblank PM QoS with "Interrupt-Based AGPBUSY#" Revert "drm/i915: Use PM QoS to prevent C-State starvation of gen3 GPU" drm/i915: Allow relocation deltas outside of target bo drm/i915: Silence an innocuous compiler warning for an unused variable fs/block_dev.c: fix new kernel-doc warning ACPI: Fix build for CONFIG_NET unset mm: <asm-generic/pgtable.h> must include <linux/mm_types.h> x86: Use u32 instead of long to set reset vector back to 0 ... Conflicts: drivers/gpu/drm/i915/i915_gem.c
2011-03-03drm/radeon/kms: cayman/evergreen cs checker updatesAlex Deucher2-0/+4
Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-03-03drm/radeon/kms: add cayman safe regsAlex Deucher1-0/+617
For the CS checker. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-02-14drm/radeon/kms: check AA resolve registers on r300Marek Olšák4-12/+0
This is an important security fix because we allowed arbitrary values to be passed to AARESOLVE_OFFSET. This also puts the right buffer address in the register. Signed-off-by: Marek Olšák <maraeo@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-02-14drm/radeon/kms: fix tracking of BLENDCNTL, COLOR_CHANNEL_MASK, and GB_Z on r300Marek Olšák4-10/+4
Also move ZB_DEPTHCLEARVALUE to the list of safe regs. Signed-off-by: Marek Olšák <maraeo@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-01-17drm/radeon/kms: fix typo in evergreen safe regAlex Deucher1-1/+1
Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-12-21drm/radeon/kms: allow r500 US_FORMAT regs in the CS checkerMarek Olšák1-0/+16
add to the 2.8 bump for pageflip The purpose of these regs is to work around a TX hw bug in R520. Signed-off-by: Marek Olšák <maraeo@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-10-26drm/radeon/kms/evergreen: add some additional safe regs v2Alex Deucher1-0/+8
These are needed for enabling dynamic GPR allocation in the shaders in the userspace acceleration drivers. v2: fix typo in reg name Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-08-12drm/radeon/kms: allow FG_ALPHA_VALUE on r5xxMarek Olšák1-0/+1
This is a CS checker fix. I need this for FP16 alpha-test. Signed-off-by: Marek Olšák <maraeo@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-08-02drm/radeon: add basic zmask/hiz support (v4)Dave Airlie4-52/+1
This interface allows userspace to request hyperz support, it probably needs more locking, and really reporting that you can have hyperz is racy since someone else might get it before you do. v2: modify so we pass 0 valued packets to let DDX/r300c keep working. also fixed incorrect 0x4f1c reference. v3: fixup zb_bw_cntl so older drivers keep working v4: add locking, fixup SC_HYPERZ_EN - patch stream to disable hiz Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-07-01drm/radeon/kms: fix typos in evergreen command checkerAlex Deucher1-5/+5
Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-06-01drm/radeon/kms/evergreen: add initial CS parserAlex Deucher1-0/+611
Advanced validation is not implemented yet. The mesa code that uses this will be released soon. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-04-19drm/radeon/kms: allow R500 regs VAP_ALT_NUM_VERTICES and VAP_INDEX_OFFSETMarek Olšák1-0/+1
[airlied: fix V_A_N_V to not be safe and fix check to make sure only r500 - bump userspace version] Signed-off-by: Marek Olšák <maraeo@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-04-19drivers/gpu/radeon: Add MSPOS regs to safe list.Corbin Simpson4-0/+8
Permits MSAA and D3D-style rasterization. [airlied: add rs600] Signed-off-by: Corbin Simpson <MostAwesomeDude@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-03-31drm/radeon/r6xx/r7xx: further safe reg clean upAlex Deucher1-19/+0
- remove a few more drm only regs - remove sampler, alu, bool, loop constant regs. They are set via separate packet3's already Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-03-31drm/radeon/r6xx/r7xx: CS parser fixesAlex Deucher1-53/+0
- Drop some more safe regs taht userspace shouldn't hit - Constant base regs need relocs. This allows us to use constant buffers rather than the constant register file. Also we don't want userspace to be able to set arbitrary mc base values for the const caches. - Track SQ_CONFIG so we know whether userspace is using the cfile or constant buffers. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-03-31drm/radeon/r600: remove some regs are not safe regs for command buffersAlex Deucher1-3/+0
Only the drm should be touching them. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-02-11drm/radeon/kms: r600/r700 command stream checkerJerome Glisse1-0/+837
This patch add cs checker to r600/r700 hw. Command stream checking will rewrite some of the cs value in order to restrict GPU access to BO size. This doesn't break old userspace but just enforce safe value. It should break any things that was using the r600/r700 cs ioctl to do forbidden things (malicious software), though we are not aware of such things. Here is the list of thing we check : - enforcing resource size - enforcing color buffer slice tile max, will restrict cb access - enforcing db buffer slice tile max, will restrict db access We don't check for shader bigger than the BO in which they are supposed to be, such use would lead to GPU lockup and is harmless from security POV, as far as we can tell (note that even checking for this wouldn't prevent someone to write bogus shader that lead to lockup). This patch has received as much testing as humanly possible with old userspace to check that it didn't break such configuration. However not all the applications out there were tested, thus it might broke some odd, rare applications. [airlied: fix rules for cs checker for parallel builds] Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-01-21drm/radeon/kms/r200: fix bug in CS parserAndrew Randrianasulu1-0/+2
Add missing vertex shader regs for r200. fixed fdo bug 26061 agd5f: use official reg names Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@linux.ie>
2010-01-11drm/radeon/kms: add additional safe regs for r4xx/rs6xx and r5xxAlex Deucher3-1/+868
- r4xx/rs6xx: add support for extended pixel shader instruction/temp regs - r5xx: add SM3 regs Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-09-08drm/radeon/kms: add rn50/r100/r200 CS tracker.Dave Airlie3-0/+319
This adds the command stream checker for the RN50, R100 and R200 cards. It stops any access to 3D registers on RN50, and does checks on buffer sizes on the r100/r200 cards. It also fixes some texture sizing checks on r300. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-09-07drm/radeon/kms: add updated registers from drm-fixes.Dave Airlie3-0/+5
Fixes up the DISCARD + 2 sided stencil in the new generator scripts. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-09-07drm/radeon/kms: block depthxy offset from use from userspace.Dave Airlie3-3/+0
This could be used to bypass CS checks. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-08-31drm/radeon: cleanup mkregtable.cDave Airlie2-2/+2
This cleans up the code in mkregtable.c to be more kernel style. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-08-27drm/rs600/690: use autogenerated safe register tables.Dave Airlie1-0/+728
This ports rs690 to the safe reg tables and makes rs600 also use the same table. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-08-21drm/radeon/kms: generate the safe register tables.Dave Airlie2-0/+1214
Previously we just made these offline and included them, but no reason we can't generate them at build time. TODO: add rs690 + r100/r200 when done. should we do rs480/rs690 no tcl version? Signed-off-by: Dave Airlie <airlied@redhat.com>