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path: root/drivers/gpu/drm/radeon/radeon_drv.h
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2023-12-06drm/radeon: Do not include <drm/drm_legacy.h>Thomas Zimmermann1-1/+0
Including <drm/drm_legacy.h> is not required by radeon. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com> Cc: amd-gfx@lists.freedesktop.org Reviewed-by: David Airlie <airlied@gmail.com> Reviewed-by: Daniel Vetter <daniel@ffwll.ch> Acked-by: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20231122122449.11588-8-tzimmermann@suse.de
2023-07-25drm/radeon: Avoid externs & do not initialize globals to 0 in radeon_drv.cSrinivasan Shanmugam1-0/+13
Fixes the following: - WARNING: externs should be avoided in .c files - ERROR: do not initialise globals to 0 - WARNING: Missing a blank line after declarations Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-03-31drm/radeon: Implement client-based fbdev emulationThomas Zimmermann1-1/+0
Implement fbdev emulation on top of struct drm_client and its helpers. Replaces ad-hoc interfaces for restoring and closing fbdev emulation with per-client callbacks for hotplugging, restoring and unregistering. A single function, radeon_fbdev_setup(), starts fbdev emulation after the DRM device has been registered. Hence, fbdev acts like a regular DRM client. The setup call prepares the fbdev emulation and invokes connector hotplugging. The first successful hotplug event initializes fbdev emulation with a framebuffer, device file, etc. Unregistering depends on the hotplug status. Fully initialized emulation is cleaned up through drm_fb_helper_unregister_info() and fb_destroy. For prepared-only setups, unregistering unprepares the emulation and releases all resources. In both cases, fbdev emulation will be cleaned up. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-13drm/radeon/radeon_drv: Move prototypes to a shared headerfileLee Jones1-0/+7
Fixes the following W=1 kernel build warning(s): 62 | void radeon_driver_unload_kms(struct drm_device *dev) | ^~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/radeon/radeon_kms.c:105:5: warning: no previous prototype for ‘radeon_driver_load_kms’ [-Wmissing-prototypes] 105 | int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags) | ^~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/radeon/radeon_kms.c:619:6: warning: no previous prototype for ‘radeon_driver_lastclose_kms’ [-Wmissing-prototypes] 619 | void radeon_driver_lastclose_kms(struct drm_device *dev) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/radeon/radeon_kms.c:634:5: warning: no previous prototype for ‘radeon_driver_open_kms’ [-Wmissing-prototypes] 634 | int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv) | ^~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/radeon/radeon_kms.c:705:6: warning: no previous prototype for ‘radeon_driver_postclose_kms’ [-Wmissing-prototypes] 705 | void radeon_driver_postclose_kms(struct drm_device *dev, | ^~~~~~~~~~~~~~~~~~~~~~~~~~~ Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Gareth Hughes <gareth@valinux.com> Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-24drm/radeon: drop unused ati pcigart include.Dave Airlie1-1/+0
Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-12-02drm/radeon: remove UMS supportAlex Deucher1-2048/+0
It's been deprecated behind a kconfig option for almost two years and hasn't really been supported for years before that. DDX support was dropped more than three years ago. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-06drm/irq: Use unsigned int pipe in public APIThierry Reding1-3/+3
This continues the pattern started in commit cc1ef118fc09 ("drm/irq: Make pipe unsigned and name consistent"). This is applied to the public APIs and driver callbacks, so pretty much all drivers need to be updated to match the new prototypes. Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Inki Dae <inki.dae@samsung.com> Cc: Jianwei Wang <jianwei.wang.chn@gmail.com> Cc: Alison Wang <alison.wang@freescale.com> Cc: Patrik Jakobsson <patrik.r.jakobsson@gmail.com> Cc: Daniel Vetter <daniel.vetter@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: David Airlie <airlied@linux.ie> Cc: Rob Clark <robdclark@gmail.com> Cc: Ben Skeggs <bskeggs@redhat.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Mark Yao <mark.yao@rock-chips.com> Cc: Benjamin Gaignard <benjamin.gaignard@linaro.org> Cc: Vincent Abriou <vincent.abriou@st.com> Cc: Thomas Hellstrom <thellstrom@vmware.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-12drm: Create drm legacy driver headerDaniel Vetter1-0/+1
And move a few legayc functions to start things over there. It compiles ... Inspired by a patch from Dave Airlie, but with a split between drm.ko private legacy functions and stuff used by drivers. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-12drm: split ati_pcigart.h out of drmP.hDave Airlie1-0/+1
Just move this into a separate header file, and make the two users use it. Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-12-18drm: Kill DRM_IRQ_ARGSDaniel Vetter1-1/+1
I've killed them a long time ago in drm/i915, let's get rid of this remnant of shared drm core days for good. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-12-03drm/radeon: fix VGT_GS_INSTANCE_CNT registerDave Airlie1-1/+2
This register was incorrect for evergreen and cayman. Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01drm/radeon: add runtime PM support (v2)Dave Airlie1-0/+3
This hooks radeon up to the runtime PM system to enable dynamic power management for secondary GPUs in switchable and powerxpress laptops. v2: agd5f: clean up, add module parameter Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-02-01drm/radeon: Deprecate UMS support v2Christian König1-11/+5
KMS support is out and stable for a couple of years now and the userspace code has deprecated or abandoned the old UMS interface. So make the KMS interface the default and deprecate the UMS interface in the kernel as well. v2: rebased on alex/drm-next-3.9-wip Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-12-14drm/radeon: add W|RREG32_IDX for MM_INDEX|DATA based mmio accesssDaniel Vetter1-1/+0
Just refactoring to make the next patche simpler. Now all indirect register access in the new modesetting driver should go through the r100_mm_(w|r)reg fucntions. RADEON_READ_MM from the old driver seems to be totally unused, so just kill it. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2011-03-31Fix common misspellingsLucas De Marchi1-1/+1
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
2011-02-14drm/radeon: 6xx/7xx non-kms endian fixesCédric Cano1-0/+1
agd5f: minor cleanups Signed-off-by: Cédric Cano <ccano@interfaceconcept.com> Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-03-31drm/radeon: bump the UMS driver version for r6xx/r7xx const buffer supportAlex Deucher1-1/+2
Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-03-01vga_switcheroo: fix build on platforms with no ACPIDave Airlie1-0/+6
radeon was always including the atpx code unnecessarily, also core switcheroo was including acpi headers. Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-03-01Merge branch 'gpu-switcher' of /ssd/git//linux-2.6 into drm-next-stageDave Airlie1-0/+3
* 'gpu-switcher' of /ssd/git//linux-2.6: vga_switcheroo: initial implementation (v15) fb: for framebuffer handover don't exit the loop early. Conflicts: drivers/gpu/drm/i915/i915_dma.c drivers/gpu/drm/radeon/Makefile drivers/gpu/drm/radeon/radeon.h
2010-03-01vga_switcheroo: initial implementation (v15)Dave Airlie1-0/+3
Many new laptops now come with 2 gpus, one to be used for low power modes and one for gaming/on-ac applications. These GPUs are typically wired to the laptop panel and VGA ports via a multiplexer unit which is controlled via ACPI methods. 4 combinations of systems typically exist - with 2 ACPI methods. Intel/ATI - Lenovo W500/T500 - use ATPX ACPI method ATI/ATI - some ASUS - use ATPX ACPI Method Intel/Nvidia - - use _DSM ACPI method Nvidia/Nvidia - - use _DSM ACPI method. TODO: This patch adds support for the ATPX method and initial bits for the _DSM methods that need to written by someone with access to the hardware. Add a proper non-debugfs interface - need to get some proper testing first. v2: add power up/down support for both devices on W500 puts i915/radeon into D3 and cuts power to radeon. v3: redo probing methods, no DMI list, drm devices call to register with switcheroo, it tries to find an ATPX method on any device and once there is two devices + ATPX it inits the switcher. v4: ATPX msg handling using buffers - should work on more machines v5: rearchitect after more mjg59 discussion - move ATPX handling to radeon driver. v6: add file headers + initial nouveau bits (to be filled out). v7: merge delayed switcher code. v8: avoid suspend/resume of gpu that is off v9: rearchitect - mjg59 is always right. - move all ATPX code to radeon, should allow simpler DSM also proper ATRM handling v10: add ATRM support for radeon BIOS, add mutex to lock vgasr_priv v11: fix bug in resuming Intel for 2nd time. v12: start fixing up nvidia code blindly. v13: blindly guess at finishing nvidia code v14: remove radeon audio hacks - fix up intel resume more like upstream v15: clean up printks + remove unnecessary igd/dis pointers mount debugfs /sys/kernel/debug/vgaswitcheroo/switch - should exist if ATPX detected + 2 cards. DIS - immediate change to discrete IGD - immediate change to IGD DDIS - delayed change to discrete DIGD - delayed change to IGD ON - turn on not in use OFF - turn off not in use Tested on W500 (Intel/ATI) and T500 (Intel/ATI) Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-03-01Merge branch 'drm-radeon-testing' of /ssd/git/drm-radeon-next into ↵Dave Airlie1-0/+2
drm-next-stage * 'drm-radeon-testing' of /ssd/git/drm-radeon-next: drm/radeon: r100/r200 ums: block ability for userspace app to trash 0 page and beyond drm/ttm: fix function prototype to match implementation drm/radeon: use ALIGN instead of open coding it drm/radeon/kms: initialize set_surface_reg reg for rs600 asic
2010-03-01drm/radeon: r100/r200 ums: block ability for userspace app to trash 0 page ↵Dave Airlie1-0/+2
and beyond radeon's have a special ability to passthrough writes in their internal memory space directly to PCI, this ability means that if some of the internal surfaces like the depth buffer point at 0x0, any writes to these will go directly to RAM at 0x0 via PCI busmastering. Now mesa used to always emit clears after emitting state, since the radeon mesa driver was refactored a year or more ago, it was found it could generate a clear request without ever sending any setup state to the card. So the clear would attempt to clear the depth buffer at 0x0, which would overwrite main memory at this point. fs corruption ensues. Also once one app did this correctly, it would never get set back to 0 making this messy to reproduce. The kernel should block this from happening as mesa runs without privs, though it does require the user be connected to the current running X session. This patch implements a check to make sure the depth offset has been set before a depth clear occurs and if it finds one it prints a warning and ignores the depth clear request. There is also a mesa fix to avoid sending the badness going into mesa. This only affects r100/r200 GPUs in user modesetting mode. Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-02-26Merge remote branch 'korg/drm-radeon-testing' into drm-next-stageDave Airlie1-1/+34
* korg/drm-radeon-testing: (62 commits) drm/radeon/kms: update new pll algo drm/radeon/kms: add support for square microtiles on r3xx-r5xx drm/radeon/kms: force pinning buffer into visible VRAM drm/radeon/kms/evergreen: fix typo in cursor code drm/radeon/kms: implement reading active PCIE lanes on R600+ drm/radeon/kms: for downclocking non-mobility check PERFORMANCE state drm/radeon/kms: simplify storing current and requested PM mode drm/radeon: fixes for r6xx/r7xx gfx init drm/radeon/rv740: fix backend setup drm/radeon/kms: fix R3XX/R4XX memory controller initialization [rfc] drm/radeon/kms: pm debugging check for vbl. drm/radeon: Fix memory allocation failures in the preKMS command stream checking. drm: Add generic multipart buffer. drm/radeon/kms: simplify memory controller setup V2 drm/radeon: Add asic hook for dma copy to r200 cards. drm/radeon/kms: Create asic structure for r300 pcie cards. drm/radeon/kms: remove unused r600_gart_clear_page drm/radeon/kms: remove HDP flushes from fence emit (v2) drm/radeon/kms: add LVDS pll quirk for Dell Studio 15 drm/radeon/kms: simplify picking power state ... Conflicts: drivers/gpu/drm/radeon/atom.c drivers/gpu/drm/radeon/atombios.h drivers/gpu/drm/radeon/atombios_dp.c drivers/gpu/drm/radeon/r600.c drivers/gpu/drm/radeon/r600_audio.c drivers/gpu/drm/radeon/r600_cp.c drivers/gpu/drm/radeon/radeon.h drivers/gpu/drm/radeon/radeon_connectors.c drivers/gpu/drm/radeon/radeon_ring.c drivers/gpu/drm/radeon/rv770.c
2010-02-23drm/radeon: Fix memory allocation failures in the preKMS command stream ↵Pauli Nieminen1-1/+31
checking. Allocation of single large block of memory may fail under memory presure. drm_buffer object can hold one large block of data in multiple independ pages which preents alloation failures. This patch converts all access to command stream to use drm_buffer interface. All direct access to array has to go tough drm_buffer functions to get correct pointer. Outputting the command stream to ring buffer needs to be awear of the split nature of drm_buffer. The output operation requires the new OUT_RING_DRM_BUFFER. Signed-off-by: Pauli Nieminen <suokkos@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-02-20drm/radeon: bump the UMS driver version number to indicate rv740 fixDave Airlie1-1/+2
This lets UMS userspace know the rv740 fix is in. For KMS we can consider the kernel release to be the v2.0.0 release so we don't need the bump there. Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-02-11drm/radeon/kms: r600/r700 command stream checkerJerome Glisse1-0/+3
This patch add cs checker to r600/r700 hw. Command stream checking will rewrite some of the cs value in order to restrict GPU access to BO size. This doesn't break old userspace but just enforce safe value. It should break any things that was using the r600/r700 cs ioctl to do forbidden things (malicious software), though we are not aware of such things. Here is the list of thing we check : - enforcing resource size - enforcing color buffer slice tile max, will restrict cb access - enforcing db buffer slice tile max, will restrict db access We don't check for shader bigger than the BO in which they are supposed to be, such use would lead to GPU lockup and is harmless from security POV, as far as we can tell (note that even checking for this wouldn't prevent someone to write bogus shader that lead to lockup). This patch has received as much testing as humanly possible with old userspace to check that it didn't break such configuration. However not all the applications out there were tested, thus it might broke some odd, rare applications. [airlied: fix rules for cs checker for parallel builds] Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-12-02drm/radeon/kms: Add support for interrupts on r6xx/r7xx chips (v3)Alex Deucher1-1/+0
This enables the use of interrupts on r6xx/r7xx hardware. Interrupts are implemented via a ring buffer. The GPU adds interrupts vectors to the ring and the host reads them off in the interrupt handler. The interrupt controller requires firmware like the CP. This firmware must be installed and accessble to the firmware loader for interrupts to function. MSIs don't seem to work on my RS780. They work fine on all my discrete cards. I'm not sure about other RS780s or RS880s. I've disabled MSIs on RS780 and RS880, but it would probably be worth checking on some other systems. v2 - fix some checkpatch.pl problems; re-read the disp int status reg if we restart the ih; v3 - remove the irq handler if r600_irq_init() fails; remove spinlock in r600_ih_ring_fini(); move ih rb overflow check to r600_get_ih_wptr(); move irq ack to separate function; Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-09-23drm/radeon: consolidate family flags used in pciids.Dave Airlie1-63/+2
having these separate was pointless and introduced a bug when one got updated without the other. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-09-21drm/radeon: some r420s have a CP race with the DMA engine.Alex Deucher1-0/+3
This patch makes sure the CP doesn't DMA do VRAM while 2D is active by inserting a CP resync token. todo: port to kms. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-09-15drm/radeon/kms: add 32/64 ioctl support.Dave Airlie1-0/+2
Although the new radeon driver ioctls don't need this, some of the drm initialisation ioctls require it, so add this to make them work. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-09-08drm/radeon/kms: add r600 KMS supportJerome Glisse1-6/+135
This adds the r600 KMS + CS support to the Linux kernel. The r600 TTM support is quite basic and still needs more work esp around using interrupts, but the polled fencing should work okay for now. Also currently TTM is using memcpy to do VRAM moves, the code is here to use a 3D blit to do this, but isn't fully debugged yet. Authors: Alex Deucher <alexdeucher@gmail.com> Dave Airlie <airlied@redhat.com> Jerome Glisse <jglisse@redhat.com> Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-09-07Merge intel drm-intel-next branchDave Airlie1-1/+4
Merge remote branch 'anholt/drm-intel-next' of ../anholt-2.6 into drm-next Conflicts: drivers/gpu/drm/i915/intel_display.c drivers/gpu/drm/i915/intel_drv.h drivers/gpu/drm/i915/intel_sdvo.c
2009-08-31radeon: Use request_firmware()Ben Hutchings1-0/+5
Loosely based on a patch by Jaswinder Singh Rajput <jaswinderlinux@gmail.com>. KMS support by Dave Airlie <airlied@redhat.com>. For Radeon 100- to 500-series, firmware blobs look like: struct { __be32 datah; __be32 datal; } cp_ucode[256]; For Radeon 600-series, there are two separate firmware blobs: __be32 me_ucode[PM4_UCODE_SIZE * 3]; __be32 pfp_ucode[PFP_UCODE_SIZE]; For Radeon 700-series, likewise: __be32 me_ucode[R700_PM4_UCODE_SIZE]; __be32 pfp_ucode[R700_PFP_UCODE_SIZE]; Signed-off-by: Ben Hutchings <ben@decadent.org.uk> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-08-21drm/radeon: add GET_PARAM/INFO support for Z pipesAlex Deucher1-1/+4
Needed for occlusion queries on rv530 chips. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-08-05drm/radeon: Add support for RS880 chipsAlex Deucher1-0/+1
These are new AMD IGP chips Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-06-13Merge branch 'drm-linus' of ↵Linus Torvalds1-0/+1
git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6 * 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (50 commits) drm: include kernel list header file in hashtab header drm: Export hash table functionality. drm: Split out the mm declarations in a separate header. Add atomic operations. drm/radeon: add support for RV790. drm/radeon: add rv740 drm support. drm_calloc_large: check right size, check integer overflow, use GFP_ZERO drm: Eliminate magic I2C frobbing when reading EDID drm/i915: duplicate desired mode for use by fbcon. drm/via: vfree() no need checking before calling it drm: Replace DRM_DEBUG with DRM_DEBUG_DRIVER in i915 driver drm: Replace DRM_DEBUG with DRM_DEBUG_MODE in drm_mode drm/i915: Replace DRM_DEBUG with DRM_DEBUG_KMS in intel_sdvo drm/i915: replace DRM_DEBUG with DRM_DEBUG_KMS in intel_lvds drm: add separate drm debugging levels radeon: remove _DRM_DRIVER from the preadded sarea map drm: don't associate _DRM_DRIVER maps with a master drm: simplify kcalloc() call to kzalloc(). intelfb: fix spelling of "CLOCK" drm: fix LOCK_TEST_WITH_RETURN macro drm/i915: Hook connector to encoder during load detection (fixes tv/vga detect) ...
2009-06-12drm/radeon: add rv740 drm support.Alex Deucher1-0/+1
This adds drm support for the RV740 family of chips to the r600 support code. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-06-04drm/radeon: fix ring free alignment calculationsDave Airlie1-1/+4
fd.o bz#21849 We were aligning to +16 dwords, instead of to the next 16dword boundary in the ring. Fix the calculation to go to the next 16dword boundary when space checking. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-04-24drm/radeon: bump minor version for occlusion queries supportMaciej Cencora1-1/+2
We already added support, just need to let userspace know when it can use them. Signed-off-by: Maciej Cencora <m.cencora@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-03-29drm/radeon: add regs required for occlusion queries supportMaciej Cencora1-1/+0
[airlied: cleaned up slightly for drm-next] Signed-off-by: Maciej Cencora <m.cencora@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-03-13radeon: add support for rs600 GPUsAlex Deucher1-0/+61
RS600s are an AMD IGP for Intel CPUs, that look like RS690s from a lot of perspectives but look like r600s from a memory controller point of view. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-03-13drm/radeon: add initial support for R6xx/R7xx GPUsAlex Deucher1-1/+24
This adds support for 2D/Xv acceleration in the X.org 2D driver, to the drm. It doesn't yet provide any 3D support hooks. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-03-13drm/radeon: prep for r6xx/r7xx supportAlex Deucher1-1/+503
- add r6xx/r7xx regs and macros - add r6xx/r7xx chip families - fix register access for regs with offsets >= 0x10000 Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-03-13drm/radeon: align ring writes to 16 dwords boundaries.Dave Airlie1-11/+9
On some radeon GPUs this appears to introduce another level of stability around interacting with the ring. Its pretty much what fglrx appears to do. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-03-13drm: radeon: Use surface for PCI GART table.David Miller1-0/+1
This allocates a physical surface for the PCI GART table, this way no matter what other surface configurations exist the GART table will always be seen by the hardware properly. We encode the file pointer of the virtual surface allocate using a special cookie value, called PCIGART_FILE_PRIV. On the last close, we release that surface. Just to be doubly safe, we run the pcigart table setup with the main surface control register clear. Based upon ideas from David Airlie and Ben Benjamin Herrenschmidt. Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Dave Airlie <airlied@linux.ie>
2009-03-13drm: radeon: Fix RADEON_*_EMITED defines.David Miller1-2/+2
These are not supposed to be booleans, they are supposed to be bit masks. Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Dave Airlie <airlied@linux.ie>
2009-03-13drm: radeon: Fix ring_rptr accesses.David Miller1-8/+9
The memory behind ring_rptr can either be in ioremapped memory or a vmalloc() normal kernel memory buffer. However, the code unconditionally uses DRM_{READ,WRITE}32() (and thus readl() and writel()) to access it. Basically, if RADEON_IS_AGP then it's ioremap()'d memory else it's vmalloc'd memory. Adjust all of the ring_rptr access code as needed. While we're here, kill the 'scratch' pointer in drm_radeon_private. It's only used in the one place where it is initialized. Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Dave Airlie <airlied@linux.ie>
2009-03-13drm: Use resource_size_t for drm_get_resource_{start, len}Benjamin Herrenschmidt1-1/+1
The DRM uses its own wrappers to obtain resources from PCI devices, which currently convert the resource_size_t into an unsigned long. This is broken on 32-bit platforms with >32-bit physical address space. This fixes them, along with a few occurences of unsigned long used to store such a resource in drivers. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Dave Airlie <airlied@linux.ie>
2008-12-29drm: move to kref per-master structures.Dave Airlie1-3/+11
This is step one towards having multiple masters sharing a drm device in order to get fast-user-switching to work. It splits out the information associated with the drm master into a separate kref counted structure, and allocates this when a master opens the device node. It also allows the current master to abdicate (say while VT switched), and a new master to take over the hardware. It moves the Intel and radeon drivers to using the sarea from within the new master structures. Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-12-09drm/radeon: don't actually enable the IRQ regs until irq is enabledDave Airlie1-1/+0
vblank can try and enable the IRQ registers before we've set the interrupt handler up. Signed-off-by: Dave Airlie <airlied@redhat.com>
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