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path: root/drivers/gpu/drm/radeon/evergreen.c
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2013-06-28drm/radeon/dpm: save some display parameters for DPMAlex Deucher1-0/+4
Required for SI. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-28drm/radeon: enable additional power gating features on trinityAlex Deucher1-6/+29
TN has some additional powergating features beyond what is supported on ON/LN. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-28drm/radeon: add support for ASPM on evergreen asicsAlex Deucher1-0/+150
Enables PCIE ASPM (Active State Power Management) on evergreen-cayman asics. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-28drm/radeon/kms: add dpm support for trinity asicsAlex Deucher1-3/+10
This adds dpm support for trinity asics. This includes: - clockgating - powergating - dynamic engine clock scaling - dynamic voltage scaling set radeon.dpm=1 to enable it. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-28drm/radeon/kms: add dpm support for evergreen (v4)Alex Deucher1-0/+22
This adds dpm support for evergreen asics. This includes: - clockgating - dynamic engine clock scaling - dynamic memory clock scaling - dynamic voltage scaling - dynamic pcie gen1/gen2 switching (requires additional acpi support) Set radeon.dpm=1 to enable. v2: reduce stack usage, rename ulv struct v3: fix thermal interrupt check notices by Jerome v4: fix state enable Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27drm/radeon/kms: fix up dce4/5 display watermark calc for dpmAlex Deucher1-23/+66
Calculate the low and high watermarks based on the low and high clocks for the current power state. The dynamic pm hw will select the appropriate watermark based on the internal dpm state. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27drm/radeon: properly set up the RLC on ON/LN/TN (v3)Alex Deucher1-0/+339
This is required for certain advanced functionality. v2: save/restore list takes dword offsets v3: rebase on gpu reset changes Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27drm/radeon/kms: move ucode defines to a separate headerAlex Deucher1-3/+1
Avoids confusion and duplication. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27drm/radeon/kms: add accessors for RCU indirect spaceAlex Deucher1-4/+2
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-03radeon: Fix system hang issue when using KMS with older cardsAdis Hamzić1-4/+6
The current radeon driver initialization routines, when using KMS, are written so that the IRQ installation routine is called before initializing the WB buffer and the CP rings. With some ASICs, though, the IRQ routine tries to access the GFX_INDEX ring causing a call to RREG32 with the value of -1 in radeon_fence_read. This, in turn causes the system to completely hang with some cards, requiring a hard reset. A call stack that can cause such a hang looks like this (using rv515 ASIC for the example here): * rv515_init (rv515.c) * radeon_irq_kms_init (radeon_irq_kms.c) * drm_irq_install (drm_irq.c) * radeon_driver_irq_preinstall_kms (radeon_irq_kms.c) * rs600_irq_process (rs600.c) * radeon_fence_process - due to SW interrupt (radeon_fence.c) * radeon_fence_read (radeon_fence.c) * hang due to RREG32(-1) The patch moves the IRQ installation to the card startup routine, after the ring has been initialized, but before the IRQ has been set. This fixes the issue, but requires a check to see if the IRQ is already installed, as is the case in the system resume codepath. I have tested the patch on three machines using the rv515, the rv770 and the evergreen ASIC. They worked without issues. This seems to be a known issue and has been reported on several bug tracking sites by various distributions (see links below). Most of reports recommend booting the system with KMS disabled and then enabling KMS by reloading the radeon module. For some reason, this was indeed a usable workaround, however, UMS is now deprecated and disabled by default. Bug reports: https://bugzilla.redhat.com/show_bug.cgi?id=845745 https://bugs.launchpad.net/ubuntu/+source/linux/+bug/561789 https://bbs.archlinux.org/viewtopic.php?id=156964 Signed-off-by: Adis Hamzić <adis@hamzadis.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2013-05-29radeon: use max_bus_speed to activate gen2 speedsKleber Sacilotto de Souza1-7/+3
radeon currently uses a drm function to get the speed capabilities for the bus, drm_pcie_get_speed_cap_mask. However, this is a non-standard method of performing this detection and this patch changes it to use the max_bus_speed attribute. From: Lucas Kannebley Tavares <lucaskt@linux.vnet.ibm.com> Signed-off-by: Kleber Sacilotto de Souza <klebers@linux.vnet.ibm.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-05-20drm/radeon: don't touch DCE or VGA regs on Hainan (v3)Alex Deucher1-10/+17
Hainan has no display hardware: - no DCE (crtc, uniphy, dac, etc.) - no VGA v2: fix bios fetch v3: fix interrupts Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2013-05-20drm/radeon: Fix VRAM size calculation for VRAM >= 4GBNiels Ole Salscheider1-2/+2
Add ULL prefix to avoid overflow. Signed-off-by: Niels Ole Salscheider <niels_ole@salscheider-online.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2013-05-02drm/radeon: consolidate UVD clock programmingChristian König1-92/+11
Instead of duplicating the code over and over again, just use a single function to handle the clock calculations. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-04-24drm/radeon/evergreen: add support for golden register initAlex Deucher1-0/+863
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-04-22drm/radeon: put UVD PLLs in bypass modeChristian König1-8/+14
Just power down the PLL when we get a VCLK or DCLK of zero. Enabling the bypass mode early should also allow us to switch UVD clocks on the fly. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-04-22drm/radeon: disable the crtcs in mc_stop (evergreen+) (v2)Alex Deucher1-0/+12
Just disabling the mem requests should be enough, but that doesn't seem to work correctly on efi systems. May fix: https://bugs.freedesktop.org/show_bug.cgi?id=57567 https://bugs.freedesktop.org/show_bug.cgi?id=43655 https://bugzilla.kernel.org/show_bug.cgi?id=56441 v2: blank displays first, then disable. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2013-04-22drm/radeon: properly lock disp in mc_stop/resume for evergreen+Alex Deucher1-4/+43
Need to wait for the new addresses to take affect before re-enabling the MC. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2013-04-22drm/radeon: update wait_for_vblank for evergreen+Alex Deucher1-8/+36
Properly wait for the next vblank region. The previous code didn't always wait long enough depending on the timing. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2013-04-15drm/radeon/evergreen+: don't enable HPD interrupts on eDP/LVDSAlex Deucher1-0/+10
Avoids potential interrupt storms when the display is disabled. May fix: https://bugzilla.kernel.org/show_bug.cgi?id=56041 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2013-04-11drm/radeon: handle broken disabled rb mask gracefullyAlex Deucher1-0/+8
If the disabled rb mask register is not properly initialized program a sane default based on the number of RBs for the asic. This avoids a potential divide by 0 when calculating the backend mask. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-04-09drm/radeon/kms: replace *REG32_PCIE_P with *REG32_PCIE_PORTAlex Deucher1-13/+13
Avoid confusion with the *REG32_P mask macro. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-04-09drm/radeon: add UVD tiling addr config v2Christian König1-0/+3
v2: set UVD tiling config for rv730 Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2013-04-09drm/radeon: add set_uvd_clocks callback for evergreenAlex Deucher1-0/+164
v2: remove unneeded register definitions Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-04-09drm/radeon: add set_uvd_clocks callback for ON/LN/TN (v4)Alex Deucher1-0/+47
v2: write clk registers only once! v3: update cg scratch register properly v4: add TN support Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-04-09drm/radeon: UVD bringup v8Christian König1-1/+39
Just everything needed to decode videos using UVD. v6: just all the bugfixes and support for R7xx-SI merged in one patch v7: UVD_CGC_GATE is a write only register, lockup detection fix v8: split out VRAM fallback changes, remove support for RV770, add support for HEMLOCK, add buffer sizes checks Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-03-07drm/radeon: skip MC reset as it's probably not hungAlex Deucher1-0/+6
The MC is mostly likely busy (e.g., display requests), not hung so no need to reset it. Doing an MC reset is tricky and not particularly reliable. Fixes hangs in certain cases. Reported-by: Josh Boyer <jwboyer@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-02-20drm/radeon: fix multi-head power profile stability on BTC+ asicsAlex Deucher1-0/+13
vddci needs to track mclk for multi-head. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2013-02-01drm/radeon: don't reset the MC on IGPs/APUsAlex Deucher1-2/+4
The MC isn't part of the GPU per se. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-02-01drm/radeon: use the reset mask to determine if rings are hungAlex Deucher1-19/+46
fetch the reset mask and check if the relevant ring flags are set to determine whether the ring is hung or not. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-02-01drm/radeon: halt engines before disabling MC (evergreen)Alex Deucher1-5/+7
It's better to halt the engines before we disable the MC. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-02-01drm/radeon: use status regs to determine what to reset (cayman)Alex Deucher1-1/+5
When we attempt the reset the GPU, look at the status registers to determine what blocks need to be reset. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-02-01drm/radeon: use status regs to determine what to reset (evergreen)Alex Deucher1-32/+132
When we attempt the reset the GPU, look at the status registers to determine what blocks need to be reset. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-02-01drm/radeon: rework GPU reset on cayman/TNAlex Deucher1-1/+1
Update the code to better match the recommended programming sequence for soft reset. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-02-01drm/radeon: rework GPU reset on evergreenAlex Deucher1-76/+85
Update the code to better match the recommended programming sequence for soft reset. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-02-01drm/radeon: add a bios scratch asic hung helperAlex Deucher1-0/+5
Used by all asic families from r600+. Flag for the vbios and later instances of the driver that the GPU is hung. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-02-01radeon/kms: cleanup async dma packet checkingJerome Glisse1-8/+8
This simplify and cleanup the async dma checking. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-01-31drm/radeon/evergreen+: wait for the MC to settle after MC blackoutAlex Deucher1-0/+2
Some chips seem to need a little delay after blacking out the MC before the requests actually stop. May fix: https://bugs.freedesktop.org/show_bug.cgi?id=56139 https://bugs.freedesktop.org/show_bug.cgi?id=57567 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2013-01-30drm/radeon: fix backend map setup on 1 RB sumo boardsAlex Deucher1-3/+14
Need to adjust the backend map depending on which RB is enabled. Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=892233 Reported-by: Mikko Tiihonen <mikko.tiihonen@iki.fi> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2013-01-28drm/radeon: fix MC blackout on evergreen+Christopher Staite1-0/+8
Force the crtc mem requests on/off immediately rather than waiting for the double buffered updates to kick in. Seems we miss the update in certain conditions. Also handle the DCE6 case. Signed-off-by: Christopher Staite <chris@yourdreamnet.co.uk> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2013-01-15drm/radeon: clear reset flags if engines are idleAlex Deucher1-0/+6
Fixes a hard lock in the gpu reset code after the rework for DMA support (0ecebb9e0d14e9948e0b1529883a776758117d6f "drm/radeon: switch to a finer grained reset for evergreen") due to not bailing before the MC shutdown if the relevant engines are idle. Discussion: http://lists.freedesktop.org/archives/dri-devel/2013-January/032985.html Reported-by: Eldad Zack <eldad@fogrefinery.com> Tested-by: Eldad Zack <eldad@fogrefinery.com> Acked-by: Paul Menzel <paulepanter@users.sourceforge.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-01-04drm/radeon: switch to a finer grained reset for evergreenAlex Deucher1-25/+55
No change in functionality as we currently set all the reset flags. Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-01-04drm/radeon: fix typo in evergreen dma fenceAlex Deucher1-1/+1
SRBM write packet takes DW aligned registers. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-01-03drm/radeon: reset dma engine on gpu reset (v2)Jerome Glisse1-9/+21
This try to reset the dma engine when performing gpu reset. Hopefully bringing back the gpu dma engine in sane state. v2: agd5f: fix dma reset on cayman/TN, add support for SI Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-01-03drm/radeon: print dma status reg on lockup (v2)Jerome Glisse1-0/+4
To help debug dma related lockup. v2: agd5f: update SI as well Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-12-17Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds1-7/+211
Pull DRM updates from Dave Airlie: "This is the one and only next pull for 3.8, we had a regression we found last week, so I was waiting for that to resolve itself, and I ended up with some Intel fixes on top as well. Highlights: - new driver: nvidia tegra 20/30/hdmi support - radeon: add support for previously unused DMA engines, more HDMI regs, eviction speeds ups and fixes - i915: HSW support enable, agp removal on GEN6, seqno wrapping - exynos: IPP subsystem support (image post proc), HDMI - nouveau: display class reworking, nv20->40 z compression - ttm: start of locking fixes, rcu usage for lookups, - core: documentation updates, docbook integration, monotonic clock usage, move from connector to object properties" * 'drm-next' of git://people.freedesktop.org/~airlied/linux: (590 commits) drm/exynos: add gsc ipp driver drm/exynos: add rotator ipp driver drm/exynos: add fimc ipp driver drm/exynos: add iommu support for ipp drm/exynos: add ipp subsystem drm/exynos: support device tree for fimd radeon: fix regression with eviction since evict caching changes drm/radeon: add more pedantic checks in the CP DMA checker drm/radeon: bump version for CS ioctl support for async DMA drm/radeon: enable the async DMA rings in the CS ioctl drm/radeon: add VM CS parser support for async DMA on cayman/TN/SI drm/radeon/kms: add evergreen/cayman CS parser for async DMA (v2) drm/radeon/kms: add 6xx/7xx CS parser for async DMA (v2) drm/radeon: fix htile buffer size computation for command stream checker drm/radeon: fix fence locking in the pageflip callback drm/radeon: make indirect register access concurrency-safe drm/radeon: add W|RREG32_IDX for MM_INDEX|DATA based mmio accesss drm/exynos: support extended screen coordinate of fimd drm/exynos: fix x, y coordinates for right bottom pixel drm/exynos: fix fb offset calculation for plane ...
2012-12-14Merge branch 'for-linus' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial Pull trivial branch from Jiri Kosina: "Usual stuff -- comment/printk typo fixes, documentation updates, dead code elimination." * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (39 commits) HOWTO: fix double words typo x86 mtrr: fix comment typo in mtrr_bp_init propagate name change to comments in kernel source doc: Update the name of profiling based on sysfs treewide: Fix typos in various drivers treewide: Fix typos in various Kconfig wireless: mwifiex: Fix typo in wireless/mwifiex driver messages: i2o: Fix typo in messages/i2o scripts/kernel-doc: check that non-void fcts describe their return value Kernel-doc: Convention: Use a "Return" section to describe return values radeon: Fix typo and copy/paste error in comments doc: Remove unnecessary declarations from Documentation/accounting/getdelays.c various: Fix spelling of "asynchronous" in comments. Fix misspellings of "whether" in comments. eisa: Fix spelling of "asynchronous". various: Fix spelling of "registered" in comments. doc: fix quite a few typos within Documentation target: iscsi: fix comment typos in target/iscsi drivers treewide: fix typo of "suport" in various comments and Kconfig treewide: fix typo of "suppport" in various comments ...
2012-12-12drm/radeon: fix amd afusion gpu setup aka sumo v2Jerome Glisse1-4/+4
Set the proper number of tile pipe that should be a multiple of pipe depending on the number of se engine. Fix: https://bugs.freedesktop.org/show_bug.cgi?id=56405 https://bugs.freedesktop.org/show_bug.cgi?id=56720 v2: Don't change sumo2 Signed-off-by: Jerome Glisse <jglisse@redhat.com> Cc: stable@vger.kernel.org Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2012-12-11drm/radeon/kms: Add initial support for async DMA on cayman/TNAlex Deucher1-1/+20
There are 2 async DMA engines on cayman, one at 0xd000 and one at 0xd800. The programming interface is the same as evergreen however there are some changes to the commands for using vmids. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-12-11drm/radeon/kms: Add initial support for async DMA on evergreenAlex Deucher1-3/+178
Pretty similar to 6xx/7xx except the count field increased in the packet header and the max IB size increased. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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