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path: root/drivers/gpu/drm/nouveau/nouveau_drv.h
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2011-11-30drm/nouveau: add dumb ioctl supportBen Skeggs1-0/+6
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nv40/pm: execute memory reset script from vbiosBen Skeggs1-0/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nouveau/dp: return master dp table pointer too when looking up encoderBen Skeggs1-2/+1
Will need to be able to distinguish 2.0/2.1 from 3.0 soon. Also, move the vbios parsing to nouveau_dp where it belongs. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nouveau/bios: simplify U/d table hash matching func to just matchBen Skeggs1-0/+1
The caller is now responsible for parsing its own lists (or whatever) of possible encoders. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nouveau/dp: restructure link training codeBen Skeggs1-1/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nouveau/dp: pass in required datarate to link trainingBen Skeggs1-1/+1
Not used currently, but it will be used in preference to pre-determined lane/bandwidth numbers at a later point. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nv50/backlight: take the sor into account when bashing regsBen Skeggs1-4/+4
I'm sure that out there somewhere, someone will need this. We currently haven't seen an example of LVDS being on a non-0 SOR so far though. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nouveau/dp: remove reliance on vbios for native displayportBen Skeggs1-0/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nouveau/dp: rewrite auxch transaction routinesBen Skeggs1-0/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nouveau: determine timing crystal freq from strapsBen Skeggs1-0/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nouveau/pm: Document and expose CL and WR for 0x1002CxRoy Spliet1-1/+6
Signed-off-by: Roy Spliet <r.spliet@student.tudelft.nl>
2011-09-20drm/nouveau/pm: add initial NV3x/NVCx memtiming support, improve other cardsRoy Spliet1-10/+35
NV30: Create framework for memtm NV50: Improve reg creation, NV50: Use P.version instead of card codename/stepping, NVC0: Initial memtiming code for Fermi, Renamed regs for consistency, Overall redesign to improve readability, Avoid kfree on null-pointer Signed-off-by: Roy Spliet <r.spliet@student.tudelft.nl>
2011-09-20drm/nvd0/disp: very initial evo setupBen Skeggs1-0/+5
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nouveau/bios: allow passing in crtc to the init table parserBen Skeggs1-4/+3
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nvd0/gpio: initial implementationBen Skeggs1-0/+2
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nouveau: allow modeset module option to select 'headless mode'Ben Skeggs1-0/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nouveau: make general drm modesetting init commonBen Skeggs1-1/+0
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nvd0: add a card_type for 0xdX chipsetsBen Skeggs1-0/+1
These are different enough from 0xcX to justify it, half fermi, half kepler(??).. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nouveau: embed nouveau_mmBen Skeggs1-1/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nouveau: rename nv40_mpeg to nv31_mpegBen Skeggs1-2/+2
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nvc0/pm: more complete parsing of clock domainsBen Skeggs1-3/+8
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nouveau: add function to wait until a callback returns trueBen Skeggs1-0/+4
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nva3/pm: parse/reclock vdec/41a0 clocksBen Skeggs1-0/+2
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nouveau/pm: add hooks to get/set *all* clocks at onceBen Skeggs1-0/+5
This is probably better than having to tell the common code about all the clocks that exist on every chipset. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nouveau/pm: some fermi chipsets still use volt 0x30Ben Skeggs1-0/+1
Fun, fun. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nouveau/pm: add support for parsing perflvl voltage on fermi chipsBen Skeggs1-1/+2
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nouveau/pm: store voltage in microvoltsBen Skeggs1-4/+4
Instead of 10s of millivolts, to match fermi vbios. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-07-25drm/nouveau: pass flag to engine fini() method on suspendBen Skeggs1-1/+1
It may not be necessary to fail in certain cases (such as failing to idle) on module unload, whereas on suspend it's important to ensure a consistent state can be restored on resume. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-07-25drm/nouveau: replace nv04_graph_fifo_access() use with direct reg bashingBen Skeggs1-1/+0
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nouveau/temp: Fix signed/unsigned int logicEmil Velikov1-3/+3
Many (all?) of the coefficients related to calculating the correct temperature are signed integers This patch correcly parses and stores those values It also ensures that the default offset is 0 (previously 1) Affected cards - the original nv50 and the nv40 family Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nouveau: rework vram init/fini ordering a littleBen Skeggs1-1/+3
Commit "drm/nouveau: add some debug output if nouveau_mm busy at destroy time" revealed an issue where vram mm takedown would actually fail due to there still being nodes present, causing nouveau to leak a small amount of memory on module unload. This splits TTM/nouveau_mm a bit more cleanly and ensures nouveau_mm fini isn't done until all gpuobjs are also destroyed. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nouveau: remove implicit mapping of every bo into chan_vmBen Skeggs1-1/+0
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nouveau: remove 'chan' argument from nouveau_bo_newBen Skeggs1-4/+3
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nvc0: explicitly map PDISP semaphore buffer into each channel's vmBen Skeggs1-0/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nv84-nvc0: explicitly map semaphore buffer into channel vmBen Skeggs1-0/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nv50-nvc0: explicitly map pushbuf bo into channel vmBen Skeggs1-0/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nv50-nvc0: explicitly map notifier bo into channel vmBen Skeggs1-0/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nouveau: initial changes to support multiple VMAs per buffer objectBen Skeggs1-0/+7
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nouveau: create temp vmas for both src and dst of bo movesBen Skeggs1-1/+1
Greatly simplifies a number of things, particularly once per-client GPU address spaces are involved. May add this back later once I know what things'll look like. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nouveau: store bo's page size in nouveau_boBen Skeggs1-0/+1
Was previously assuming a page size of 4KiB unless a VMA was present to override it. Eventually, a buffer won't necessarily have a VMA at all at some stages of its life, so we need to store this info elsewhere. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nouveau: will need to specify channel for vm-ful gpuobj allocationsBen Skeggs1-3/+6
Abuses existing gpuobj_new() chan argument for this, which in turn forces all NVOBJ_FLAG_VM allocations to be done from the global heap, not suballocated from the channel's private heap. Not a problem though in practise. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nouveau/gem: implement stub hooks for GEM object open/closeBen Skeggs1-0/+3
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nouveau: remove 'chan' argument from nouveau_gem_newBen Skeggs1-4/+3
Userspace hasn't passed us a channel_hint for a long long time now, and there isn't actually a need to do so anymore anyway. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nv50-nvc0/vm: take client reference on shared channel vmBen Skeggs1-0/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nouveau: store a per-client channel listBen Skeggs1-1/+3
Removes the need to disable IRQs to lookup channel struct on every pushbuf ioctl, among others. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nouveau: allocate structure to store per-client dataBen Skeggs1-1/+9
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nvc0/gr: import and use our own fuc by defaultBen Skeggs1-0/+1
The ability to use NVIDIA's fuc has been retained *temporarily* in order to better debug any issues that may be lingering in our initial attempt at writing this ucode. Once I'm fairly confident we're okay, it'll be removed. There's a number of things not implemented by this fuc currently, but most of it is sets of state that our context setup would not have used anyway. No doubt we'll find out what they're for at some point, and implement it if required. This has been tested on 0xc0/0xc4 thus far, and from what I could tell it worked as well as NVIDIA's. It's also been tested on 0xc1, but even with NVIDIA's fuc that chipset doesn't work correctly with nouveau yet. 0xc3/0xc8/0xce should in theory be supported too, but I don't have the hardware to check that. There's no doubt numerous bugs to squash yet, please report any! Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nvc0: fix suspend/resume of PGRAPH/PCOPYnBen Skeggs1-3/+4
We need the physical VRAM address in vinst, even for objects mapped into a vm, as the gpuobj suspend/resume code uses PMEM to access the object. Previously, vinst was overloaded to mean "VRAM address" for !VM objects, and "VM address" for VM objects, causing the wrong data to be accessed during suspend/resume. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nouveau: default to noaccel on 0xc1/0xc8/0xce for nowBen Skeggs1-0/+1
Until we know these should work properly, would much rather default to noaccel than risk giving people corruption/hangs out of the box.. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16drm/nva3/clk: better pll calculation when no fractional fb div availableBen Skeggs1-2/+2
The core/mem/shader clocks don't support the fractional feedback divider, causing our calculated clocks to be off by quite a lot in some cases. To solve this we will switch to a search-based algorithm when fN is NULL. For my NVA8 at PL3, this actually generates identical cooefficients to the binary driver. Hopefully that's a good sign, and that does not break VPLL calculation for someone.. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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