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path: root/drivers/gpu/drm/msm/edp/edp.xml.h
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2018-08-11drm/msm: update generated headersRob Clark1-13/+13
Resync generated headers to pull in a6xx registers. Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-06-16drm/msm: update generated headersRob Clark1-13/+13
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-11-28drm/msm: update generated headersRob Clark1-1/+1
Pull in a5xx registers. Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-03drm/msm: update generated headersRob Clark1-2/+3
Pull in additional regs needed for a430, etc. Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-10-22drm/msm: update generated headersRob Clark1-4/+4
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-16drm/msm: update generated headersRob Clark1-11/+11
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11drm/msm: update generated headersRob Clark1-7/+94
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-02-01drm/msm: update generated headersRob Clark1-0/+292
Resync from rnndb database, to pull in register defines for: * eDP * HDMI/HDCP * mdp4/mdp5 YUV support * mdp5 hw cursor support Signed-off-by: Rob Clark <robdclark@gmail.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-08-29 00:29:45 +0300