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path: root/drivers/gpu/drm/msm/adreno/a5xx.xml.h
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2024-04-22drm/msm: drop A5xx headerDmitry Baryshkov1-5572/+0
Now as the headers are generated during the build step, drop pre-generated copies of the Adreno A5xx header. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/585865/ Link: https://lore.kernel.org/r/20240401-fd-xml-shipped-v5-15-4bdb277a85a1@linaro.org
2024-02-26drm/msm/adreno: Update generated headersRob Clark1-296/+370
This updates the GPU headers to latest from mesa, using gen_header.py (which is used to generate headers at bulid time for mesa), rather than headergen2 (which doesn't have proper support for A6XX vs A7XX register variants). Mostly just uninteresting churn, but there are a couple spots in a7xx paths which update REG_A6XX_foo to REG_A7XX_foo for registers which are a7xx specific. Cc: Connor Abbott <cwabbott0@gmail.com> Signed-off-by: Rob Clark <robdclark@chromium.org> Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/574880/
2023-03-21drm/msm: Update generated headersRob Clark1-19/+25
It's been a bit overdue. Regen headers to pull in a2xx perfcntr updates, etc. Signed-off-by: Rob Clark <robdclark@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/527926/ Link: https://lore.kernel.org/r/20230320185416.938842-2-robdclark@gmail.com
2022-03-04drm/msm: Update generated headersRob Clark1-27/+36
Update headers from mesa commit: commit 7e63fa2bb13cf14b765ad06d046789ee1879b5ef Author: Rob Clark <robclark@freedesktop.org> AuthorDate: Wed Mar 2 17:11:10 2022 -0800 freedreno/registers: Add a couple regs we need for kernel Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15221> Signed-off-by: Rob Clark <robdclark@chromium.org> [for display bits:] Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Link: https://lore.kernel.org/r/20220304005317.776110-2-robdclark@gmail.com
2021-06-23drm/msm: Generated register updateRob Clark1-25/+70
Based on mesa commit daa2ccff7a0201941db3901780d179e2634057d5 Small bit of .c churn in the phy code to adapt to split up of phy related registers. Signed-off-by: Rob Clark <robdclark@chromium.org>
2021-01-31drm/msm/a5xx: Disable UCHE global filterKonrad Dybcio1-0/+2
Port over the command from downstream to prevent undefined behaviour. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-07-31drm/msm: sync generated headersRob Clark1-84/+319
We haven't sync'd for a while.. pull in updates to get definitions for some fields in pkt7 payloads. Signed-off-by: Rob Clark <robdclark@chromium.org> Acked-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-06-19drm/msm/adreno: Add A540 supportJeffrey Hugo1-13/+15
The A540 is a derivative of the A530, and is found in the MSM8998 SoC. Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2018-12-11drm/msm: update generated headersRob Clark1-5/+5
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-07drm/msm: update generated headersRob Clark1-4/+4
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-08-11drm/msm: update generated headersRob Clark1-38/+445
Resync generated headers to pull in a6xx registers. Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-06-16drm/msm: update generated headersRob Clark1-168/+1203
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-11-28drm/msm: update generated headersRob Clark1-0/+3757
Pull in a5xx registers. Signed-off-by: Rob Clark <robdclark@gmail.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-02-05 16:18:31 +0300