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path: root/drivers/gpu/drm/i915
AgeCommit message (Expand)AuthorFilesLines
2011-11-18drm/i915: Fix inconsistent backlight level during disabledTakashi Iwai1-1/+2
2011-11-18drm, i915: Fix memory leak in i915_gem_busy_ioctl().Rakib Mullick1-2/+4
2011-11-17drm/i915: Use DPCD value for max DP lanes.Keith Packard1-14/+9
2011-11-17drm/i915: Initiate DP link training only on the lanes we'll be usingKeith Packard1-2/+3
2011-11-17drm/i915: Remove trailing white spaceKeith Packard1-2/+2
2011-11-17drm/i915: Try harder during dp pattern 1 link trainingKeith Packard1-7/+18
2011-11-17drm/i915: Make DP prepare/commit consistent with DP dpmsKeith Packard1-9/+13
2011-11-17drm/i915: Let panel power sequencing hardware do its jobKeith Packard2-69/+85
2011-11-17drm/i915: Treat PCH eDP like DP in most placesKeith Packard2-34/+72
2011-11-17drm/i915: Remove link_status field from intel_dp structureKeith Packard1-29/+36
2011-11-17drm/i915: Move common PCH_PP_CONTROL setup to ironlake_get_pp_controlKeith Packard1-18/+19
2011-11-10drm/i915: Module parameters using '-1' as default must be signed typeKeith Packard2-4/+4
2011-11-08drm/i915: Turn on another required clock gating bit on gen6.Eric Anholt2-1/+7
2011-11-08drm/i915: Turn on a required 3D clock gating bit on Sandybridge.Eric Anholt2-0/+12
2011-11-04drm/i915: enable cacheable objects on IvybridgeJesse Barnes1-1/+1
2011-11-03drm/i915: add constants to size fence arrays and fieldsDaniel Vetter2-9/+10
2011-11-03drm/i915: Ivybridge still has fences!Daniel Vetter2-0/+3
2011-11-03drm/i915: forcewake warning fixes in debugfsBen Widawsky1-6/+51
2011-11-01drm/i915: Fix object refcount leak on mmappable size limit error path.Eric Anholt1-1/+1
2011-11-01drm/i915: Use mode_config.mutex in ironlake_panel_vdd_workKeith Packard1-2/+2
2011-10-28drm/i915: intel_choose_pipe_bpp_dither messages should be DRM_DEBUG_KMSAdam Jackson1-7/+7
2011-10-28drm/i915: only match on PCI_BASE_CLASS_DISPLAYDaniel Vetter1-1/+1
2011-10-28drm/i915: disable temporal dithering on the internal panelDaniel Vetter1-1/+1
2011-10-21drm/i915/dp: Fix eDP on PCH DP on CPT/PPTAdam Jackson1-6/+6
2011-10-21drm/i915/dp: Introduce is_cpu_edp()Adam Jackson1-2/+13
2011-10-21drm/i915: use correct SPD type valueJesse Barnes1-1/+1
2011-10-21drm/i915: fix ILK+ infoframe supportJesse Barnes1-7/+11
2011-10-21drm/i915: add DP test request handlingJesse Barnes1-0/+37
2011-10-21drm/i915: read full receiver capability field during DP hot plugJesse Barnes1-2/+2
2011-10-21drm/i915/dp: Remove eDP special cases from bandwidth checksAdam Jackson1-18/+2
2011-10-21drm/i915/dp: Fix the math in intel_dp_link_requiredAdam Jackson1-5/+21
2011-10-21drm/i915/panel: Always record the backlight level again (but cleverly)Takashi Iwai1-8/+13
2011-10-21i915: Move i915_read/write out of lineAndi Kleen2-19/+43
2011-10-21drm/i915: remove transcoder PLL mashing from mode_set per specsJesse Barnes1-25/+0
2011-10-21drm/i915: if transcoder disable fails, say whichJesse Barnes1-1/+1
2011-10-21drm/i915: set watermarks for third pipe on IVBJesse Barnes2-0/+15
2011-10-21drm/i915: export a CPT mode set verification functionJesse Barnes3-0/+32
2011-10-21drm/i915: fix transcoder PLL select maskingJesse Barnes1-5/+10
2011-10-21drm/i915: fix IVB cursor supportJesse Barnes2-5/+43
2011-10-21drm/i915: fix debug output for 3 pipe configsJesse Barnes1-1/+1
2011-10-21drm/i915: add PLL sharing support to handle 3 pipesJesse Barnes2-38/+63
2011-10-21drm/i915: fix PCH PLL assertion check for 3 pipesJesse Barnes1-0/+13
2011-10-21drm/i915: use transcoder select bits on VGA and HDMI on CPTJesse Barnes2-17/+11
2011-10-21drm/i915: split refclk code out of ironlake_crtc_mode_setJesse Barnes1-4/+35
2011-10-21drm/i915: support 3 pipes on IVB+Jesse Barnes7-9/+20
2011-10-21drm/i915: PLL macro cleanup and pipe assertion checkJesse Barnes2-3/+9
2011-10-21drm/i915: always set FDI composite sync bitJesse Barnes2-0/+3
2011-10-21drm/i915: Use PIPE_CONTROL for flushing on gen6+.Jesse Barnes2-12/+130
2011-10-21drm/i915: Rename PIPE_CONTROL bit defines to be less terse.Kenneth Graunke2-10/+12
2011-10-21drm/i915: Remove implied length of 2 from GFX_OP_PIPE_CONTROL #define.Kenneth Graunke2-5/+5
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