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path: root/drivers/gpu/drm/i915/intel_pm.c
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2013-07-19Merge tag 'drm-intel-next-2013-07-12' of git://people.freedesktop.org/~danvet...Dave Airlie1-59/+51
2013-07-11drm/i915: kill dev_priv->rps.lockDaniel Vetter1-8/+8
2013-07-10Partially revert "drm/i915: unconditionally use mt forcewake on hsw/ivb"Guenter Roeck1-1/+30
2013-07-09drm/i915: Getter/setter for object attributesBen Widawsky1-4/+4
2013-07-06drm/i915: less magic for stolen preallocated objects w/o gtt offsetDaniel Vetter1-1/+1
2013-07-02drm/i915: Use wait_for() to wait for Punit to change GPU freq on VLVVille Syrjälä1-9/+2
2013-07-01drm/i915: Move fbc members out of lineBen Widawsky1-25/+26
2013-07-01drm/i915: Fix a couple of "should it be static?" sparse warningsDamien Lespiau1-2/+3
2013-07-01drm/i915: Fix reason for per-chip disabling of FBCDamien Lespiau1-8/+6
2013-07-01drm/i915: Make intel_enable_fbc() staticDamien Lespiau1-1/+1
2013-07-01drm/i915: invert the verbosity of intel_enable_fbcPaulo Zanoni1-2/+1
2013-07-01drm/i915: Don't increase the GPU frequency from the delayed VLV rps timerVille Syrjälä1-1/+2
2013-07-01drm/i915: GEN6_RP_INTERRUPT_LIMITS doesn't seem to exist on VLVVille Syrjälä1-6/+2
2013-07-01drm/i915: Don't wait for Punit after each freq change on VLVVille Syrjälä1-18/+35
2013-07-01drm/i915: Clean up VLV rps code a bitVille Syrjälä1-20/+30
2013-07-01drm/i915: Remove duplicated WaForceL3Serialization:vlvVille Syrjälä1-4/+0
2013-06-13drm/i915: Try harder to disable trickle feed on VLVVille Syrjälä1-1/+1
2013-06-07drm/i915: WA: FBC Render Nuke.Rodrigo Vivi1-1/+1
2013-06-07drm/i915: Refactor ctg+ trickle feed disableVille Syrjälä1-43/+19
2013-06-07drm/i915: Disable trickle feed in ironlake_init_clock_gating()Ville Syrjälä1-0/+8
2013-06-07drm/i915: Disable trickle feed via MI_ARB_STATE for the gen4Ville Syrjälä1-0/+4
2013-06-07drm/i915: Disable primary plane trickle feed for g4xVille Syrjälä1-0/+9
2013-06-06i915/drm: Add private api for power well usageWang Xingchao1-7/+74
2013-06-06drm/i915: update FBC maximum fb sizesPaulo Zanoni1-3/+12
2013-06-05drm/i915: Fix DSPCLK_GATE_D for VLVVille Syrjälä1-1/+1
2013-06-05drm/i915: VLV doesn't have the ILK+ style LP watermark registersVille Syrjälä1-4/+0
2013-06-04drm/i915: store adjusted dotclock in adjusted_mode->clockDaniel Vetter1-4/+1
2013-05-31drm/i915: make PM interrupt writes non-destructiveBen Widawsky1-6/+7
2013-05-31drm/i915: Add PM regs to pre/post installBen Widawsky1-1/+3
2013-05-31drm/i915: add support for 5/6 data buffer partitioning on HaswellPaulo Zanoni1-11/+53
2013-05-31drm/i915: properly set HSW WM_LP watermarksPaulo Zanoni1-18/+161
2013-05-31drm/i915: properly set HSW WM_PIPE registersPaulo Zanoni1-18/+324
2013-05-31drm/i915: add haswell_update_sprite_wmPaulo Zanoni1-1/+22
2013-05-31drm/i915: add "enable" argument to intel_update_sprite_watermarksPaulo Zanoni1-3/+8
2013-05-24drm/i915: change VLV IOSF sideband accessors to not return error codeJani Nikula1-11/+7
2013-05-24drm/i915: rename VLV IOSF sideband functions logicallyJani Nikula1-8/+8
2013-05-24drm/i915: group sideband register accessors to a new fileJani Nikula1-60/+0
2013-05-23drm/i915: set FORCE_ARB_IDLE_PLANES workaroundPaulo Zanoni1-8/+3
2013-05-21drm/i915: MCH_SSKPD is a 64 bit register on HaswellPaulo Zanoni1-1/+1
2013-05-21drm/i915: set the IPS linetime watermarkPaulo Zanoni1-15/+7
2013-05-21drm/i915: fix haswell linetime watermarks calculationPaulo Zanoni1-1/+1
2013-05-21drm/i915: use the mode->htotal to calculate linetime watermarksPaulo Zanoni1-1/+1
2013-05-21drm/i915: remove intel_update_linetime_watermarksPaulo Zanoni1-13/+30
2013-05-21Merge tag 'v3.10-rc2' into drm-intel-next-queuedDaniel Vetter1-23/+23
2013-05-10drm/i915: implement WADPOClockGatingDisable for LPTPaulo Zanoni1-0/+5
2013-05-10drm/i915: Add missing platform tags to FBC workaround commentsDamien Lespiau1-6/+6
2013-05-10drm/i915: HSW FBC WaFbcDisableDpfcClockGatingRodrigo Vivi1-0/+10
2013-05-10drm/i915: HSW FBC WaFbcAsynchFlipDisableFbcQueueRodrigo Vivi1-0/+4
2013-05-10drm/i915: Enable FBC at Haswell.Rodrigo Vivi1-9/+12
2013-05-10drm/i915: IVB FBC WaFbcDisableDpfcClockGatingRodrigo Vivi1-0/+11
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