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path: root/drivers/gpu/drm/i915/intel_dpll_mgr.c
AgeCommit message (Expand)AuthorFilesLines
2016-07-07drm/i915: s/INTEL_OUTPUT_DISPLAYPORT/INTEL_OUTPUT_DP/Ville Syrjälä1-3/+3
2016-07-05drm/i915: Convert dev_priv->dev backpointers to dev_priv->drmChris Wilson1-1/+1
2016-07-04drm/i915: Mass convert dev->dev_private to to_i915(dev)Chris Wilson1-6/+6
2016-06-30drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()Chris Wilson1-1/+5
2016-06-28drm/i915/bxt: Avoid early timeout during PLL enableImre Deak1-2/+2
2016-05-30drm/i915: Use crtc->name in debug messagesVille Syrjälä1-8/+8
2016-05-26drm/i915: Fix NULL pointer deference when out of PLLs in IVBAnder Conselvan de Oliveira1-0/+3
2016-05-23drm/i915: Unify SKL cdclk init pathsVille Syrjälä1-9/+2
2016-05-23drm/i915: Keep track of preferred cdclk vco frequency on SKLVille Syrjälä1-0/+5
2016-05-23drm/i915: Actually read out DPLL0 vco on skl from hardwareVille Syrjälä1-6/+0
2016-05-23drm/i915: Move the SKL DPLL0 VCO computation into intel_dp_compute_config()Ville Syrjälä1-4/+0
2016-05-23drm/i915/skl: SKL CDCLK change on modeset tracking VCOClint Taylor1-4/+5
2016-05-13drm/i915: Remove intel_clock_t typedefAnder Conselvan de Oliveira1-1/+1
2016-05-12drm/i915: s/DPPL/DPLL/ for SKL DPLLsVille Syrjälä1-3/+3
2016-04-15drm/i915/bxt: PORT_PLL_REF_SEL bit should be set for all BXT variationsDongwon Kim1-10/+2
2016-04-15drm/i915/bxt: Don't toggle power well 1 on-demandImre Deak1-4/+1
2016-04-15drm/i915/bxt: Pass drm_i915_private to DDI PHY, CDCLK helpersImre Deak1-2/+2
2016-04-11drm/i915/bxt: Reversed polarity of PORT_PLL_REF_SEL bitDongwon Kim1-1/+9
2016-04-07drm/i915: Do not use {HAS_*, IS_*, INTEL_INFO}(dev_priv->dev)Joonas Lahtinen1-1/+1
2016-03-31drm/i915: Add locking to pll updates, v3.Maarten Lankhorst1-6/+19
2016-03-17drm/i915: fix sparse warning for using false as NULLJani Nikula1-1/+1
2016-03-17drm/i915: Move pll power state to crtc power domains.Maarten Lankhorst1-4/+0
2016-03-17drm/i915: Perform dpll commit first, v2.Maarten Lankhorst1-1/+1
2016-03-17drm/i915: Use a crtc mask instead of a refcount for dpll functions, v2.Maarten Lankhorst1-16/+19
2016-03-16drm/i915/bxt: Fix off-by-one error in Broxton PLL IDsImre Deak1-4/+4
2016-03-09drm/i915: Make SKL/KBL DPLL0 managed by the shared dpll codeAnder Conselvan de Oliveira1-27/+97
2016-03-09drm/i915: Manage HSW/BDW LCPLLs with the shared dpll interfaceAnder Conselvan de Oliveira1-18/+72
2016-03-09drm/i915: Move BXT pll configuration logic to intel_dpll_mgr.cAnder Conselvan de Oliveira1-6/+133
2016-03-09drm/i915: Move SKL/KLB pll selection logic to intel_dpll_mgr.cAnder Conselvan de Oliveira1-2/+305
2016-03-09drm/i915: Move HSW/BDW pll selection logic to intel_dpll_mgr.cAnder Conselvan de Oliveira1-12/+283
2016-03-09drm/i915: Refactor platform specifics out of intel_get_shared_dpll()Ander Conselvan de Oliveira1-84/+142
2016-03-09drm/i915: Use a table to initilize shared dpllsAnder Conselvan de Oliveira1-103/+86
2016-03-09drm/i915: Store a direct pointer to shared dpll in intel_crtc_stateAnder Conselvan de Oliveira1-11/+40
2016-03-09drm/i915: Split intel_get_shared_dpll() into smaller functionsAnder Conselvan de Oliveira1-35/+74
2016-03-09drm/i915: Move ddi shared dpll code to intel_dpll_mgr.cAnder Conselvan de Oliveira1-0/+472
2016-03-09drm/i915: Move shared dpll code to a new fileAnder Conselvan de Oliveira1-0/+368
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