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path: root/drivers/gpu/drm/i915/intel_dp.c
AgeCommit message (Expand)AuthorFilesLines
2010-12-08drm/i915/dp: Fix I2C/EDID handling with active DisplayPort to DVI converterDavid Flynn1-7/+30
2010-12-08drm/i915/dp: Only apply the workaround if the select is still activeChris Wilson1-2/+6
2010-12-03drm/i915: Apply a workaround for transitioning from DP on pipe B to HDMI.Eric Anholt1-0/+21
2010-11-30Revert "drm/i915/dp: use VBT provided eDP params if available"Chris Wilson1-89/+57
2010-10-27drm/i915: Fix typo from "Enable DisplayPort Audio"Takashi Iwai1-1/+1
2010-10-19drm/i915/dp: Add 'force_audio' propertyChris Wilson1-5/+69
2010-10-19drm/i915: Enable DisplayPort audioZhenyu Wang1-21/+41
2010-10-19drm/i915/dp: down the DP link even if the reg indicates it's already downJesse Barnes1-10/+6
2010-10-08drm/i915/dp: make eDP PLL functions work as advertisedJesse Barnes1-2/+4
2010-10-08drm/i915/dp: don't bother with DP PLL for PCH attached eDPJesse Barnes1-1/+1
2010-10-08drm/i915/dp: use VBT provided eDP params if availableJesse Barnes1-57/+89
2010-10-08drm/i915/dp: cache eDP DPCD dataJesse Barnes1-0/+20
2010-10-08drm/i915/dp: eDP power sequencing fixesJesse Barnes1-45/+32
2010-10-08drm/i915: remove broken intel_pch_has_edp functionJesse Barnes1-19/+0
2010-10-08drm/i915: add eDP checking functions for the display codeJesse Barnes1-0/+19
2010-10-08drm/i915/dp: correct eDP lane count and bppJesse Barnes1-2/+4
2010-10-08drm/i915/dp: remove redundant is_pch_edp checksJesse Barnes1-20/+16
2010-10-08drm/i915/dp: convert eDP checks to functions and documentJesse Barnes1-35/+57
2010-10-04drm/i915: mark display port DPMS state as 'ON' when enabling outputKeith Packard1-0/+1
2010-10-03Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson1-11/+12
2010-10-03drm/i915: vblank status not valid while training display portKeith Packard1-10/+9
2010-09-24drm/i915/dp: Wait for PP_CONTROL to take effect.Hette Visser1-0/+10
2010-09-24drm/i915: Parse the eDP link configuration from the vBIOSChris Wilson1-2/+2
2010-09-21Merge branch 'drm-intel-fixes' into HEADChris Wilson1-1/+1
2010-09-18drm/i915: use GMBUS to manage i2c linksChris Wilson1-2/+1
2010-09-14drm: Use a nondestructive mode for output detect when polling (v2)Chris Wilson1-2/+1
2010-09-13drm: Use a nondestructive mode for output detect when pollingChris Wilson1-1/+2
2010-09-12drm/i915/dp: Convert a udelay(17000) to a sleep during link-offChris Wilson1-3/+2
2010-09-11drm/i915: don't unlock panel regsJesse Barnes1-1/+1
2010-09-09drm/i915: Make the connector->encoder relationship explicitChris Wilson1-11/+12
2010-09-09drm/i915: Rename intel_encoder->enc to base for consistencyChris Wilson1-14/+14
2010-09-09drm/i915/dp: Flush the PLL register write before sleepingChris Wilson1-0/+1
2010-09-09drm/i915: make sure panel is sequenced off when starting a mode setJesse Barnes1-0/+1
2010-09-09drm/i915: make sure VDD AUX power has time to settleJesse Barnes1-0/+2
2010-09-09drm/i915: don't change VDD AUX status in panel power functionsJesse Barnes1-2/+2
2010-09-09drm/i915: split DP link training across panel power sequencingJesse Barnes1-56/+65
2010-09-09drm/i915: use VDD AUX for panel power around detection and in prepareJesse Barnes1-6/+29
2010-09-09drm/i915: use 125MHz reference clock for PCH attached eDPJesse Barnes1-1/+4
2010-09-09drm/i915: fix eDP detectionJesse Barnes1-3/+12
2010-09-08drm/i915: Quieten sparse warnings for missing prototypes.Chris Wilson1-1/+1
2010-09-08drm/i915: Drop the msleep parameter to wait_for()Chris Wilson1-2/+2
2010-09-08drm/i915: unload: fix intel dp encoder cleanupDaniel Vetter1-1/+10
2010-09-07drm/i915/dp: Really try 5 times before giving up.Chris Wilson1-30/+28
2010-08-22drm/i915: wait for actual vblank, not just 20msJesse Barnes1-1/+2
2010-08-19drm/i915: make sure eDP PLL is enabled at the right timeJesse Barnes1-2/+58
2010-08-19drm/i915: eDP mode set sequence correctionsJesse Barnes1-9/+8
2010-08-18drm/i915: add panel reset workaroundJesse Barnes1-1/+16
2010-08-09drm/i915: Ensure that while(INREG()) are bounded (v2)Chris Wilson1-16/+9
2010-08-09drm/i915: Enable aspect/centering panel fitting for Ironlake.Chris Wilson1-15/+5
2010-08-09drm/i915: Subclass intel_encoder.Chris Wilson1-249/+213
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