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path: root/drivers/gpu/drm/i915/intel_display.c
AgeCommit message (Expand)AuthorFilesLines
2010-12-15drm/i915: Wait for vblank before unpinning old fbChris Wilson1-1/+3
2010-12-14drm/i915: Pass clock limits down to PLL matcherChris Wilson1-18/+16
2010-12-09drm/i915: Enable RC6 autodownclocking on SandybridgeChris Wilson1-0/+89
2010-12-09drm/i915: Re-arm the idle timers if the device is still busyChris Wilson1-2/+16
2010-12-08drm/i915: Disable renderctx powersaving support for IronlakeChris Wilson1-1/+1
2010-12-06drm/i915: Uncouple render/power ctx before suspendingChris Wilson1-24/+31
2010-12-06drm/i915: Power Context register is only available for gen4 mobilesChris Wilson1-1/+1
2010-12-05Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson1-13/+59
2010-12-05drm/i915: Enable self-refresh for IronlakeChris Wilson1-1/+1
2010-12-05drm/i915: Implement GPU semaphores for inter-ring synchronisation on SNBChris Wilson1-2/+2
2010-12-05drm/i915: Re-enable RC6 for power-savings.Chris Wilson1-1/+0
2010-12-05drm/i915: Enable CB tuning of the Display PLLChris Wilson1-1/+16
2010-12-05drm/i915: Explain why we need to write DPLL twiceChris Wilson1-5/+5
2010-12-04drm/i915: Factor in pixel-repeat in FDI M/N calculationChris Wilson1-0/+3
2010-12-04drm/i915: Death to the unnecessary 64bit divideChris Wilson1-13/+5
2010-12-03drm/i915: Clean conflicting modesetting registers upon initChris Wilson1-0/+51
2010-12-03Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson1-2/+9
2010-12-03drm/i915: Always set the DP transcoder config to 8BPC.Eric Anholt1-1/+3
2010-12-02drm/i915: Pipelined fencing [infrastructure]Chris Wilson1-1/+16
2010-11-29drm/i915: Clear pfit registers when not used by any outputsChris Wilson1-1/+6
2010-11-23drm/i915: Thread the pipelining ring through the callers.Chris Wilson1-3/+3
2010-11-23drm/i915: Use drm_i915_gem_object as the preferred typeChris Wilson1-133/+109
2010-11-22drm/i915: Capture interesting display registers on errorChris Wilson1-0/+110
2010-11-15Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson1-0/+12
2010-11-13drm/i915: Retire any pending operations on the old scanout when switchingChris Wilson1-0/+12
2010-11-11drm/i915: Remove the definitions for Primary Ring BufferChris Wilson1-5/+5
2010-11-10drm/i915: Unconditionally get the fence reg when pinning scanoutChris Wilson1-2/+1
2010-11-08drm/i915: Apply display workaround required according to the B-Spec.Eric Anholt1-0/+4
2010-11-08drm/i915: Apply B-spec mandated workaround for read flushes on Ironlake.Eric Anholt1-0/+6
2010-11-04drm/i915: kill mappable/fenceable disdinctionDaniel Vetter1-4/+3
2010-11-04drm/i915: revert pageflip/mappable related abi breakageDaniel Vetter1-2/+1
2010-11-04Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson1-24/+37
2010-11-04drm/i915; Don't apply Ironlake FDI clock workaround to SandybridgeZhenyu Wang1-3/+4
2010-11-04drm/i915: Fix KMS regression on Sandybridge/CPTZhenyu Wang1-21/+33
2010-11-03drm/i915: Ensure that if we ever try to pin+fence it is mappable.Chris Wilson1-1/+2
2010-11-02Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson1-5/+4
2010-11-02drm/i915: Fix the graphics frequency clamping at init and when IPS is active.Jesse Barnes1-5/+4
2010-10-29drm/i915: Only enforce fence limits inside the GTT.Chris Wilson1-3/+4
2010-10-28drm/i915: range-restricted bind_to_gttDaniel Vetter1-3/+3
2010-10-28drm/i915: Propagate errors from writing to ringbufferChris Wilson1-22/+29
2010-10-21drm/i915: Fix current fb blocking for page flipChia-I Wu1-5/+8
2010-10-21drm/i915: IS_IRONLAKE is synonymous with gen == 5Chris Wilson1-4/+4
2010-10-19drm/i915: restore fixed FDI link rate on SandybridgeChris Wilson1-2/+5
2010-10-19Merge remote branch 'airlied/drm-core-next' into tmpChris Wilson1-2/+3
2010-10-19drm, kdb, kms: Change mode_set_base_atomic() enter argument to be an enumJason Wessel1-2/+3
2010-10-08drm/i915: diasable clock gating for the panel power sequencerJesse Barnes1-0/+7
2010-10-08drm/i915: don't program FDI RX/TX in mode_setJesse Barnes1-21/+0
2010-10-08drm/i915: fix ironlake CRTC enable/disableJesse Barnes1-4/+4
2010-10-08drm/i915: use DPLL_DVO_HIGH_SPEED for PCH eDPJesse Barnes1-1/+1
2010-10-08drm/i915: use 120MHz refclk in PCH eDP case tooJesse Barnes1-1/+2
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