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path: root/drivers/gpu/drm/i915/intel_cdclk.c
AgeCommit message (Expand)AuthorFilesLines
2019-01-17drm/i915/cdclk: switch to kernel typesJani Nikula1-20/+20
2019-01-14drm/i915: Markup paired operations on display power domainsChris Wilson1-4/+6
2018-12-13drm/i915: replace IS_GEN<N> with IS_GEN(..., N)Lucas De Marchi1-5/+5
2018-11-14drm/i915: add ICP support to cnp_rawclk() and kill icp_rawclk()Paulo Zanoni1-29/+8
2018-11-14drm/i915: rename CNP_RAWCLK_FRAC to CNP_RAWCLK_DENPaulo Zanoni1-3/+3
2018-11-14drm/i915/cnp+: update to the new RAWCLK_FREQ recommendationsPaulo Zanoni1-3/+3
2018-10-29drm/i915/glk: Remove 99% limitation.Rodrigo Vivi1-16/+2
2018-07-05drm/i915: Mark expected switch fall-throughsGustavo A. R. Silva1-0/+5
2018-06-16drm/i915/icl: implement DVFS for ICLPaulo Zanoni1-3/+43
2018-06-11drm/i915/skl: Add warn about unsupported CDCLK ratesImre Deak1-0/+10
2018-05-03drm/i915: Adjust eDP's logical vco in a reliable place.Rodrigo Vivi1-4/+37
2018-04-23drm/i915/audio: set minimum CD clock to twice the BCLKAbhay Kumar1-2/+14
2018-04-05Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jik...Linus Torvalds1-2/+2
2018-03-27treewide: Fix typos in printkMasanari Iida1-2/+2
2018-02-14drm/i915/vlv: Add cdclk workaround for DSIHans de Goede1-0/+8
2018-02-13drm/i915/icl: add the main CDCLK functionsPaulo Zanoni1-2/+235
2018-02-10drm/i915: Use INTEL_GEN everywhereTvrtko Ursulin1-1/+1
2018-02-06drm/i915/bxt, glk: Increase PCODE timeouts during CDCLK freq changingImre Deak1-5/+17
2018-02-01drm/i915/bxt, glk: Avoid long atomic poll during CDCLK changeImre Deak1-2/+2
2018-02-01drm/i915/bxt, glk: Increase PCODE timeouts during CDCLK freq changingImre Deak1-5/+17
2018-01-19drm/i915/icp: Get/set proper Raw clock frequency on ICPAnusha Srivatsa1-2/+27
2018-01-18drm/i915: Add tracking for CDCLK bypass frequencyImre Deak1-17/+18
2018-01-18BackMerge tag 'v4.15-rc8' into drm-nextDave Airlie1-9/+26
2018-01-04drm/i915: Apply Display WA #1183 on skl, kbl, and cflLucas De Marchi1-9/+26
2017-12-23drm/i915/vlv: Add cdclk workaround for DSIHans de Goede1-0/+8
2017-12-23drm/i915: Apply Display WA #1183 on skl, kbl, and cflLucas De Marchi1-9/+26
2017-11-30drm/i915: Make ips_enabled a property depending on whether IPS is enabled, v3.Maarten Lankhorst1-1/+1
2017-10-25drm/i915/cnl: Allow 2 pixel per clock on Cannonlake.Rodrigo Vivi1-12/+2
2017-10-25drm/i915: Perform a central cdclk state sanity checkVille Syrjälä1-11/+19
2017-10-25drm/i915: Sanity check cdclk in vlv_set_cdclk()Ville Syrjälä1-0/+12
2017-10-25drm/i915: Adjust system agent voltage on CNL if required by DDI portsVille Syrjälä1-1/+45
2017-10-25drm/i915: Use cdclk_state->voltage on CNLVille Syrjälä1-16/+31
2017-10-25drm/i915: Use cdclk_state->voltage on BXT/GLKVille Syrjälä1-2/+21
2017-10-25drm/i915: Use cdclk_state->voltage on SKL/KBL/CFLVille Syrjälä1-7/+36
2017-10-25drm/i915: Use cdclk_state->voltage on BDWVille Syrjälä1-6/+29
2017-10-25drm/i915: Use cdclk_state->voltage on VLV/CHVVille Syrjälä1-16/+38
2017-10-25drm/i915: Start tracking voltage level in the cdclk stateVille Syrjälä1-7/+24
2017-10-25drm/i915: Clean up some cdclk switch statementsVille Syrjälä1-34/+34
2017-10-11drm/i915: Move rps.hw_lock to dev_priv and s/hw_lock/pcu_lockSagar Arun Kamble1-20/+20
2017-09-12drm/i915: Increase poll time for BDW FCLK_DONEMarta Lofstedt1-1/+5
2017-08-31drm/i915: Consolidate max_cdclk_freq check in intel_crtc_compute_min_cdclk()Ville Syrjälä1-52/+44
2017-08-31drm/i915: Track minimum acceptable cdclk instead of "minimum dotclock"Ville Syrjälä1-98/+104
2017-06-29drm/i915: reintroduce VLV/CHV PFI programming power domain workaroundGabriel Krisman Bertazi1-0/+20
2017-06-12drm/i915/cnl: Allow dynamic cdclk changes on CNLRodrigo Vivi1-4/+56
2017-06-12drm/i915/cnl: Implement CNL display init/unit sequenceVille Syrjälä1-1/+107
2017-06-12drm/i915/cnl: Implement .set_cdclk() for CNLVille Syrjälä1-0/+106
2017-06-12drm/i915/cnl: Implement .get_display_clock_speed() for CNLVille Syrjälä1-1/+55
2017-06-02drm/i915/cnp: Get/set proper Raw clock frequency on CNP.Rodrigo Vivi1-1/+28
2017-05-05drm/i915: Fix rawclk readout for g4xVille Syrjälä1-4/+2
2017-04-06drm/i915/glk: limit pixel clock to 99% of cdclk workaroundMadhav Chauhan1-3/+13
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