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path: root/drivers/gpu/drm/i915/i915_reg.h
AgeCommit message (Expand)AuthorFilesLines
2014-01-24Revert "drm/i915: Mask reserved bits in display/sprite address registers"Daniel Vetter1-2/+0
2014-01-23drm/i915: VLV2 - Fix hotplug detect bitsTodd Previte1-3/+7
2014-01-22drm/i915: g4x/vlv: fix dp aux interrupt maskImre Deak1-1/+2
2014-01-10drm/i915/vlv: Add drpc debugfs support for valleyviewDeepak S1-0/+2
2013-12-17drm/i915: remove unused WM definesImre Deak1-36/+0
2013-12-17drm/i915: Add IVB DDB partitioning controlVille Syrjälä1-0/+2
2013-12-17drm/i915: Reorder/respace MI instruction definitionBen Widawsky1-26/+26
2013-12-13drm/i915/bdw: Implement ff workaroundsBen Widawsky1-0/+1
2013-12-13drm/i915/bdw: Force all Data Cache Data Port access to be Non-CoherentBen Widawsky1-0/+4
2013-12-12drm/i915: Use FLISDSI interface for band gap resetShobhit Kumar1-0/+1
2013-12-12drm/i915: Record BB_ADDR for every ringVille Syrjälä1-1/+2
2013-12-04drm/i915: Fix bogus FBC1 definesVille Syrjälä1-2/+2
2013-11-28drm/i915/vlv: use parallel context restore when coming out of RC6Jesse Barnes1-0/+1
2013-11-28drm/i915: Fix GT wake FIFO free entries for VLVVille Syrjälä1-1/+2
2013-11-28drm/i915: Report all GTFIFODBG errorsVille Syrjälä1-1/+4
2013-11-21drm/i915: Enable pipe gamma for spritesVille Syrjälä1-1/+1
2013-11-21drm/i915: Emit SRM after the MSG_FBC_REND_STATE LRIVille Syrjälä1-0/+1
2013-11-18drm/i915: dp aux irq support for g4x/vlvDaniel Vetter1-0/+4
2013-11-15Merge branch 'backlight-rework' into drm-intel-next-queuedDaniel Vetter1-2/+154
2013-11-11drm/i915/vlv: Make the vlv_dpio_read/vlv_dpio_write more PHY centricChon Ming Lee1-0/+3
2013-11-10Merge tag 'bdw-stage1-2013-11-08-v2' of git://people.freedesktop.org/~danvet/...Dave Airlie1-2/+121
2013-11-08drm/i915: Wire up cpu fifo underrun reporting support for bdwDaniel Vetter1-1/+1
2013-11-08drm/i915: Wire up port A aux channelDaniel Vetter1-1/+2
2013-11-08drm/i915: Fix up the bdw pipe interrupt enable listsDaniel Vetter1-5/+4
2013-11-08drm/i915: Optimize pipe irq handling on bdwDaniel Vetter1-4/+1
2013-11-08drm/i915/bdw: WaSingleSubspanDispatchOnAALinesAndPointsBen Widawsky1-0/+1
2013-11-08drm/i915/bdw: conservative SBE VUE cache modeBen Widawsky1-0/+2
2013-11-08drm/i915/bdw: Limit SDE poly depth FIFO to 2Ben Widawsky1-0/+1
2013-11-08drm/i915/bdw: Sampler power bypass disableBen Widawsky1-0/+1
2013-11-08ddrm/i915/bdw: Disable centroid pixel perf optimizationBen Widawsky1-0/+3
2013-11-08drm/i915/bdw: BWGTLB clock gate disableBen Widawsky1-0/+1
2013-11-08drm/i915/bdw: Implement edp PSR workaroundsBen Widawsky1-0/+6
2013-11-08drm/i915/bdw: Support eDP PSRBen Widawsky1-2/+2
2013-11-08drm/i915/bdw: Use The GT mailbox for IPS enable/disableBen Widawsky1-0/+1
2013-11-08drm/i915/bdw: Add Broadwell display FIFO limitsVille Syrjälä1-0/+1
2013-11-08drm/i915/bdw: add support for BDW DP voltage swings and pre-emphasisPaulo Zanoni1-0/+11
2013-11-08drm/i915/bdw: get the correct LCPLL frequency on BroadwellPaulo Zanoni1-0/+3
2013-11-08drm/i915/bdw: Broadwell has PIPEMISCPaulo Zanoni1-0/+12
2013-11-08drm/i915/bdw: Implement PPGTT enableBen Widawsky1-0/+3
2013-11-08drm/i915/bdw: Support BDW cachingBen Widawsky1-0/+1
2013-11-08drm/i915/bdw: dispatch updates (64b related)Ben Widawsky1-0/+1
2013-11-08drm/i915/bdw: Implement interrupt changesBen Widawsky1-0/+68
2013-11-08drm/i915/bdw: display stuffBen Widawsky1-0/+1
2013-11-08drm/i915/bdw: HW context supportBen Widawsky1-0/+3
2013-11-08drm/i915/bdw: Swizzling supportBen Widawsky1-0/+2
2013-11-08drm/i915/vlv: Rename VLV DPIO register to be more structure to match configdb...Chon Ming Lee1-101/+90
2013-11-06drm/i915/vlv: use per-pipe backlight controls v2Jesse Barnes1-0/+15
2013-11-05drm/i915/vlv: modeset_global_* for VLV v7Jesse Barnes1-0/+9
2013-11-05drm/i915: add bunit read/write routinesJesse Barnes1-0/+1
2013-11-05drm/i915/vlv: enable HDA display audio for Valleyview2Mengdong Lin1-0/+18
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