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path: root/drivers/gpu/drm/i915/i915_irq.c
AgeCommit message (Expand)AuthorFilesLines
2016-07-07drm/i915: Introduce Kabypoint PCH for Kabylake H/DT.Rodrigo Vivi1-2/+2
2016-07-06drm/i915: Group the irq breadcrumb variables into the same cachelineChris Wilson1-6/+6
2016-07-05drm/i915: Convert dev_priv->dev backpointers to dev_priv->drmChris Wilson1-18/+18
2016-07-05drm/i915: Clean up GPU hang messageChris Wilson1-15/+26
2016-07-05drm/i915: Replace lockless_dereference(bool) with READ_ONCE()Chris Wilson1-1/+1
2016-07-04drm/i915: Mass convert dev->dev_private to to_i915(dev)Chris Wilson1-46/+46
2016-07-04drm/i915: Flush the RPS bottom-half when the GPU idlesChris Wilson1-20/+12
2016-07-04drm/i915: Only start retire worker when idleChris Wilson1-12/+3
2016-07-01drm/i915: Remove debug noise on detecting fault-injection of missed interruptsChris Wilson1-3/+0
2016-07-01drm/i915: Move the get/put irq locking into the callerChris Wilson1-4/+4
2016-07-01drm/i915: Only apply one barrier after a breadcrumb interrupt is postedChris Wilson1-0/+1
2016-07-01drm/i915: Add a delay between interrupt and inspecting the final seqno (ilk)Chris Wilson1-7/+3
2016-07-01drm/i915: Use HWS for seqno tracking everywhereChris Wilson1-2/+2
2016-07-01drm/i915: Slaughter the thundering i915_wait_request herdChris Wilson1-11/+9
2016-07-01drm/i915: Separate GPU hang waitqueue from advanceChris Wilson1-15/+4
2016-07-01drm/i915: Make queueing the hangcheck work inlineChris Wilson1-17/+0
2016-07-01drm/i915: Remove the dedicated hangcheck workqueueChris Wilson1-3/+4
2016-07-01drm/i915: Delay queuing hangcheck to wait-requestChris Wilson1-6/+4
2016-06-06drm/i915: Fix a buch of kerneldoc warningsTvrtko Ursulin1-3/+4
2016-06-01drm/i915: Update GEN6_PMINTRMSK setup with GuC enabledSagar Arun Kamble1-13/+15
2016-05-25drm/i915: Revert async unpin and nonblocking atomic commitDaniel Vetter1-22/+98
2016-05-23drm/i915: Enable GSE interrupt on BDW+Ville Syrjälä1-0/+2
2016-05-19drm/i915: Remove cs based page flip support.Maarten Lankhorst1-98/+22
2016-05-19drm/i915: Unify unpin_work and mmio_work into flip_work, v2.Maarten Lankhorst1-7/+13
2016-05-19drm/i915: Remove intel_prepare_page_flip, v3.Maarten Lankhorst1-14/+4
2016-05-19drm/i915: Remove intel_finish_page_flip_plane.Maarten Lankhorst1-3/+3
2016-05-11drm/i915: Replace "INTEL_INFO->gen == x" checks with IS_GENxTvrtko Ursulin1-2/+2
2016-05-10drm/i915: Use drm_i915_private as the native pointer for intel_uncore.cChris Wilson1-3/+2
2016-05-09drm/i915: Store a i915 backpointer from engine, and use itChris Wilson1-42/+38
2016-05-09drm/i915: Small display interrupt handlers tidyTvrtko Ursulin1-206/+180
2016-04-20drm/i915/gen8+: Do not enable DPF interrupt since the handler does not existTvrtko Ursulin1-1/+3
2016-04-14drm/i915: Split gen8_gt_irq_handler into ack+handleVille Syrjälä1-32/+47
2016-04-14drm/i915: Eliminate passing dev+dev_priv to {snb,ilk}_gt_irq_handler()Ville Syrjälä1-15/+12
2016-04-14drm/i915: Move gt/pm irq handling out from irq disabled section on VLVVille Syrjälä1-5/+5
2016-04-14drm/i915: Split VLV/CVH PIPESTAT handling into ack+handlerVille Syrjälä1-4/+17
2016-04-14drm/i915: Split PORT_HOTPLUG_STAT ack out from i9xx_hpd_irq_handler()Ville Syrjälä1-17/+30
2016-04-14drm/i915: Move variables to narrower scope in VLV/CHV irq handlersVille Syrjälä1-2/+2
2016-04-14drm/i915: Eliminate loop from VLV irq handlerVille Syrjälä1-4/+3
2016-04-14drm/i915: Clear VLV_IER around irq processingVille Syrjälä1-1/+35
2016-04-14drm/i915: Clear VLV_MASTER_IER around irq processingVille Syrjälä1-6/+10
2016-04-14drm/i915: Clear VLV_IIR after PIPESTATVille Syrjälä1-15/+21
2016-04-14drm/i915: Set up VLV_MASTER_IER consistentlyVille Syrjälä1-0/+5
2016-04-14drm/i915: Use GEN8_MASTER_IRQ_CONTROL consistentlyVille Syrjälä1-3/+3
2016-04-14drm/i915: Tighten reset_counter for reset statusChris Wilson1-19/+2
2016-04-14drm/i915: Hide the atomic_read(reset_counter) behind a helperChris Wilson1-1/+1
2016-04-12drm/i915: Move DPINVGTT setup to vlv_display_irq_reset()Ville Syrjälä1-10/+5
2016-04-12drm/i915: Warn if irq_mask isn't ~0 during vlv/cvh display irq postinstallVille Syrjälä1-0/+3
2016-04-12drm/i915: Use GEN5_IRQ_INIT() in vlv_display_irq_postinstall()Ville Syrjälä1-12/+8
2016-04-12drm/i915: Clear display interrupt before enabling when turning on the power wellVille Syrjälä1-8/+3
2016-04-12drm/i915: Move vlv/chv display irq code to a more logical placeVille Syrjälä1-51/+51
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