Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2017-10-16 | drm/i915: Refactor testing obj->mm.pages | Chris Wilson | 1 | -0/+1 |
2017-08-15 | drm/i915: Split obj->cache_coherent to track r/w | Chris Wilson | 1 | -1/+2 |
2017-07-27 | drm/i915: Force CPU synchronisation even if userspace requests ASYNC | Chris Wilson | 1 | -3/+4 |
2017-06-16 | drm/i915: Store i915_gem_object_is_coherent() as a bit next to cache-dirty | Chris Wilson | 1 | -1/+1 |
2017-06-16 | drm/i915: Mark CPU cache as dirty on every transition for CPU writes | Chris Wilson | 1 | -8/+7 |
2017-05-03 | drm/i915: Mark up clflushes as belonging to an unordered timeline | Chris Wilson | 1 | -7/+1 |
2017-03-23 | drm/i915: Wait for all fences before installing an exclusive clflush fence | Chris Wilson | 1 | -1/+1 |
2017-02-22 | drm/i915: Remove 'retire' parameter from intel_fb_obj_flush | Chris Wilson | 1 | -1/+1 |
2017-02-22 | drm/i915: Perform object clflushing asynchronously | Chris Wilson | 1 | -0/+189 |