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path: root/drivers/gpu/drm/i915/display
AgeCommit message (Expand)AuthorFilesLines
2023-04-26drm/i915: Fix fast wake AUX sync lenVille Syrjälä1-1/+1
2023-04-20drm/i915/dsi: fix DSS CTL register offsets for TGL+Jani Nikula1-4/+16
2023-04-13drm/i915: Split icl_color_commit_noarm() from skl_color_commit_noarm()Ville Syrjälä1-1/+20
2023-04-13drm/i915/dp_mst: Fix payload removal during output disablingImre Deak1-6/+10
2023-04-13drm/display/dp_mst: Handle old/new payload states in drm_dp_remove_payload()Imre Deak1-1/+3
2023-04-06drm/i915: Move CSC load back into .color_commit_arm() when PSR is enabled on ...Ville Syrjälä1-2/+21
2023-04-06drm/i915: Disable DC states for all commitsVille Syrjälä1-3/+25
2023-04-06drm/i915/dpt: Treat the DPT BO as a framebufferVille Syrjälä1-0/+2
2023-04-06drm/i915/tc: Fix the ICL PHY ownership check in TC-cold stateImre Deak1-2/+2
2023-03-30drm/i915: Preserve crtc_state->inherited during state clearingVille Syrjälä1-0/+1
2023-03-30drm/i915/fbdev: lock the fbdev obj before vma pinTejas Upadhyay1-6/+18
2023-03-30drm/i915: Print return value on errorNirmoy Das1-3/+3
2023-03-22drm/i915/dg2: Add HDMI pixel clock frequencies 267.30 and 319.89 MHzAnkit Nautiyal1-0/+62
2023-03-22drm/i915/psr: Use calculated io and fast wake linesJouni Högander2-17/+63
2023-03-17drm/i915: Populate encoder->devdata for DSI on icl+Ville Syrjälä2-4/+14
2023-03-17drm/i915: Do panel VBT init early if the VBT declares an explicit panel typeVille Syrjälä9-26/+61
2023-03-17drm/i915: Introduce intel_panel_init_alloc()Ville Syrjälä3-1/+9
2023-03-11drm/i915: Fix system suspend without fbdev being initializedImre Deak1-1/+7
2023-03-11drm/i915/dp_mst: Add the MST topology state for modesetted CRTCsImre Deak3-0/+69
2023-03-10drm/i915/quirks: Add inverted backlight quirk for HP 14-r206nvMavroudis Chatzilaridis1-0/+2
2023-02-14drm/i915: Fix VBT DSI DVO port handlingVille Syrjälä1-10/+23
2023-02-14drm/i915: Don't do the WM0->WM1 copy w/a if WM1 is already enabledVille Syrjälä1-1/+2
2023-02-09drm/i915/adlp: Fix typo for reference clockChaitanya Kumar Borah1-1/+1
2023-02-01drm/i915: Allow alternate fixed modes always for eDPVille Syrjälä1-3/+1
2023-02-01drm/i915: Allow panel fixed modes to have differing sync polaritiesVille Syrjälä1-3/+4
2023-01-24drm/i915/display: Check source height is > 0Drew Davenport1-1/+1
2023-01-12drm/i915/dsi: fix MIPI_BKLT_EN_1 native GPIO indexJani Nikula1-1/+1
2023-01-12drm/i915/dsi: add support for ICL+ native MIPI GPIO sequenceJani Nikula1-3/+91
2023-01-07drm/i915/dsi: fix VBT send packet port selection for dual link DSIMikko Kovanen1-2/+2
2022-12-31drm/i915/display: Don't disable DDI/Transcoder when setting phy test patternKhaled Almahallawy1-59/+0
2022-12-31drm/i915/bios: fix a memory leak in generate_lfp_data_ptrsXia Fukun1-1/+1
2022-11-29drm/i915: Remove non-existent pipes from bigjoiner pipe maskVille Syrjälä1-3/+7
2022-11-21drm/i915: Fix warn in intel_display_power_*_domain() functionsImre Deak1-4/+4
2022-11-07drm/i915/psr: Send update also on invalidateJouni Högander1-1/+4
2022-10-31drm/i915/sdvo: Grab mode_config.mutex during LVDS init to avoid WARNsVille Syrjälä1-0/+4
2022-10-31drm/i915: Simplify intel_panel_add_edid_alt_fixed_modes()Ville Syrjälä5-7/+6
2022-10-31drm/i915/sdvo: Setup DDC fully before output initVille Syrjälä1-19/+12
2022-10-31drm/i915/sdvo: Filter out invalid outputs more sensiblyVille Syrjälä1-5/+22
2022-10-31drm/i915/tgl+: Add locking around DKL PHY register accessesImre Deak6-76/+199
2022-10-24drm/i915/dp: Reset frl trained flag before restarting FRL trainingAnkit Nautiyal1-0/+2
2022-10-14Merge tag 'drm-intel-next-fixes-2022-10-13' of git://anongit.freedesktop.org/...Dave Airlie1-18/+44
2022-10-12Merge tag 'drm-intel-next-fixes-2022-10-06-1' of git://anongit.freedesktop.or...Dave Airlie4-34/+80
2022-10-11drm/i915/display: consider DG2_RC_CCS_CC when migrating buffersMatthew Auld1-1/+12
2022-10-10drm/i915/display: handle migration for dptMatthew Auld1-18/+33
2022-10-03drm/i915: Reject excessive dotclocks earlyVille Syrjälä1-0/+18
2022-10-03drm/i915: Fix watermark calculations for DG2 CCS+CC modifierVille Syrjälä1-2/+4
2022-10-03drm/i915: Fix watermark calculations for DG2 CCS modifiersVille Syrjälä1-2/+6
2022-10-03drm/i915: Fix watermark calculations for gen12+ CCS+CC modifierVille Syrjälä1-2/+4
2022-10-03drm/i915: Fix watermark calculations for gen12+ MC CCS modifierVille Syrjälä1-2/+4
2022-10-03drm/i915: Fix watermark calculations for gen12+ RC CCS modifierVille Syrjälä1-2/+4
generated by cgit v1.2.3 (git 2.39.0) at 2024-12-11 14:06:10 +0300