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path: root/drivers/gpu/drm/amd
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2019-09-18drm/atomic: Rename crtc_state->pageflip_flags to async_flipDaniel Vetter1-3/+2
It's the only flag anyone actually cares about. Plus if we're unlucky, the atomic ioctl might need a different flag for async flips. So better to abstract this away from the uapi a bit. Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Michel Dänzer <michel@daenzer.net> Cc: Alex Deucher <alexdeucher@gmail.com> Cc: Adam Jackson <ajax@redhat.com> Cc: Sean Paul <sean@poorly.run> Cc: David Airlie <airlied@linux.ie> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Cc: Maxime Ripard <maxime.ripard@bootlin.com> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Cc: Leo Li <sunpeng.li@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Cc: David Francis <David.Francis@amd.com> Cc: Mario Kleiner <mario.kleiner.de@gmail.com> Cc: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Cc: Ben Skeggs <bskeggs@redhat.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: Ilia Mirkin <imirkin@alum.mit.edu> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20190903190642.32588-3-daniel.vetter@ffwll.ch
2019-09-18drm/amdgpu: flag navi12 and 14 as experimental for 5.4Alex Deucher1-4/+4
We can remove this later as things get closer to launch. Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-17drm/amdgpu: add navi12 pci idTianci.Yin1-0/+3
Add Navi12 PCI id support. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Tianci.Yin <tianci.yin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-17drm/amdgpu: add navi14 PCI ID for work station SKUTianci.Yin1-0/+2
Add the navi14 PCI device id. Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Tianci.Yin <tianci.yin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-17drm/amdkfd: Swap trap temporary registers in gfx10 trap handlerJay Cornwall2-8/+8
ttmp[4:5] hold information useful to the debugger. Use ttmp[14:15] instead, aligning implementation with gfx9 trap handler. Signed-off-by: Jay Cornwall <jay.cornwall@amd.com> Reviewed-by: shaoyun liu <Shaoyun.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-17drm/amd/powerplay: implement sysfs for getting dpm clockPrike Liang2-0/+95
With the common interface print_clk_levels can get the following dpm clock: -pp_dpm_dcefclk -pp_dpm_fclk -pp_dpm_mclk -pp_dpm_sclk -pp_dpm_socclk Signed-off-by: Prike Liang <Prike.Liang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-17drm/amd/display: Restore backlight brightness after system resumeKai-Heng Feng1-0/+1
Laptops with AMD APU doesn't restore display backlight brightness after system resume. This issue started when DC was introduced. Let's use BL_CORE_SUSPENDRESUME so the backlight core calls update_status callback after system resume to restore the backlight level. Tested on Dell Inspiron 3180 (Stoney Ridge) and Dell Latitude 5495 (Raven Ridge). Cc: <stable@vger.kernel.org> Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-17drm/amd/display: Implement voltage limitation for daliBhawanpreet Lakha1-0/+4
[Why] we only want the lowest voltage to be available for dali. [How] Use the get_highest_allowed_voltage_level function to return 0 for dali Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-17drm/amd/display: add Asic ID for DaliBhawanpreet Lakha1-2/+5
Dali is a new asic revision based on raven2 Add the ID and ASICREV_IS_DALI define Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-17drm/amdgpu: Fix KFD-related kernel oops on HawaiiFelix Kuehling1-1/+2
Hawaii needs to flush caches explicitly, submitting an IB in a user VMID from kernel mode. There is no s_fence in this case. Fixes: eb3961a57424 ("drm/amdgpu: remove fence context from the job") Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-17drm/amd/amdgpu: power up sdma engine when S3 resume backPrike Liang3-5/+10
The sdma_v4 should be ungated when the IP resume back, otherwise it will hang up and resume time out error. Signed-off-by: Prike Liang <Prike.Liang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-17drm/amdgpu: Check for valid number of registers to readTrek1-0/+3
Do not try to allocate any amount of memory requested by the user. Instead limit it to 128 registers. Actually the longest series of consecutive allowed registers are 48, mmGB_TILE_MODE0-31 and mmGB_MACROTILE_MODE0-15 (0x2644-0x2673). Bug: https://bugs.freedesktop.org/show_bug.cgi?id=111273 Signed-off-by: Trek <trek00@inbox.ru> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-17drm/amd/display: Add missing HBM support and raise Vega20's uclk.Zhan Liu1-2/+16
[Why] When more than 2 displays are connected to the graphics card, only the minimum memory clock is needed. However, when more displays are connected, the minimum memory clock is not sufficient enough to support the overwhelming bandwidth. System will hang under this circumstance. Also, the old code didn't address HBM cards, which has 2 pseudo channels. We need to add the HBM part here. [How] When graphics card connects to 2 or more displays, switch to high memory clock. Also, choose memory multiplier based on whether its regular DRAM or HBM. Signed-off-by: Zhan Liu <zhan.liu@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-17drm/amd/display: dce11.x /dce12 update formula inputCharlene Liu5-13/+27
[Description] 1. OUTSTANDING_REQUEST_LIMIT update from 0xFF to 0x1F (HW doc update) 2. using memory type to convert UMC's MCLK to Yclk. Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-17drm/amdgpu: remove program of lbpw for renoirAaron Liu1-2/+0
These is no LBPW on Renoir. So removing program of lbpw for renoir. Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-17drm/amdgpu: Remove clock gating restore.Andrey Grodzovsky1-1/+9
Restoring clock gating break SMU opeartion afterwards, avoid this until this further invistigated with SMU. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-and-tested-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-17drm/amdgpu: Add smu lock around in pp_smu_i2c_bus_accessAndrey Grodzovsky1-1/+6
Protect from concurrent SMU accesses. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-and-tested-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-17drm/amd/display: update renoir_ip_offset.hAaron Liu1-1/+1
This patch updates MP1_BASE in renoir_ip_offset.h Signed-off-by: Aaron Liu <aaron.liu@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-17drm/amdgpu: disable stutter mode for renoirAaron Liu1-0/+2
With stutter mode enabled, NMI prints frequently. Disable stutter for the moment because NMI warning storm, and will enable it back till the issue is addressed Signed-off-by: Aaron Liu <aaron.liu@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-17drm/amd/display: Add stereo mux and dig programming calls for dcn21Roman Li2-5/+36
[Why] The earlier patch "Hook up calls to do stereo mux and dig programming..." doesn't include update for dcn21. [How] Align dcn21 gpio settings with updated stereo control interface. Signed-off-by: Roman Li <Roman.Li@amd.com> Acked-by: Aaron Liu <aaron.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-06Merge tag 'drm-next-5.4-2019-08-30' of ↵Dave Airlie98-139/+91412
git://people.freedesktop.org/~agd5f/linux into drm-next drm-next-5.4-2019-08-30: amdgpu: - Add DC support for Renoir - Add some GPUVM hw bug workarounds - add support for the smu11 i2c controller - GPU reset vram lost bug fixes - Navi1x powergating fixes - Navi12 power fixes - Renoir power fixes - Misc bug fixes and cleanups Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190830212650.5055-1-alexander.deucher@amd.com
2019-09-04kbuild: change *FLAGS_<basetarget>.o to take the path relative to $(obj)Masahiro Yamada4-18/+14
Kbuild provides per-file compiler flag addition/removal: CFLAGS_<basetarget>.o CFLAGS_REMOVE_<basetarget>.o AFLAGS_<basetarget>.o AFLAGS_REMOVE_<basetarget>.o CPPFLAGS_<basetarget>.lds HOSTCFLAGS_<basetarget>.o HOSTCXXFLAGS_<basetarget>.o The <basetarget> is the filename of the target with its directory and suffix stripped. This syntax comes into a trouble when two files with the same basename appear in one Makefile, for example: obj-y += foo.o obj-y += dir/foo.o CFLAGS_foo.o := <some-flags> Here, the <some-flags> applies to both foo.o and dir/foo.o The real world problem is: scripts/kconfig/util.c scripts/kconfig/lxdialog/util.c Both files are compiled into scripts/kconfig/mconf, but only the latter should be given with the ncurses flags. It is more sensible to use the relative path to the Makefile, like this: obj-y += foo.o CFLAGS_foo.o := <some-flags> obj-y += dir/foo.o CFLAGS_dir/foo.o := <other-flags> At first, I attempted to replace $(basetarget) with $*. The $* variable is replaced with the stem ('%') part in a pattern rule. This works with most of cases, but does not for explicit rules. For example, arch/ia64/lib/Makefile reuses rule_as_o_S in its own explicit rules, so $* will be empty, resulting in ignoring the per-file AFLAGS. I introduced a new variable, target-stem, which can be used also from explicit rules. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Marc Zyngier <maz@kernel.org>
2019-08-30drm/amdgpu: Move null pointer dereference checkAustin Kim1-2/+3
Null pointer dereference check should have been checked, ahead of below routine. struct amdgpu_device *adev = hwmgr->adev; With this commit, it could avoid potential NULL dereference. Signed-off-by: Austin Kim <austindh.kim@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-30drm/amdgpu: Fix undefined dm_ip_block for navi12Petr Cvek1-0/+2
There is missing "if defined" CONFIG_DRM_AMD_DC block for non DC configurations. This will cause link error. The patch is fixing that. Bug: https://bugs.freedesktop.org/show_bug.cgi?id=110979 Signed-off-by: Petr Cvek <petrcvekcz@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-30drm/amdgpu: fix no interrupt issue for renoir emu (v2)Aaron Liu1-8/+10
In renoir's vega10_ih model, there's a security change in mmIH_CHICKEN register, that limits IH to use physical address (FBPA, GPA) directly. Those chicken bits need to be programmed first. Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-30drm/amdgpu: update IH_CHICKEN in oss 4.0 IP header for VG/RV seriesAaron Liu1-0/+4
In Renoir's emulator, those chicken bits need to be programmed. Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-30drm/amd/powerplay: SMU_MSG_OverridePcieParameters is unsupport for APUAaron Liu1-0/+3
For apu, SMU_MSG_OverridePcieParameters is unsupport. So return directly in smu_override_pcie_parameters function. Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-30drm/amdgpu: Handle job is NULL use case in amdgpu_device_gpu_recoverAndrey Grodzovsky1-6/+4
This should be checked at all places job is accessed. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amdgpu: Enable DC on RenoirRoman Li2-0/+9
Enable DC support for renoir. Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Roman Li <Roman.Li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amd/display: Add DCN2.1 changes to DMLRoman Li2-0/+23
Hook up the DML changes for renoir. Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Roman Li <Roman.Li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amd/display: Correct order of RV family clk managers for RenoirRoman Li1-6/+6
Need to check for renoir first. Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Roman Li <Roman.Li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amd/display: add Renoir to kconfigBhawanpreet Lakha1-0/+8
Add a kconfig option to enable renoir. Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amd/display: build dcn21 blocksBhawanpreet Lakha1-0/+3
Enable the building of dcn21 support. Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amd/display: add dcn21 core DC changesBhawanpreet Lakha4-0/+11
Add missing parameters, to make dcn21 compile without errors Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amd/display: add dal_asic_id for renoirBhawanpreet Lakha1-0/+5
Add the rev id for renoir. Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amd/display: call update_bw_bounding_boxBhawanpreet Lakha2-0/+10
call update_bw_bounding_box in DC construct Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amd/display: Handle Renoir in amdgpu_dm (v2)Bhawanpreet Lakha1-0/+14
Hook up renoir support to KMS. v2: squash in "Fixes for Renoir in amdgpu_dm" Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amd/display: Handle Renoir in DCBhawanpreet Lakha3-0/+20
add Renoir DCN version in DC and handle it Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amd/display: Fix register namesBhawanpreet Lakha1-2/+2
rename VM_CONTEXT0 to MMVM_CONTEXT0 as that is the name defined in the register files Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amd/display: Add Renoir DMLBhawanpreet Lakha6-0/+8058
DML provides the display configuration validation as provided by the hw teams. Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amd/display: Add Renoir GPIOBhawanpreet Lakha7-0/+687
Misc display related configuration details. Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amd/display: Add Renoir resource (v2)Bhawanpreet Lakha3-1/+1726
Manages the renoir display resources (crtcs, phys, plls, etc.). v2: rebase (Alex) Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amd/display: Add Renoir clock managerBhawanpreet Lakha7-0/+1013
Controls display clocks and interfaces with powerplay for clock and power requirements. Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amd/display: Add Renoir Hubbub (v2)Bhawanpreet Lakha3-1/+728
Controls the display hw's interface to memory. v2: rebase (Alex) Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amd/display: Add Renoir hubbub registers listBhawanpreet Lakha3-0/+118
These are the registers used to program the hubbub hw. Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amd/display: Add hubp block for Renoir (v2)Bhawanpreet Lakha3-0/+387
This provides the interface to memory for the display hw. v2: minor cleanup (Alex) Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amd/display: Add Renoir irq_services (v2)Bhawanpreet Lakha3-0/+418
Provides the interface to configure display interrrupts on renoir. v2: rebase fix (Alex) Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amd/display: Add pp_smu functions for RenoirBhawanpreet Lakha1-0/+47
This defines the interface for communicating requirements between DC and powerplay. Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amd/display: Add Renoir hw_seq register listBhawanpreet Lakha1-0/+97
These are the registers used to for the hw sequences for modesetting. Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amd/display: Add Renoir clock registers listBhawanpreet Lakha1-0/+17
These are the registers used to program the clock hw. Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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