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path: root/drivers/gpu/drm/amd/include
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2024-07-03drm/amdgpu/atomfirmware: silence UBSAN warningAlex Deucher1-1/+1
This is a variable sized array. Link: https://lists.freedesktop.org/archives/amd-gfx/2024-June/110420.html Tested-by: Jeff Layton <jlayton@kernel.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2024-06-05drm/amdgpu/pptable: Fix UBSAN array-index-out-of-boundsTasos Sahanidis1-42/+49
Flexible arrays used [1] instead of []. Replace the former with the latter to resolve multiple UBSAN warnings observed on boot with a BONAIRE card. In addition, use the __counted_by attribute where possible to hint the length of the arrays to the compiler and any sanitizers. Signed-off-by: Tasos Sahanidis <tasos@tasossah.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-30drm/amdgpu: silence UBSAN warningAlex Deucher1-1/+1
Convert a variable sized array from [1] to []. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-05-22drm/amdgpu/atomfirmware: add intergrated info v2.3 tableLi Ma1-0/+43
[Why] The vram width value is 0. Because the integratedsysteminfo table in VBIOS has updated to 2.3. [How] Driver needs a new intergrated info v2.3 table too. Then the vram width value will be correct. Signed-off-by: Li Ma <li.ma@amd.com> Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2024-04-27drm/amdgpu/mes11: update ADD_QUEUE interfaceJack Xiao1-3/+14
Update ADD_QUEUE interface for mes11 to support mes mapping legacy queue. Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-04-27drm/amd/display: Add some missing HDMI registers for DCN3xRodrigo Siqueira4-0/+23
This commit add some missing HDMI control registers to DCN3x. Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-04-27drm/amd/display: Add missing debug registers for DCN2/3/3.1Rodrigo Siqueira2-1/+27
This commit add some missing debug registers for DPCS and RDPC debug. Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-04-27drm/amdgpu: add protype for print ip stateSunil Khatri1-0/+2
Add the protoype for print ip state to be used to print the registers in devcoredump during a gpu reset. Signed-off-by: Sunil Khatri <sunil.khatri@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-04-27drm/amdgpu: add support of gfx10 register dumpSunil Khatri1-0/+12
Adding gfx10 gc registers to be used for register dump via devcoredump during a gpu reset. Signed-off-by: Sunil Khatri <sunil.khatri@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-04-27drm/amdgpu: add prototype for ip dumpSunil Khatri1-0/+1
Add the prototype to dump ip registers for all ips of different asics and set them to NULL for now. Based on the requirement add a function pointer for each of them. Signed-off-by: Sunil Khatri <sunil.khatri@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-04-19drm/amdgpu: add IH_RING1_CFG headers for IH v6.0Sunil Khatri2-0/+14
Add offsets, mask and shift macros for IH v6.0 which are needed to configure ring1 client irq redirection. Signed-off-by: Sunil Khatri <sunil.khatri@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-04-10drm/amd/amdgpu: support MES command SET_HW_RESOURCE1 in sriovchongli21-0/+21
support MES command SET_HW_RESOURCE1 in sriov Signed-off-by: chongli2 <chongli2@amd.com> Reviewed-by: Jingwen Chen <Jingwen.Chen2@amd.com> Acked-by: Jingwen Chen <Jingwen.Chen2@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-04-10drm/amdgpu/pm: Add support for MACO flag checkingMa Jun1-1/+1
Add support for MACO flag checking. MACO mode only works if BACO is supported. Signed-off-by: Ma Jun <Jun.Ma2@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-04-10drm/amd/display: Add missing registersRodrigo Siqueira8-1/+149
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-04-10drm/amd/display: Add some missing debug registersRodrigo Siqueira7-0/+81
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-03-27drm/amdgpu/umsch: update UMSCH 4.0 FW interfaceLang Yu1-2/+11
Align with FW changes. Signed-off-by: Lang Yu <Lang.Yu@amd.com> Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-03-20drm/amdgpu: Add smuio v14_0_2 ip headers (v4)Hawking Zhang2-0/+1617
v1: Add smuio v14_0_2 register offset and shift masks header files. (Hawking) v2: Update smuio v14_0_2 register offset and shift masks header files to RE2. (Likun) v3: Update smuio v14_0_2 register offset and shift masks header files to RE2.5. (Likun) v4: Clean up smuio v14_0_2 ip headers (Alex) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-03-20drm/amd/display: Add missing registers and offsetRodrigo Siqueira2-1/+52
[Why & How] Registers and offset are missing. Add it back Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-03-20drm/amdgpu: add the sensor value of VCN activityXiaojian Du1-0/+1
This will add the sensor value of VCN activity for some ASICs. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-03-20drm/amdgpu: add new bit definitions for GC 9.0 PROTECTION_FAULT_STATUSTao Zhou1-0/+4
Add UCE and FED bit definitions. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-03-07drm/amdgpu: Add pcie v6_1_0 ip headers (v5)Hawking Zhang2-0/+4880
v1: Add pcie v6_1_0 register offset and shift masks header files. (Hawking) v2: Update pcie v6_1_0 register offset and shift masks header files to RE2. (Likun) v3: Update pcie v6_1_0 register offset and shift masks header files to RE2.5. (Likun) v4: Update pcie v6_1_0 register offset and shift masks header files to RE3. (Likun) v5: Updates (Alex) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-03-07drm/amdgpu: Add nbif v6_3_1 ip headers (v5)Hawking Zhang2-0/+44093
v1: Add nbif v6_3_1 register offset and shift masks header files. (Hawking) v2: Update nbif v6_3_1 register offset and shift masks header files to RE2. (Likun) v3: Update nbif v6_3_1 register offset and shift masks header files to RE2.5. (Likun) v4: Update nbif v6_3_1 register offset and shift masks header files to RE3. (Likun) v5: Updates (Alex) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-03-04drm/amd: add register headers for DCN351Hamza Mahfooz2-0/+68723
Add register headers for DCN 3.5.1. Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-22drm/amd: Update atomfirmware.h for DCN401Aurabindo Pillai1-0/+32
Add new firmware header definitions reqiured for DCN401 Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-22Revert "drm/amdgpu: Add pci usage to nbio v7.9"Asad Kamal1-8/+0
Remove implementation to get pcie usage for nbio v7.9 as pcie usage is handled by fw This reverts commit 59070fd9ccea58c3363d39f69c25fa98c71eb02f. Signed-off-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-16drm/amdgpu/nbio: Add NBIO 7.11.1 SupportYifan Zhang1-0/+2
Fix up doorbell setup and clockgating. v2: squash in fixes (Alex) Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by: Lang Yu <Lang.Yu@amd.com> Signed-off-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-15drm/amdgpu: Add mp v14_0_2 ip headers (v5)Hawking Zhang2-0/+1160
v1: Add mp v14_0_2 register offset and shift masks header files. (Hawking) v2: Update mp v14_0_2 register offset and shift masks header files to RE2. (Likun) v3: Update mp v14_0_2 register offset and shift masks header files to RE2.5. (Likun) v4: Update mp v14_0_2 register offset and shift masks header files to RE3. (Likun) v5: Updates (Alex) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-13drm/amdgpu: Add vcn v5_0_0 ip headers (v5)Hawking Zhang2-0/+9299
v1: Add vcn v5_0_0 register offset and shift masks header files. (Hawking) v2: Update vcn v5_0_0 register offset and shift masks header files to RE2. (Likun) v3: Update vcn v5_0_0 register offset and shift masks header files to RE2.5. (Likun) v4: Update vcn v5_0_0 register offset and shift masks header files to RE3. (Likun) v5: Clean up vcn v5_0_0 ip headers. (Alex) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-13drm/amdgpu: Add hdp v7_0_0 ip headers (v3)Hawking Zhang2-0/+954
v1: Add hdp v7_0_0 register offset and shift masks header files (Hawking) v2: Update hdp v7_0_0 register offset and shift masks header files for RE2.5 (Likun) v3: Clean up hdp v7_0_0 ip headers (Alex) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-13drm/amdgpu/jpeg: add support for jpeg DPG modeSaleemkhan Jamadar1-0/+1
Jpeg DPG support for GC IP v11_5_0 Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-13drm/amdgpu: Add osssys v7_0_0 ip headers (v4)Hawking Zhang2-0/+1308
v1: Add osssys v7_0_0 register offset and shift masks header files. (Hawking) v2: Update osssys v7_0_0 register offset and shift masks header files to RE2. (Likun) v3: Update osssys v7_0_0 register offset and shift masks header files to RE2.5. (Likun) v4: Clean up osssys v7_0_0 ip headers (Alex) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-13drm/amdgpu: Add lsdma v7_0_0 ip headers (v3)Hawking Zhang2-0/+1799
v1: Add lsdma v7_0_0 register offset and shift masks header files (Hawking) v2: Update lsdma v7_0_0 register offset and shift masks header files for RE2.5 (Likun) v3: Clean up lsdma v7_0_0 ip headers (Alex) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-13drm/amdgpu: Add athub v4_1_0 ip headers (v5)Hawking Zhang2-0/+1635
v1: Add athub v4_1_0 register offset and shift masks header files. (Hawking) v2: Update athub v4_1_0 register offset and shift masks header files to RE2. (Likun) v3: Update athub v4_1_0 register offset and shift masks header files to RE2.5 (Likun) v4: Update athub v4_1_0 register offset and shift masks header files to RE3. (Likun) v5: Clean up athub v4_1_0 ip headers. (Alex) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-29drm/amd/include: Add missing registers/mask for DCN316 and 350Rodrigo Siqueira4-0/+103
Cc: Jun Lei <Jun.Lei@amd.com> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Cc: Hamza Mahfooz <hamza.mahfooz@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-25drm/amd: Add a DC debug mask for IPSRoman Li1-0/+1
For debugging IPS-related issues, expose a new debug mask that allows to disable IPS. Usage: amdgpu.dcdebugmask=0x800 Signed-off-by: Roman Li <Roman.Li@amd.com> Tested-by: Mark Broadworth <mark.broadworth@amd.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-25drm/amdgpu: convert some variable sized arrays to [] styleAlex Deucher1-2/+2
Replace [1] with []. Silences UBSAN warnings. Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3107 Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-25drm/amdgpu/pptable: convert some variable sized arrays to [] styleAlex Deucher1-1/+1
Replace [1] with []. Silences UBSAN warnings. Link: https://bugs.launchpad.net/ubuntu/+source/linux/+bug/2039926 Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-23drm/amdgpu: Fix null pointer dereferenceHawking Zhang1-1/+1
amdgpu_reg_state_sysfs_fini could be invoked at the time when asic_func is even not initialized, i.e., amdgpu_discovery_init fails for some reason. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-18drm/amd/include/vega20_ip_offset: Clean up errors in vega20_ip_offset.hchenxuebing1-40/+38
Fix the following errors reported by checkpatch: ERROR: open brace '{' following struct go on the same line ERROR: spaces required around that '=' (ctx:WxV) Signed-off-by: chenxuebing <chenxb_99091@126.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-18drm/amd/display: Clean up errors in renoir_ip_offset.hchenxuebing1-4/+2
Fix the following errors reported by checkpatch: ERROR: open brace '{' following struct go on the same line Signed-off-by: chenxuebing <chenxb_99091@126.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-18drm/amd/amdgpu: Clean up errors in beige_goby_ip_offset.hchenxuebing1-4/+2
Fix the following errors reported by checkpatch: ERROR: open brace '{' following struct go on the same line Signed-off-by: chenxuebing <chenxb_99091@126.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-18drm/amdgpu: Clean up errors in v10_structs.hchenxuebing1-2/+1
Fix the following errors reported by checkpatch: ERROR: open brace '{' following struct go on the same line Signed-off-by: chenxuebing <chenxb_99091@126.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-18drm/amd/include/navi14_ip_offset: Clean up errors in navi14_ip_offset.hchenxuebing1-4/+2
Fix the following errors reported by checkpatch: ERROR: open brace '{' following struct go on the same line Signed-off-by: chenxuebing <chenxb_99091@126.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-18drm/amdgpu: Clean up errors in cgs_common.hchenxuebing1-12/+11
Fix the following errors reported by checkpatch: ERROR: open brace '{' following struct go on the same line ERROR: space required after that ',' (ctx:VxV) Signed-off-by: chenxuebing <chenxb_99091@126.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-18drm/amd/include/sienna_cichlid_ip_offset: Clean up errors in ↵chenxuebing1-4/+2
sienna_cichlid_ip_offset.h Fix the following errors reported by checkpatch: ERROR: open brace '{' following struct go on the same line Signed-off-by: chenxuebing <chenxb_99091@126.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-18drm/amd/include/vangogh_ip_offset: Clean up errors in vangogh_ip_offset.hchenxuebing1-4/+2
Fix the following errors reported by checkpatch: ERROR: open brace '{' following struct go on the same line Signed-off-by: chenxuebing <chenxb_99091@126.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-18drm/amdgpu: Clean up errors in dimgrey_cavefish_ip_offset.hchenxuebing1-4/+2
Fix the following errors reported by checkpatch: ERROR: open brace '{' following struct go on the same line Signed-off-by: chenxuebing <chenxb_99091@126.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-18drm/amd/pp: Clean up errors in dm_pp_interface.hchenxuebing1-5/+4
Fix the following errors reported by checkpatch: ERROR: open brace '{' following struct go on the same line ERROR: space prohibited before that ',' (ctx:WxE) Signed-off-by: chenxuebing <chenxb_99091@126.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-18drm/amd: Clean up errors in vega10_ip_offset.hchenxuebing1-4/+2
Fix the following errors reported by checkpatch: ERROR: open brace '{' following struct go on the same line Signed-off-by: chenxuebing <chenxb_99091@126.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-18drm/amd/include/vega10_ip_offset:Clean up errors in vega10_ip_offset.hchenxuebing1-4/+2
Fix the following errors reported by checkpatch: ERROR: open brace '{' following enum go on the same line Signed-off-by: chenxuebing <chenxb_99091@126.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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