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path: root/drivers/gpu/drm/amd/display
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2017-12-14drm/amd/display: Cache cursor position.Yongqiang Sun2-0/+3
When programming cursor position after front end programmed, if position is already set previously, it doesn't make sense to program position with all 0. Cache position and use the parameter after front end programming. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14drm/amd/display: Program cursor regs after context swapped.Yongqiang Sun1-14/+1
Cursor is abnormal after pipe_ctx is changed in context. Cause: cursor attributes is programmed right after front end programming, but it use old pipe_ctx to program which is not updated yet. Solution: Program cursor regs after context swapped. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14drm/amd/display: fix recout_skip calculation when rotating 180 or 270Yongqiang Sun1-34/+60
Fixed fliped landscape and fliped portrait hard hang. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14drm/amd/display: Add is_tiling_rotated flag to plane_stateEric Murphy-Zaremba1-0/+1
Signed-off-by: Eric Murphy-Zaremba <Eric.Murphy-zaremba@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14drm/amd/display: OPP DPG test patternEric Bernstein3-38/+43
Create opp_set_test_pattern function with similar interface and implementation as timing generator test pattern. Signed-off-by: Eric Bernstein <eric.bernstein@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14drm/amd/display: Build unity lut for shaperVitaly Prosyak6-274/+325
Add color module to diagnostic compilation Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14drm/amd/display: Reset MPCC muxes during initEric Bernstein4-49/+35
During HW initialization, instead of assuming or detecting the existing MPCC mux configuration and then removing existing planes, reset all the MPCC muxes. Signed-off-by: Eric Bernstein <eric.bernstein@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14drm/amd/display: CNVC pseudocode review follow upYue Hin Lau4-247/+244
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com> Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14drm/amd/display: Disable plane right after disconnectedYongqiang Sun1-1/+2
HDR display playing video underflow is observed when switching to full screen due to program a lower watermark right after unlock otg. Instead of disable plane in next flip coming, if there is a plane disconnected, after otg unlock wait for mpcc idle and disable the plane, then program watermark. So there is enough warter mark to make sure current frame data pass through. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14drm/amd/display: dal 3.1.23Tony Cheng1-1/+1
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14drm/amd/display: Clean up os_types.h a bitHarry Wentland1-6/+2
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14drm/amd/display: Fix access of wrong array element TF format conversionHarry Wentland1-2/+2
Found by smatch: drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_hw_sequencer.c:357 convert_to_custom_float() error: buffer overflow 'arr_points' 2 <= 2 drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_hw_sequencer.c:358 convert_to_custom_float() warn: buffer overflow 'arr_points' 2 <= 2 Regression: drm/amd/display: Remove extra arr_points element Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14drm/amd/display: dal 3.1.22Tony Cheng1-1/+1
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14drm/amd/display: Add dcc_change surface update flagAndrew Jiang3-0/+7
Program the DCC registers when dcc_change is true. Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14drm/amd/display: Implement work around for optc underflow.Yongqiang Sun5-11/+62
Work around for a hw bug causing optc underflow if blank data double buffer disable and remove mpcc. Checking optc status after otg unlock, after wait mpcc idle check status again, if optc underflow just happens after wait mpcc idle, clear underflow status and enable blank data double buffer. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14drm/amd/display: Change optimized_required logicAndrew Jiang1-0/+3
Rather than setting it every time there's a full update with surface count > 0, set it when we need to do plane_atomic_disconnect. Also make sure that we unset the flag in plane_atomic_disable, so that in the event we run through a sequence where we do disconnect followed by an immediate disable, we do not do unnecessarily request a passive flip to do the optimization. Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14drm/amd/display: Add optimized_required flagHarry Wentland2-0/+4
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14drm/amd/display: Use same wait mpcc idle function.Yongqiang Sun1-15/+12
There is already wait mpcc idle function. It is better to use the same function for all wait mpcc idle. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14drm/amd/display: MPC updatesEric Bernstein2-5/+8
Fix update_mpcc logic to only call assert_mpcc_idle_before_connect if mpcc is not already being used (and required removal). Update set_out_rate_control to include optional flow control parameter. In init_mpcc_from_hw check for case where bot_sel is same as mpcc_id. Signed-off-by: Eric Bernstein <eric.bernstein@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14drm/amd/display: Fixed read wrong reg to get bot_sel.Yongqiang Sun1-1/+1
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14drm/amd/display: Fix potential mem leak in DC constructHarry Wentland1-16/+18
Found by smatch: drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:506 construct() warn: possible memory leak of 'dc_ctx' drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:506 construct() warn: possible memory leak of 'dc_vbios' drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:506 construct() warn: possible memory leak of 'dcn_ip' drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:506 construct() warn: possible memory leak of 'dcn_soc' Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14drm/amd/display: Remove redundant checks in set_default_colorsHarry Wentland1-10/+2
pipe_ctx->stream and pipe_ctx->plane_state are never NULL Found by smatch: drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_hw_sequencer.c:2111 set_default_colors() error: we previously assumed 'pipe_ctx->stream' could be null (see line 2101) Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14drm/amd/display: Remove plane_res.mi check in dce110_apply_ctx_for_surfaceHarry Wentland1-7/+6
plane_res.mi (memory interface) can never be NULL for DCE110 Found by smatch: drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_hw_sequencer.c:2881 dce110_apply_ctx_for_surface() error: we previously assumed 'pipe_ctx->plane_res.mi' could be null (see line 2873) Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14drm/amd/display: Remove PSR functions in LinuxHarry Wentland1-138/+0
NULL check issue found by smatch: drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link.c:1976 dc_link_setup_psr() warn: variable dereferenced before check 'link' (see line 1970) We don't use these functions so might as well remove them. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14drm/amd/display: Integrating MPC pseudocodeEric Bernstein7-356/+594
Integrating MPC pseudocode to support new blending cases with secondary MPCC list. This includes a design change to MPC data structures and interfaces. Signed-off-by: Eric Bernstein <eric.bernstein@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14drm/amd/display: dal 3.1.21Tony Cheng1-1/+1
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14drm/amd/display: try to find matching audio inst for enc inst firstCharlene Liu1-3/+1
[Description] in eDP+ HDMI/DP clone or extended configuration, audio inst changed from inst 1 to inst0. No failure related this though, just playback device endpoint inst changed. Also remove one addition register read. Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14drm/amd/display: fix seq issue: turn on clock before programming afmt.Charlene Liu1-1/+3
Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14drm/amd/display: Remove unnecessary wait mpcc idle.Yongqiang Sun1-6/+0
Before power gate plane, mpcc idle wait is processed, no need to wait another time. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-07drm/amdgpu: add license to files where it was missingAlex Deucher9-3/+137
These files were missing it before. Acked-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-07drm/amdgpu: add license to MakefilesAlex Deucher19-1/+400
Was missing license text. Acked-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06drm/amd/display: Use drm_fb_helper_poll_changed()Noralf Trønnes1-1/+1
This driver can use drm_fb_helper_output_poll_changed() as its .output_poll_changed callback. Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Signed-off-by: Noralf Trønnes <noralf@tronnes.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06drm/amd/display: Don't call dm_log_to_buffer directly in dc_conn_logMichel Dänzer1-7/+3
dm_log_to_buffer logs unconditionally, so calling it directly resulted in the main message being logged even when the event type isn't enabled in the event mask. To fix this, use the new dm_logger_append_va API. Fixes spurious messages like [drm] {1920x1200, 2080x1235@154000Khz} in dmesg when a mode is set. v2: * Use new dm_logger_append_va API, fixes incorrect va_list usage in v1 * Just use and decrease entry.buf_offset to get rid of the trailing newline Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06drm/amd/display: Add dm_logger_append_va APIMichel Dänzer2-5/+17
Same as dm_logger_append, except it takes a va_list instead of a variable number of arguments. dm_logger_append is now a minimal wrapper around dm_logger_append_va. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06drm/amd/display: remove usage of legacy_cursor_updateShirish S1-30/+13
Currently the atomic check code uses legacy_cursor_update to differnetiate if the cursor plane is being requested by the user, which is not required as we shall be updating plane only if modeset is requested/required. Have tested cursor plane and underlay get updated seamlessly, without any lag or frame drops. Signed-off-by: Shirish S <shirish.s@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06drm/amd/include:cleanup raven1 nbio header files.Feifei Xu1-1/+1
Cleanup asic_reg/raven1/NBIO folder. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06drm/amd/include:cleanup raven1 mmhub header files.Feifei Xu1-2/+2
Cleanup asic_reg/raven1/MMHUB folder.Remove unused mmhub_9_1_default.h Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06drm/amd/include:cleanup raven1 dcn header files.Feifei Xu6-12/+12
Cleanup asic_reg/raven1/DCN folder.Remove unused dcn_1_0_default.h. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06drm/amd/include:cleanup vega10 header files.Feifei Xu13-13/+13
Remove asic_reg/vega10 folder. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06drm/amd/include:cleanup vega10 nbio header files.Feifei Xu1-1/+1
Cleanup asic_reg/vega10/NBIO folder. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06drm/amd/include:cleanup vega10 dce header files.Feifei Xu7-14/+14
Cleanup asic_reg/vega10/DC folder.Remove dce_12_0_default.h. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06drm/amd/display: dal 3.1.20Tony Cheng1-1/+1
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06drm/amd/display: Set OPP default values in init_hwAndrew Jiang2-11/+12
On S3 resume, we do not reconstruct OPP, but we do need to reinitialize some of its values to the default ones. Therefore, move those lines out of the OPP constructor and into init_hw. Also reset the hubp power gated flag, since nothing is power gated at init_hw. Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06drm/amd/display: dal 3.1.19Tony Cheng1-1/+1
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06drm/amd/display: DMCU and ABM maintenance and refactorAnthony Koo4-28/+36
Remove some globals that should really be per block state. Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06drm/amd/display: Only program watermark for full update.Yongqiang Sun3-30/+23
For scaling and position change, it isn't necessary to program watermark and check P-State as well. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06drm/amd/display: dal 3.1.18Tony Cheng1-1/+1
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06drm/amd/display: Set full update flag in dcn_validate_bandwidthAndrew Jiang1-0/+2
Doing bandwidth validation implies that this is a full update. Set the flag inside the function in case whatever is calling dcn_validate_bandwidth doesn't set it. Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06drm/amd/display: Do not program front-end twiceLeo (Sunpeng) Li3-3/+32
The sequence of front-end > back-end > front-end programming will program the front-end more than once. Add a mode_changed flag, and use it to determine whether the front-end should be programmed before, or after back-end. Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06drm/amd/display: Trigger full update on plane changeLeo (Sunpeng) Li1-0/+5
With the optimized DCN10 frontend programming code, things are programmed only when requested. For now, trigger a full update on all plane changes. Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-27 22:59:56 +0300