summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/amd/display
AgeCommit message (Collapse)AuthorFilesLines
2020-09-29drm/amd/display: disable stream if pixel clock changed with link activeChiawen Huang1-1/+0
[Why] Vbios uses preferred timing to turn on edp but OS could use other timing. If change pixel clock when link active, there is unexpected garbage on monitor. [How] Once pixel clock changed, the driver needs to disable stream. Signed-off-by: Chiawen Huang <chiawen.huang@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-29drm/amd/display: [FW Promotion] Release 0.0.35Anthony Koo1-6/+126
[Header Changes] - Definition for retaining ABM settings during disable - Addition of some new AUX interface definitions - Addition of some outbox definitions Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-29drm/amd/display: Revert check for flip pending before locking pipesAric Cyr4-14/+13
Signed-off-by: Aric Cyr <aric.cyr@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-29drm/amd/display: Add debug param to force dio disableWesley Chalmers2-0/+4
[WHY] At the moment, some tests are failing because cur_link_settings is invalid. As a workaround, add an option to force dio disable. Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com> Reviewed-by: Martin Leung <Martin.Leung@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-29drm/amd/display: Calc DLG from dummy p-state if full p-state unsupportedJoshua Aberback3-41/+80
[Why] Currently, when full p-state changes are not supported, DLG parameters are calculated for no p-state support at all. However, we are required to always support dummy p-state changes, so we should instead calculate DLG based on dummy p-state latency when full p-state is unsupported. This behaviour already exists for DCN2. [How] - move DLG calculation inside WM calculation - if p-state unsupported, do not recalculate for set A, instead copy from set C, and perform DLG calculation with dummy p-state latency Signed-off-by: Joshua Aberback <joshua.aberback@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-29drm/amd/display: disable stream if pixel clock changed with link activeChiawen Huang2-4/+60
[Why] Vbios uses preferred timing to turn on edp but OS could use other timing. If change pixel clock when link active, there is unexpected garbage on monitor. [How] Once pixel clock changed, the driver needs to disable stream. Signed-off-by: Chiawen Huang <chiawen.huang@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-29drm/amd/display: Ensure all debug bits are passed to fwWyatt Wood1-2/+3
[Why] Some debug bits are not being copied from driver to fw. [How] Copy debug bits properly. Signed-off-by: Wyatt Wood <wyatt.wood@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-29drm/amd/display: Add dp_set_dsc_pps_info_packet to virtual stream encoderEric Bernstein2-10/+18
Signed-off-by: Eric Bernstein <eric.bernstein@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-29drm/amd/display: Update NV1x SR latency valuesAlvin Lee1-2/+2
[Why] HW team measurement requires updating values [How] Update bounding box values Signed-off-by: Alvin Lee <alvin.lee2@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-25drm/amdgpu/display: fix CFLAGS setup for DCN30Alex Deucher1-2/+16
Properly handle clang and older versions of gcc. Fixes: e77165bf7b02a3 ("drm/amd/display: Add DCN3 blocks to Makefile") Acked-by: Nirmoy Das <nirmoy.das@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-25drm/amd/display: fix return value check for hdcp_workFlora Cui1-1/+1
max_caps might be 0, thus hdcp_work might be ZERO_SIZE_PTR Signed-off-by: Flora Cui <flora.cui@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-23Merge tag 'drm-misc-next-2020-09-21' of ↵Dave Airlie1-0/+1
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for 5.10: UAPI Changes: Cross-subsystem Changes: - virtio: Merged a PR for patches that will affect drm/virtio Core Changes: - dev: More devm_drm convertions and removal of drm_dev_init - atomic: Split out drm_atomic_helper_calc_timestamping_constants of drm_atomic_helper_update_legacy_modeset_state - ttm: More rework Driver Changes: - i915: selftests improvements - panfrost: support for Amlogic SoC - vc4: one fix - tree-wide: conversions to devm_drm_dev_alloc, - ast: simplifications of the atomic modesetting code - panfrost: multiple fixes - vc4: multiple fixes Signed-off-by: Dave Airlie <airlied@redhat.com> From: Maxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/20200921152956.2gxnsdgxmwhvjyut@gilmour.lan
2020-09-23drm/amd/display: optimize code runtime a bitBernard Zhao1-9/+1
In the function dal_ddc_service_query_ddc_data, get rid of dal_ddc_i2c_payloads_destroy, call dal_vector_destruct() directly. This change is to make the code run a bit fast. Signed-off-by: Bernard Zhao <bernard@vivo.com> Changes since V1: *get rid of dal_ddc_i2c_payloads_destroy, call dal_vector_destruct() directly. Link for V1: *https://lore.kernel.org/patchwork/patch/1309014/ Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-23drm/amd/display: [FIX] update clock under two conditionsLewis Huang1-2/+4
[Why] Update clock only when non-seamless boot stream exists creates regression on multiple scenerios. [How] Update clock in two conditions 1. Non-seamless boot stream exist. 2. Stream_count = 0 Fixes: 598c13b21e25 ("drm/amd/display: update clock when non-seamless boot stream exist") Signed-off-by: Lewis Huang <Lewis.Huang@amd.com> Reviewed-by: Martin Leung <Martin.Leung@amd.com> Acked-by: Qingqing Zhuo <Qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: <stable@vger.kernel.org>
2020-09-22drm/amd/display: 3.2.104Aric Cyr1-1/+1
Signed-off-by: Aric Cyr <aric.cyr@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-22drm/amd/display: [FW Promotion] Release 0.0.34Anthony Koo1-3/+8
[Header Changes] - Add new SCRATCH0 status bits for detecting restore state Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-22drm/amd/display: TMDS Fallback transitionChris Park2-0/+15
[Why] HDMI requires fallback to TMDS by redetection in order to switch PHY settings. This avoids black out when link training fail during mode setting, link quality update, disable driver sequence. [How] Allow driver to redetect HDMI displays based on retraining or fallback mechanism. Signed-off-by: Chris Park <Chris.Park@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-22drm/amd/display: Check for flip pending before locking pipes.Taimur Hassan4-13/+14
[Why] When running a game/benchmark with v-sync disabled, disabling a plane (which is v-sync) can cause an underflow. This is due to flips that are pending before pipe locking being applied after locks are released and pipes have been re-arranged or disconnected. This can potentially apply a flip on the incorrect pipe. [How] Check that any pending flips are cleared before locking any pipes to ensure flips are applied on the correct pipes. Signed-off-by: Taimur Hassan <syed.hassan@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-22drm/amd/display: Implement PSR wait for enable/disableWyatt Wood3-3/+28
[Why] For DMUB implementation of PSR, the 'wait' parameter, used to determine if driver should wait for PSR enable/disable, is not implemented correctly. [How] Implement wait for PSR enable/disable. Signed-off-by: Wyatt Wood <wyatt.wood@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-22drm/amd/display: allow DP RX to use more cr aux rd interval delayWenjing Liu1-1/+18
[why] Regression is caused by previous change with attempt to correct the extended cr aux rd interval delay due to mis interpretation of the DP specs. The change turns out not working well with certain RXs. So we decided to keep the cr aux rd interval logic as before. Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Reviewed-by: George Shen <George.Shen@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-22drm/amd/display: Enable DP YCbCr420 mode support for DCN10Gary Li1-1/+1
[WHY] In DCN10 when a panel with YCbCr420 capability is connected via USB-C to HDMI active dongle, no YCbCr420 option is listed in Radeon settings. [HOW] Enable DP YCbCr420 mode support for DCN10 Signed-off-by: Gary Li <gary.li@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-22drm/amd/display: Increase timeout for DP DisableWesley Chalmers1-2/+2
[WHY] When disabling DP video, the current REG_WAIT timeout of 50ms is too low for certain cases with very high VSYNC intervals. [HOW] Increase the timeout to 102ms, so that refresh rates as low as 10Hz can be handled properly. Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: <stable@vger.kernel.org>
2020-09-22drm/amd/display: Fix ODM policy implementationWesley Chalmers1-5/+6
[WHY] Only the leftmost ODM pipe should be offset when scaling. A previous code change was intended to implement this policy, but a section of code was overlooked. Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: <stable@vger.kernel.org>
2020-09-22drm/amd/display: eDP intermittent black screen during PnPPeikang Zhang6-0/+7
[Why] We dont's turn off backlight before power off eDP (VDD), which is a violation of eDP specs. [How] Power off eDP backlight before power off eDP Signed-off-by: Peikang Zhang <peikang.zhang@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-22drm/amd/display: Bug in dce_is_panel_backlight_on()Peikang Zhang2-3/+11
[Why] dce_is_panel_backlight_on() will return wrong value if LVTMA_BLON_OVRD is 0 [How] When LVTMA_BLON_OVRD is 0, read LVTMA_PWRSEQ_TARGET_STATE instead Signed-off-by: Peikang Zhang <peikang.zhang@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-22drm/amd/display: 3.2.103Aric Cyr1-1/+1
Signed-off-by: Aric Cyr <aric.cyr@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-22drm/amd/display: [FW Promotion] Release 0.0.33Anthony Koo1-2/+2
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-22drm/amd/display: Fix incorrect backlight register offset for DCNDavid Galiffi1-1/+1
[Why] Typo in backlight refactor introduced wrong register offset. [How] SR(BIOS_SCRATCH_2) to NBIO_SR(BIOS_SCRATCH_2). Signed-off-by: David Galiffi <David.Galiffi@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: <stable@vger.kernel.org>
2020-09-22drm/amd/display: fix crash/reboot while accessing sysfs filesShirish S1-5/+5
read/writes to aux_dpcd_* sysfs entries leads to system reboot or hang. Hence fix the handling of input data and reporting of errors appropriately to the user space. Signed-off-by: Shirish S <shirish.s@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-18drm/amd/display: Delete duplicated argument to '&&' or '||'Ye Bin2-4/+4
Fixes coccicheck warnig: drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c:282:12-42: duplicated argument to && or || drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c:3240:12-42: duplicated argument to && or || drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c:5520:7-91: duplicated argument to && or || drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c:5309:86-122: duplicated argument to && or || Fixes: 6725a88f88a7 ("drm/amd/display: Add DCN3 DML") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Ye Bin <yebin10@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-18drm/amd/display: dc/clk_mgr: make function staticMauro Rossi1-1/+1
[Why] linux-next kernel test robot reported the following problem: warning: no previous prototype for 'dce60_get_dp_ref_freq_khz' [-Wmissing-prototypes] [How] mark dce60_get_dp_ref_freq_khz() as static Fixes: 3ecb3b794e2c "drm/amd/display: dc/clk_mgr: add support for SI parts (v2)" Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Mauro Rossi <issor.oruam@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-18drm/amd/display: Remove set but used 'temp'Ye Bin1-3/+1
Addresses the following gcc warning with "make W=1": In file included from drivers/gpu/drm/amd/amdgpu/../display/dmub/src/../dmub_srv.h:67:0, from drivers/gpu/drm/amd/amdgpu/../display/dmub/src/dmub_dcn21.c:26: drivers/gpu/drm/amd/amdgpu/../display/dmub/src/../inc/dmub_cmd.h: In function ‘dmub_rb_flush_pending’: drivers/gpu/drm/amd/amdgpu/../display/dmub/src/../inc/dmub_cmd.h:795:12: warning: variable ‘temp’ set but not used [-Wunused-but-set-variable] uint64_t temp; ^ In file included from drivers/gpu/drm/amd/amdgpu/../display/dmub/src/../dmub_srv.h:67:0, from drivers/gpu/drm/amd/amdgpu/../display/dmub/src/dmub_dcn30.c:26: drivers/gpu/drm/amd/amdgpu/../display/dmub/src/../inc/dmub_cmd.h: In function ‘dmub_rb_flush_pending’: drivers/gpu/drm/amd/amdgpu/../display/dmub/src/../inc/dmub_cmd.h:795:12: warning: variable ‘temp’ set but not used [-Wunused-but-set-variable] uint64_t temp; Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Ye Bin <yebin10@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-18drm/amd/display: Add missing "Copy GSL groups when committing a new context"Bhawanpreet Lakha1-0/+11
[Why] "Copy GSL groups when committing a new context" patch was accidentally removed during a refactor Patch: 21ffcc94d5b ("drm/amd/display: Copy GSL groups when committing a new context") [How] Re add it Fixes: b6e881c9474 ("drm/amd/display: update navi to use new surface programming behaviour") Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-18drm/amd/display: Don't log hdcp module warnings in dmesgBhawanpreet Lakha1-1/+1
[Why] DTM topology updates happens by default now. This results in DTM warnings when hdcp is not even being enabled. This spams the dmesg and doesn't effect normal display functionality so it is better to log it using DRM_DEBUG_KMS() [How] Change the DRM_WARN() to DRM_DEBUG_KMS() Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-18drm/amd/pm: drop unnecessary wrappers around watermark settingEvan Quan1-95/+2
The convertion to "struct dm_pp_clock_range_for_mcif_wm_set_soc15" is totally unnecessary and can be dropped. Signed-off-by: Evan Quan <evan.quan@amd.com> Tested-by: Changfeng Zhu <Changfeng.Zhu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-18drm/amd/pm: drop dead codeEvan Quan1-3/+0
Raven never goes to swsmu path. So "adev->smu.ppt_funcs" will be always false. Signed-off-by: Evan Quan <evan.quan@amd.com> Tested-by: Changfeng Zhu <Changfeng.Zhu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-16drm/amdgpu/dc: Require primary plane to be enabled whenever the CRTC isMichel Dänzer1-22/+10
Don't check drm_crtc_state::active for this either, per its documentation in include/drm/drm_crtc.h: * Hence drivers must not consult @active in their various * &drm_mode_config_funcs.atomic_check callback to reject an atomic * commit. atomic_remove_fb disables the CRTC as needed for disabling the primary plane. This prevents at least the following problems if the primary plane gets disabled (e.g. due to destroying the FB assigned to the primary plane, as happens e.g. with mutter in Wayland mode): * The legacy cursor ioctl returned EINVAL for a non-0 cursor FB ID (which enables the cursor plane). * If the cursor plane was enabled, changing the legacy DPMS property value from off to on returned EINVAL. v2: * Minor changes to code comment and commit log, per review feedback. GitLab: https://gitlab.gnome.org/GNOME/mutter/-/issues/1108 GitLab: https://gitlab.gnome.org/GNOME/mutter/-/issues/1165 GitLab: https://gitlab.gnome.org/GNOME/mutter/-/issues/1344 Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Michel Dänzer <mdaenzer@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-16drm/amd/display: Create trigger_hotplug entryYueHaibing1-0/+1
Add trigger_hotplug debugfs entry. Fixes: 6f77b2ac6280 ("drm/amd/display: Add connector HPD trigger debugfs entry") Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-16drm/amd/display: Fix possible memleak in dp_trigger_hotplug()YueHaibing1-1/+3
If parse_write_buffer_into_params() fails, we should free wr_buf before return. Fixes: 6f77b2ac6280 ("drm/amd/display: Add connector HPD trigger debugfs entry") Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-16drm/amd/display: optimize code runtime a bitBernard Zhao1-9/+5
In fnction is_cr_done & is_ch_eq_done, when done = false happened once, no need to circle left ln_count. This change is to make the code run a bit fast. Signed-off-by: Bernard Zhao <bernard@vivo.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-16drm: amd/display: fix spelling of "function"Randy Dunlap8-8/+8
Fix spellos of "function" in drivers/gpu/drm/amd/display/. Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: Harry Wentland <harry.wentland@amd.com> Cc: Leo Li <sunpeng.li@amd.com> Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-16drm/amd/display: Remove duplicate includeChen Zhou1-1/+0
Remove duplicate header which is included twice. Signed-off-by: Chen Zhou <chenzhou10@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-16drm/amd/display: update clock when non-seamless boot stream existLewis Huang1-2/+2
[Why] Seamless boot skip porgram clock when set path mode. It cause driverprogram clock after unblank stream. [How] update clock when non-seamless boot stream exist Signed-off-by: Lewis Huang <Lewis.Huang@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-16drm/amd/display: update dcn30_optc header with missing declarationsDmytro Laktyushkin2-3/+6
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-16drm/amd/display: get socBB from VBIOSJun Lei4-1/+96
[why] Some SOC BB paramters may vary per SKU, and it does not make sense for driver to hardcode these values [how] Parse the values from VBIOS if available, and use them if valid Signed-off-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-16drm/amd/display: Further fix of psr eDP p-state warningFangzhi Zuo1-1/+1
[Why] psr doesn't get fully disabled before hitting hubbub1_wm_change_req_wa. [How] Pass TRUE to "wait" parameter to get psr fully disabled. Follow-Up fix to: dc: PSR eDP p-state warning occurs intermittently after unplug DP Signed-off-by: Fangzhi Zuo <Jerry.Zuo@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-16drm/amd/display: update nv1x stutter latenciesJun Lei1-2/+2
[why] Recent characterization shows increased stutter latencies on some SKUs, leading to underflow. [how] Update SOC params to account for this worst case latency. Signed-off-by: Jun Lei <jun.lei@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-16drm/amd/display: fix compile warning in dmlRoman Li1-1/+1
[Why] gcc version 5.4.0 fails compilation with: ‘PixelPTEReqHeightPTEs’ may be used uninitialized in this function [-Werror=maybe-uninitialized] [How] Initialized variable explicitly with 0 Signed-off-by: Roman Li <roman.li@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-16drm/amd/display: remove dc context from transfer functionJosip Pavic5-17/+1
[Why] The ctx field of dc_transfer_func is not always populated and therefore isn't reliable. [How] Remove dc context from dc_transfer_func Signed-off-by: Josip Pavic <Josip.Pavic@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-16drm/amd/display: Add connector to the state if DSC debugfs is setEryk Brol1-0/+41
[why] We want to trigger atomic check on connector, which DSC debugfs properties have changed. [how] Add a helper function that iterates through all active connectors and add them to the state if DSC debugfs parameters have changed. Signed-off-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-17 23:06:27 +0300