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2019-12-06drm/amd/display: Reset PHY in link re-trainingPaul Hsieh4-53/+66
[Why] Link training failed randomly when plugging USB-C display in/out. [How] If link training failed, reset PHY in link re-training. Signed-off-by: Paul Hsieh <paul.hsieh@amd.com> Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-12-06drm/amd/display: Wrong ifdef guards were used around DML validationJaehyun Chung3-1/+3
[Why] Wrong guards were causing the debug option not to run. [How] Changed the guard to the correct one, matching the rq, ttu, dlg regs struct members that need to be guarded. Also log a message when validation starts. Signed-off-by: Jaehyun Chung <jaehyun.chung@amd.com> Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-12-06drm/amd/display: fix DalDramClockChangeLatencyNs overrideJoseph Gravenor1-1/+4
[why] pstate_latency_us never gets updated from the hard coded value in rn_clk_mgr.c [how] update the wm table's values before we do calculations with them Signed-off-by: Joseph Gravenor <joseph.gravenor@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-12-06drm/amd/display: Map DSC resources 1-to-1 if numbers of OPPs and DSCs are equalNikola Cornij1-3/+10
[why] On ASICs where number of DSCs is the same as OPPs there's no need for DSC resource management. Mappping 1-to-1 fixes mode-set- or S3- -related issues for such platforms. [how] Map DSC resources 1-to-1 to pipes only if number of OPPs is the same as number of DSCs. This will still keep other ASICs working. A follow-up patch to fix mode-set issues on those ASICs will be required if testing shows issues with mode set. Signed-off-by: Nikola Cornij <nikola.cornij@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-12-06drm/amd/display: Fix Dali clk mgr constructMichael Strauss2-7/+12
[WHY] Dali is currently being misinterpreted as Renoir, as a result uses wrong clk mgr constructor [HOW] Add check to init Dali as Raven2 before it can be misidentified Clean up & fix Raven2 & Dali ASIC checks Signed-off-by: Michael Strauss <michael.strauss@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-12-06drm/amd/display: add separate of private hwss functionsAnthony Koo27-470/+525
[Why] Some function pointers in the hwss function pointer table are meant to be hw sequencer entry points to be called from dc. However some of those function pointers are not meant to be entry points, but instead used as a code reuse/inheritance tool called directly by other hwss functions, not by dc. Therefore, we want a more clear separation of which functions we determine to be interface functions vs the functions we use within hwss. [How] DC interface functions will be stored in: struct hw_sequencer_funcs Functions used within HWSS will be stored in: struct hwseq_private_funcs Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-12-06drm/amd/display: rename core_dc to dcAnthony Koo12-107/+102
[Why] First, to make code more consistent Second, to get rid of those scenario where we create a second local pointer to dc when it's already passed in. [How] Rename core_dc to dc Remove duplicate local pointers to dc Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-12-06drm/amd/display: update sr and pstate latencies for RenoirEric Yang3-7/+26
[Why] DF team has produced more optimized latency numbers. [How] Add sr latencies to the wm table, use different latencies for different wm sets. Also fix bb override from registery key for these latencies. Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-12-04drm/amd/display: Loading NV10/14 Bounding Box Data Directly From CodeZhan Liu1-4/+3
[Why] NV10/14 has released. Its time to get NV10/14 bounding box directly from code. [How] Retrieve NV10/14 bounding box data directly from code. Signed-off-by: Zhan Liu <zhan.liu@amd.com> Reviewed-by: Hersen Wu <hersenxs.wu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-12-03drm/amd/display: re-enable wait in pipelock, but add timeoutAlex Deucher1-0/+19
Removing this causes hangs in some games, so re-add it, but add a timeout so we don't hang while switching flip types. Bug: https://bugzilla.kernel.org/show_bug.cgi?id=205169 Bug: https://bugs.freedesktop.org/show_bug.cgi?id=112266 Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2019-12-03drm/amd/display: Get NV14 specific ip params as neededZhan liu1-0/+4
[Why] NV14 is using its own ip params that's different from other DCN2.0 ASICs. [How] Add ASIC revision check to make sure NV14 gets correct ip params. Signed-off-by: Zhan Liu <zhan.liu@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-12-03drm/amd/display: Adding NV14 IP ParametersZhan liu1-0/+68
[Why] NV14 IP Parameters are missing. [How] Add IP Parameters in. Signed-off-by: Zhan liu <zhan.liu@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-12-03drm/amd/display: Include num_vmid and num_dsc within NV14's resource capsZhan Liu1-0/+2
[Why] "num_vmid" and "num_dsc" are missing within NV14's resource caps structure. [How] Add the missing parts. Signed-off-by: Zhan Liu <zhan.liu@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-12-03drm/amd/display: remove redundant assignment to variable v_totalColin Ian King1-1/+1
The variable v_total is being initialized with a value that is never read and it is being updated later with a new value. The initialization is redundant and can be removed. Addresses-Coverity: ("Unused value") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-12-03drm/amd/display: Remove unneeded semicolon in display_rq_dlg_calc_21.czhengbin1-2/+2
Fixes coccicheck warning: drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c:1525:144-145: Unneeded semicolon drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c:1526:142-143: Unneeded semicolon Reviewed-by: Harry Wentland <harry.wentland@amd.com> Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: zhengbin <zhengbin13@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-12-03drm/amd/display: Remove unneeded semicolon in hdcp.czhengbin1-1/+1
Fixes coccicheck warning: drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c:506:2-3: Unneeded semicolon Reviewed-by: Harry Wentland <harry.wentland@amd.com> Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: zhengbin <zhengbin13@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-12-03drm/amd/display: Remove unneeded semicolon in bios_parser2.czhengbin1-1/+1
Fixes coccicheck warning: drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c:995:2-3: Unneeded semicolon Reviewed-by: Harry Wentland <harry.wentland@amd.com> Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: zhengbin <zhengbin13@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-12-03drm/amd/display: Remove unneeded semicolon in bios_parser.czhengbin1-1/+1
Fixes coccicheck warning: drivers/gpu/drm/amd/display/dc/bios/bios_parser.c:2192:2-3: Unneeded semicolon Reviewed-by: Harry Wentland <harry.wentland@amd.com> Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: zhengbin <zhengbin13@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-12-03drm/amd/display: fix double assignment to msg_id fieldColin Ian King1-1/+1
The msg_id field is being assigned twice. Fix this by replacing the second assignment with an assignment to msg_size. Addresses-Coverity: ("Unused value") Fixes: 11a00965d261 ("drm/amd/display: Add PSP block to verify HDCP2.2 steps") Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-12-03drm/amd/display: re-enable wait in pipelock, but add timeoutAlex Deucher1-0/+19
Removing this causes hangs in some games, so re-add it, but add a timeout so we don't hang while switching flip types. Bug: https://bugzilla.kernel.org/show_bug.cgi?id=205169 Bug: https://bugs.freedesktop.org/show_bug.cgi?id=112266 Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-12-03drm/amd/display: Get NV14 specific ip params as neededZhan liu1-0/+4
[Why] NV14 is using its own ip params that's different from other DCN2.0 ASICs. [How] Add ASIC revision check to make sure NV14 gets correct ip params. Signed-off-by: Zhan Liu <zhan.liu@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-12-03drm/amd/display: Adding NV14 IP ParametersZhan liu1-0/+68
[Why] NV14 IP Parameters are missing. [How] Add IP Parameters in. Signed-off-by: Zhan liu <zhan.liu@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-12-03drm/amd/display: Drop AMD_EDID_UTILITY definesHarry Wentland3-14/+0
We don't use this upstream in the Linux kernel. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-12-03drm/amd/display: Include num_vmid and num_dsc within NV14's resource capsZhan Liu1-0/+2
[Why] "num_vmid" and "num_dsc" are missing within NV14's resource caps structure. [How] Add the missing parts. Signed-off-by: Zhan Liu <zhan.liu@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-11-26drm/amd/display: Modify comments to match the codeZhan liu1-1/+6
[Why] This line of code was modified. However, comments remained unchanged. As a result, comments and code are mismatching. [How] Modifying comments to reflect code. At the same time, explaining why the value was changed from 200ms to 3000ms. Signed-off-by: Zhan Liu <zhan.liu@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-11-26drm/amd/display: Null check aconnector in event_property_validateBhawanpreet Lakha1-0/+3
[Why] previously event_property_validate was only called after we enabled the display. But after "Refactor HDCP to handle multiple displays per link" this function can be called at any time. In certain cases we don't have a aconnector [How] Null check aconnector and exit early. This is ok because we only need to check the ENABLED->DESIRED transition if a connector exists. Fixes: b1abe5586ffc ("drm/amd/display: Refactor HDCP to handle multiple displays per link") Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Zhan Liu <zhan.liu@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-11-26drm/amd/display: add default clocks if not able to fetch themAlex Deucher1-1/+2
dm_pp_get_clock_levels_by_type needs to add the default clocks to the powerplay case as well. This was accidently dropped. Fixes: b3ea88fef321de ("drm/amd/powerplay: add get_clock_by_type interface for display") Bug: https://gitlab.freedesktop.org/drm/amd/issues/906 Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2019-11-26drm/amd/display: remove set but not used variable 'msg_out'YueHaibing1-4/+0
drivers/gpu/drm/amd/amdgpu/../display/modules/hdcp/hdcp_psp.c: In function mod_hdcp_hdcp2_enable_encryption: drivers/gpu/drm/amd/amdgpu/../display/modules/hdcp/hdcp_psp.c:633:77: warning: variable msg_out set but not used [-Wunused-but-set-variable] drivers/gpu/drm/amd/amdgpu/../display/modules/hdcp/hdcp_psp.c: In function mod_hdcp_hdcp2_enable_dp_stream_encryption: drivers/gpu/drm/amd/amdgpu/../display/modules/hdcp/hdcp_psp.c:710:77: warning: variable msg_out set but not used [-Wunused-but-set-variable] It is never used, so remove it. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-11-26drm/amd/display: Use NULL for pointer assignment in copy_stream_update_to_streamNathan Chancellor1-2/+2
Clang warns: ../drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:1965:26: warning: expression which evaluates to zero treated as a null pointer constant of type 'struct dc_dsc_config *' [-Wnon-literal-null-conversion] update->dsc_config = false; ^~~~~ ../drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:1971:25: warning: expression which evaluates to zero treated as a null pointer constant of type 'struct dc_dsc_config *' [-Wnon-literal-null-conversion] update->dsc_config = false; ^~~~~ 2 warnings generated. Fixes: f6fe4053b91f ("drm/amd/display: Use a temporary copy of the current state when updating DSC config") Link: https://github.com/ClangBuiltLinux/linux/issues/777 Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-11-22drm/amd/display: add default clocks if not able to fetch themAlex Deucher1-1/+2
dm_pp_get_clock_levels_by_type needs to add the default clocks to the powerplay case as well. This was accidently dropped. Fixes: b3ea88fef321de ("drm/amd/powerplay: add get_clock_by_type interface for display") Bug: https://gitlab.freedesktop.org/drm/amd/issues/906 Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-11-22Revert "drm/amd/display: enable S/G for RAVEN chip"Alex Deucher1-1/+1
This reverts commit 1c4259159132ae4ceaf7c6db37a6cf76417f73d9. S/G display is not stable with the IOMMU enabled on some platforms. Bug: https://bugzilla.kernel.org/show_bug.cgi?id=205523 Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-11-22drm/amd/display: Fix debugfs on MST connectorsMikita Lipski1-1/+9
[why] Previous patch allowed to initialize debugfs entries on both MST and SST connectors, but MST connectors get registered much later which exposed an issue of debugfs entries being initialized in the same folder. [how] Return SST debugfs entries' initialization back to where it was. For MST connectors we should initialize debugfs entries in connector register function after the connector is registered. Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-11-22drm/amdgpu: refine query function of mmhub EDC counter in vg20Dennis Li1-2/+2
Add codes to print the detail EDC info for the subblock of mmhub v2: Move the EDC_CNT registers' defintion from mmhub_9_4 header files to mmhub_1_0 ones. Add mmhub_v1_0_ prefix for the local static variable and function. v3: squash in DC fix Signed-off-by: Dennis Li <dennis.li@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-11-19Revert "drm/amd/display: enable S/G for RAVEN chip"Alex Deucher1-1/+1
This reverts commit 1c4259159132ae4ceaf7c6db37a6cf76417f73d9. S/G display is not stable with the IOMMU enabled on some platforms. Bug: https://bugzilla.kernel.org/show_bug.cgi?id=205523 Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-11-19drm/amd/display: Fix coding error in connector atomic checkMikita Lipski1-1/+1
[why] For MST connector atomic check we have to check a new CRTC state instead of an old one, when checking if CRTC is disabled to release VCPI slots allocated. Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-11-19drm/amd/display: Fix static analysis bug in validate_bksvBhawanpreet Lakha1-1/+3
[Why] static analysis throws the error below Out-of-bounds read (OVERRUN) Overrunning array of 5 bytes at byte offset 7 by dereferencing pointer (uint64_t *)hdcp->auth.msg.hdcp1.bksv. var n is going to contain r0p and bcaps. if they are non-zero the count will be wrong How] Use memcpy instead to avoid this. Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-11-19drm/amd/display: split rxstatus for hdmi and dpBhawanpreet Lakha3-33/+24
[Why] Currently we share rxstatus between HDMI and DP, so we use 16bits The drm defines work with 1bytes at a time. So we need to split the HDMI rxstatus into 2bytes before we can use drm defines [How] -create rxstatus for dp and hdmi. rxstatus for hdmi is split into bytes using arrays. -use drm_hdcp defines for the remaining structs Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-11-19drm/amd/display: use drm defines for MAX CASCADE MASKBhawanpreet Lakha2-12/+6
[Why] drm already has this define [How] drm Mask is 0x08 vs 0x0800. The reason is because drm mask works on a byte. ^^ =======|| || Since the first byte is always zero we can ignore it and only check the second byte. Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-11-19drm/amd/display: add and use defines from drm_hdcp.hBhawanpreet Lakha3-49/+37
[Why] These defines/macros exist already no need to redefine them [How] Use the defines/macros from drm_hdcp.h -we share the rxstatus between HDMI and DP (2 bytes), But upstream defines/macros for HDMI are for 1 byte. So we need to create a separate rxstatus for HDMI Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-11-19drm/amd/display: Refactor HDCP encryption status updateBhawanpreet Lakha3-8/+17
[Why] The old way was to poll PSP and update the properties. But due to a limitation in the PSP interface this doesn't work for MST. [How] According to PSP if set_encryption return success, the link is encrypted and the only way it will not be is if we get a link loss(which we handle already). So this method should be good enough to report HDCP status. Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-11-19drm/amd/display: add force Type0/1 flagBhawanpreet Lakha6-10/+26
[Why] Before we had a disable_type1 flag, this forced HDCP 2.2 to type0 There was no way to force type1. [How] Remove disable_type1 flag and instead add a flag to force type0/1. Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-11-19drm/amd/display: Refactor HDCP to handle multiple displays per linkBhawanpreet Lakha3-42/+40
[Why] We need to do this to support HDCP over MST Currently we save a display per link, in a MST case we need to save multiple displays per link. [How] We can create an array per link to cache the displays, but it complicates the design. Instead we can use the module to cache the displays. Now we will always add all the displays to the module, but we use the adjustment flag to disable hdcp on all of them before they are added. When we want to enable hdcp we just query the display(cache), remove it then add it back with different adjustments. Its the similar for disable. Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-11-19drm/amd/display: Handle hdcp2.2 type0/1 in dmBhawanpreet Lakha4-11/+33
[Why] HDCP 2.2 uses type0 and type1 content type. This is passed to the receiver to stream the proper content. For example, in a MST case if the main device is HDCP2.2 capable but the secondary device is only 1.4 capabale we can use Type0 Type0 content: use HDCP 1.4 or HDCP2.2 type0 Type1 content: Only use HDCP 2.2 type1 [How] We use the "hdcp content type" property in drm. We use the disable_type1 flag in hdcp module to select the type based on the properties. For updating the property we use the same logic as 1.4, but now we consider content_type as well and update the property if the requirements are met Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-11-19drm/amd/display: Enable HDCP 2.2Bhawanpreet Lakha2-3/+2
[Why] HDCP 2.2 was disabled, we need to enable it [How] -Update display topology to support 2.2 -Unset hdcp2.disable in update_config -Change logic of event_update_property, now we set the property to be ENABLED for any level of encryption (2.2 or 1.4). Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-11-19drm/amd/display: Change ERROR to WARN for HDCP moduleBhawanpreet Lakha1-2/+2
[Why] HDCP is a bit finicky so we try it 3 times, this leads to a case where if we fail the first time and pass the second time the error is still shown in dmesg for the first failed attempt. This leads to false positive errors. [How] Change the logging from ERROR to WARNING. Warnings are still shown in dmesg to know what went wrong. Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-11-19drm/amd/display: Add logging for HDCP2.2Bhawanpreet Lakha3-20/+196
[Why] We need to log the state changes for 2.2 This patch extends the existing logging functions to handle HDCP2.2. [How] We do this by adding if/else in the defines, and output the log based on the hdcp version Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-11-19drm/amd/display: Add execution and transition states for HDCP2.2Bhawanpreet Lakha6-9/+1764
The module works like a state machine +-------------+ ------> | Execution.c | ------ | +-------------+ | | V +----+ +--------+ +--------------+ | DM | -----> | Hdcp.c | <------------ | Transition.c | +----+ <----- +--------+ +--------------+ This patch adds the execution and transition files for 2.2 Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-11-19drm/amd/display: Add DDC handles for HDCP2.2Bhawanpreet Lakha1-0/+326
[Why] We need these to read and write to aux/i2c, during authentication [How] Create read/write functions for all the steps (Eg, h_prime, paring_info etc) Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-11-19drm/amd/display: Add PSP block to verify HDCP2.2 stepsBhawanpreet Lakha3-1/+739
[Why] All the HDCP transactions should be verified using PSP [How] This patch adds the psp calls we need to verify the steps Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-11-19drm/amd/display: Add Navi10 DMUB VBIOS codeNicholas Kazlauskas1-0/+11
[Why] We need some extra dmub_cmd_type for NV10 [How] Add command table functions in DMUB firmware. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Xiong Yan <Xiong.Yan@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-10-01 13:25:53 +0300