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path: root/drivers/gpu/drm/amd/amdgpu
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2019-10-03drm/amdgpu: don't increment vram lost if we are in hibernationAlex Deucher2-4/+8
We reset the GPU as part of our hibernation sequence so we need to make sure we don't mark vram as lost in that case. Bug: https://bugs.freedesktop.org/show_bug.cgi?id=111879 Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu : enable msix for amdgpu drivershaoyunl1-2/+3
We might used out of the msi resources in some cloud project which have a lot gpu devices(including PF and VF), msix can provide enough resources from system level view Signed-off-by: shaoyunl <shaoyun.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu: Export setup_vm_pt_regs() logic for mmhub 2.0Yong Zhao2-7/+14
The KFD code will call this function later. Signed-off-by: Yong Zhao <Yong.Zhao@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu: Add the HDP flush support for NaviYong Zhao2-3/+22
The HDP flush support code was missing in the nbio and nv files. Signed-off-by: Yong Zhao <Yong.Zhao@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdkfd: Use array to probe kfd2kgd_callsYong Zhao7-102/+6
This is the same idea as the kfd device info probe and move all the probe control together for easy maintenance. Signed-off-by: Yong Zhao <Yong.Zhao@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdkfd: Delete unnecessary function declarationsYong Zhao3-257/+90
Ajust the function sequences so that those function delcarations are not needed any more. Signed-off-by: Yong Zhao <Yong.Zhao@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu: Delete useless header file referenceYong Zhao10-21/+0
Those header file includes are not needed. Signed-off-by: Yong Zhao <Yong.Zhao@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amd/amdgpu/sriov ip block setting of ArcturusJack Zhang2-8/+20
Add ip block setting for Arcturus SRIOV 1.PSP need to be initialized before IH. 2.SMU doesn't need to be initialized at kmd driver. 3.Arcturus doesn't support DCE hardware,it needs to skip register access to DCE. Signed-off-by: Jack Zhang <Jack.Zhang1@amd.com> Reviewed-by: Le Ma <Le.Ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu: return tcc_disabled_mask to userspaceMarek Olšák4-1/+17
UMDs need this for correct programming of harvested chips. Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu: Iterate through DRM connectors correctlyLyude Paul9-56/+169
Currently, every single piece of code in amdgpu that loops through connectors does it incorrectly and doesn't use the proper list iteration helpers, drm_connector_list_iter_begin() and drm_connector_list_iter_end(). Yeesh. So, do that. Cc: Juston Li <juston.li@intel.com> Cc: Imre Deak <imre.deak@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Harry Wentland <hwentlan@amd.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Lyude Paul <lyude@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdkfd: fix kgd2kfd_device_init() definition conflict errorPrike Liang1-0/+1
The patch c670707 drm/amd: Pass drm_device to kfd introduced this issue and fix the following compiler error. CC [M] drivers/gpu/drm/amd/amdgpu//../powerplay/smumgr/fiji_smumgr.o drivers/gpu/drm/amd/amdgpu//amdgpu_amdkfd.c:746:6: error: conflicting types for ‘kgd2kfd_device_init’ bool kgd2kfd_device_init(struct kfd_dev *kfd, ^ In file included from drivers/gpu/drm/amd/amdgpu//amdgpu_amdkfd.c:23:0: drivers/gpu/drm/amd/amdgpu//amdgpu_amdkfd.h:253:6: note: previous declaration of ‘kgd2kfd_device_init’ was here bool kgd2kfd_device_init(struct kfd_dev *kfd, ^ scripts/Makefile.build:273: recipe for target 'drivers/gpu/drm/amd/amdgpu//amdgpu_amdkfd.o' failed make[1]: *** [drivers/gpu/drm/amd/amdgpu//amdgpu_amdkfd.o] Error 1 Signed-off-by: Prike Liang <Prike.Liang@amd.com> Acked-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amd/amdgpu: add IH cg support on soc15 projectKenneth Feng2-1/+41
enable/disable IH clock gating on soc15 projects. Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdkfd: Use setup_vm_pt_regs function from base driver in KFDYong Zhao1-20/+3
This was done on GFX9 previously, now do it for GFX10. Signed-off-by: Yong Zhao <Yong.Zhao@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu: Export setup_vm_pt_regs() logic for gfxhub 2.0Yong Zhao2-8/+14
The KFD code will call this function later. Signed-off-by: Yong Zhao <Yong.Zhao@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdkfd: Eliminate get_atc_vmid_pasid_mapping_validYong Zhao6-106/+60
get_atc_vmid_pasid_mapping_valid() is very similar to get_atc_vmid_pasid_mapping_pasid(), so they can be merged into a new function get_atc_vmid_pasid_mapping_info() to reduce register access times. More importantly, getting the PASID and the valid bit atomically with a single read fixes some potential race conditions where the mapping changes between the two reads. Signed-off-by: Yong Zhao <Yong.Zhao@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdkfd: Delete unused definesYong Zhao1-3/+0
They are not used anywhere. Signed-off-by: Yong Zhao <Yong.Zhao@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amd: Pass drm_device to kfdHarish Kasiviswanathan2-1/+2
kfd needs drm_device to call into drm_cgroup functions Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdkfd: Use better name for sdma queue non HWS pathYong Zhao5-190/+196
The old name is prone to confusion. The register offset is for a RLC queue rather than a SDMA engine. The value is not a base address, but a register offset. Signed-off-by: Yong Zhao <Yong.Zhao@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdkfd: Delete useless SDMA register setting on non HWS pathYong Zhao5-71/+3
HW folks have confirm that we should not touch RESUME_CTX of SDMA*_GFX_CONTEXT_CNTL when manipulating RLC queues. Signed-off-by: Yong Zhao <Yong.Zhao@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu: restrict hotplug error messageChristian König1-1/+4
We should print the error only when we are hotplugged and crash basically all userspace applications. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Emily Deng <Emily.Deng@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu: once more fix amdgpu_bo_create_kernel_atChristian König1-3/+6
When CPU access is needed we should tell that to amdgpu_bo_create_reserved() or otherwise the access is denied later on. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Emily Deng <Emily.Deng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu: add comments in ras interrupt callbackTao Zhou3-1/+14
add comments to clarify why checking GFX IP BLOCK for each ras interrupt callback Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu: implement common gmc_ras_late_initTao Zhou3-21/+21
common gmc_ecc_late_init can be shared among all generations of gmc v2: rename gmc_ecc_late_init to gmc_ras_late_init Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu: move xgmi ras fini to xgmi blockTao Zhou3-11/+17
it's more suitable to put xgmi ras fini in xgmi block Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu: move mmhub ras fini to mmhub blockTao Zhou3-12/+16
it's more suitable to put mmhub ras fini in mmhub block Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu: move umc ras fini to umc blockTao Zhou3-11/+17
it's more suitable to put umc ras fini in umc block Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu: add ras fini for xgmiTao Zhou1-0/+11
add ras fini for xgmi to cleanup xgmi ras framework Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu: add ras fini for nbioTao Zhou3-1/+16
add a common nbio ras fini implementation to cleanup nbio ras framework Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu: simplify the access to eeprom_control structTao Zhou1-3/+3
simplify the code of accessing to eeprom_control struct Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu: remove ih_info parameter of gfx_ras_late_initTao Zhou3-15/+9
gfx_ras_late_init can get the info by itself Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu: remove ih_info parameter of umc_ras_late_initTao Zhou3-14/+10
umc_ras_late_init can get the info by itself Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu: add common sdma_ras_fini functionTao Zhou3-15/+21
sdma_ras_fini can be shared among all generations of sdma Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu: add common gfx_ras_fini functionTao Zhou3-13/+17
gfx_ras_fini can be shared among all generations of gfx Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu: add common gmc_ras_fini functionTao Zhou3-27/+28
gmc_ras_fini can be shared among all generations of gmc Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu: move mmhub_ras_if from gmc to mmhub blockTao Zhou3-15/+14
mmhub_ras_if is relevant to mmhub Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu: replace mmhub_funcs with mmhub.funcsTao Zhou3-6/+5
remove mmhub_funcs in adev Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu: add common mmhub member for adevTao Zhou2-0/+8
put mmhub_funcs and ras_if pointer into mmhub struct Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu: move umc_ras_if from gmc to umc blockTao Zhou4-17/+17
umc_ras_if is relevant to umc Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu: refine sdma4 ras_data_cbTao Zhou1-17/+7
simplify code logic and refine return value v2: remove unused error source code Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu: move sdma ecc functions to generic sdma fileTao Zhou3-22/+36
sdma ras ecc functions can be reused among all sdma generations Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu: move gfx ecc functions to generic gfx fileTao Zhou3-39/+41
gfx ras ecc common functions could be reused among all gfx generations Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu: move umc ras irq functions to umc blockTao Zhou3-67/+72
move umc ras irq functions from gmc v9 to generic umc block, these functions are relevant to umc and they can be shared among all generations of umc Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu: update parameter of ras_ih_cbTao Zhou4-7/+9
change struct ras_err_data *err_data to void *err_data, align with umc code and the callback's declaration in each ras block could pay no attention to the structure type Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu: fix an UMC hw arbitrator bug(v3)Monk Liu5-1/+77
issue: the UMC6 h/w bug is that when MCLK is doing the switch in the middle of a page access being preempted by high priority client (e.g. DISPLAY) then UMC and the mclk switch would stuck there due to deadlock how: fixed by disabling auto PreChg for UMC to avoid high priority client preempting other client's access on the same page, thus the deadlock could be avoided v2: put the patch in callback of UMC6 v3: rename the callback to "init_registers" Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Hawking Zhang <hawking.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu: remove gfx9 NGGMarek Olšák5-277/+0
Never used. Signed-off-by: Marek Olšák <marek.olsak@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu/atomfirmware: simplify the interface to get vram infoAlex Deucher4-71/+37
fetch both the vram type and width in one function call. This avoids having to parse the same data table twice to get the two pieces of data. Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu/atomfirmware: use proper index for querying vram type (v3)Alex Deucher1-70/+88
The index is stored in scratch register 4 after asic init. Use that index. No functional change since all asics in a family use the same type of vram (G5, G6, HBM) and that is all we use at the monent, but if we ever need to query other info, we will now have the proper index. v2: module array is variable sized, handle that. v3: fix off by one in array handling Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu/psp: silence response status warningShirish S1-1/+1
log the response status related error to the driver's debug log since psp response status is not 0 even though there was no problem while the command was submitted. This warning misleads, hence this change. Signed-off-by: Shirish S <shirish.s@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amd/amdgpu:Fix compute ring unable to detect hang.Jesse Zhang3-19/+13
When compute fence did not signal, compute ring cannot detect hardware hang because its timeout value is set to be infinite by default. In SR-IOV and passthrough mode, if user does not declare custome timeout value for compute ring, then use gfx ring timeout value as default. So that when there is a ture hardware hang, compute ring can detect it. Signed-off-by: Jesse Zhang <zhexi.zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03drm/amdgpu: Use mode2 mode to perform GPU RESET for Renoirchen gong1-0/+3
Renoir need to use mode2 mode to implement GPU RESET Signed-off-by: chen gong <curry.gong@amd.com> Reviewed-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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